JPS54107638A - Memory data readout circuit in semiconductor memory unit - Google Patents

Memory data readout circuit in semiconductor memory unit

Info

Publication number
JPS54107638A
JPS54107638A JP1460078A JP1460078A JPS54107638A JP S54107638 A JPS54107638 A JP S54107638A JP 1460078 A JP1460078 A JP 1460078A JP 1460078 A JP1460078 A JP 1460078A JP S54107638 A JPS54107638 A JP S54107638A
Authority
JP
Japan
Prior art keywords
data
line
memory
data readout
readout circuit
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP1460078A
Other languages
Japanese (ja)
Inventor
Takeshi Sakai
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Sanyo Electric Co Ltd
Original Assignee
Sanyo Electric Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Sanyo Electric Co Ltd filed Critical Sanyo Electric Co Ltd
Priority to JP1460078A priority Critical patent/JPS54107638A/en
Publication of JPS54107638A publication Critical patent/JPS54107638A/en
Pending legal-status Critical Current

Links

Classifications

    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C7/00—Arrangements for writing information into, or reading information out from, a digital store
    • G11C7/12—Bit line control circuits, e.g. drivers, boosters, pull-up circuits, pull-down circuits, precharging circuits, equalising circuits, for bit lines

Landscapes

  • Static Random-Access Memory (AREA)
  • Read Only Memory (AREA)

Abstract

PURPOSE:To reduce the readout time, by precharging the line with the precharge voltage at the non-selection of the memory data readout line, in the memory data readout circuit in the semiconductor memory unit. CONSTITUTION:When the signal for data line selection is inputted to the terminal T1, the data lines 11 to 14 are selected. Further, when the switching gate line 1a is selected, the memory data are read out on the data line via the circuit blocks CB1... CB4 to restrict the voltage amplitude of the data line to a given range depending on the ON or OFF of the memory elements 111...141. On the other hand, the data lines 21...24 not selected are isolated from the ground level and are conducted with the circuit block CB0 and precharging is made with the precharge voltage V made with the circuit block CB0.
JP1460078A 1978-02-10 1978-02-10 Memory data readout circuit in semiconductor memory unit Pending JPS54107638A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP1460078A JPS54107638A (en) 1978-02-10 1978-02-10 Memory data readout circuit in semiconductor memory unit

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP1460078A JPS54107638A (en) 1978-02-10 1978-02-10 Memory data readout circuit in semiconductor memory unit

Publications (1)

Publication Number Publication Date
JPS54107638A true JPS54107638A (en) 1979-08-23

Family

ID=11865675

Family Applications (1)

Application Number Title Priority Date Filing Date
JP1460078A Pending JPS54107638A (en) 1978-02-10 1978-02-10 Memory data readout circuit in semiconductor memory unit

Country Status (1)

Country Link
JP (1) JPS54107638A (en)

Cited By (7)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5693A (en) * 1979-06-15 1981-01-06 Nec Corp Write-in circuit for non-volatile semiconductor memory
JPS5641586A (en) * 1979-09-11 1981-04-18 Fujitsu Ltd Memory readout circuit
JPS56114193A (en) * 1980-02-09 1981-09-08 Fujitsu Ltd Semiconductor memory device
JPS5769584A (en) * 1980-10-15 1982-04-28 Toshiba Corp Non-volatile semiconductor memory
JPS5769583A (en) * 1980-10-15 1982-04-28 Toshiba Corp Non_volatile semiconductor memory
JPS59186199A (en) * 1983-04-08 1984-10-22 Seiko Epson Corp Semiconductor memory
JPS60219699A (en) * 1984-04-13 1985-11-02 Mitsubishi Electric Corp Memory read device

Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS49131545A (en) * 1973-04-06 1974-12-17
JPS50132831A (en) * 1974-04-05 1975-10-21

Patent Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS49131545A (en) * 1973-04-06 1974-12-17
JPS50132831A (en) * 1974-04-05 1975-10-21

Cited By (11)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5693A (en) * 1979-06-15 1981-01-06 Nec Corp Write-in circuit for non-volatile semiconductor memory
JPS6215957B2 (en) * 1979-06-15 1987-04-09 Nippon Electric Co
JPS5641586A (en) * 1979-09-11 1981-04-18 Fujitsu Ltd Memory readout circuit
JPS56114193A (en) * 1980-02-09 1981-09-08 Fujitsu Ltd Semiconductor memory device
JPS6220636B2 (en) * 1980-02-09 1987-05-08 Fujitsu Ltd
JPS5769584A (en) * 1980-10-15 1982-04-28 Toshiba Corp Non-volatile semiconductor memory
JPS5769583A (en) * 1980-10-15 1982-04-28 Toshiba Corp Non_volatile semiconductor memory
JPS628877B2 (en) * 1980-10-15 1987-02-25 Tokyo Shibaura Electric Co
JPS628876B2 (en) * 1980-10-15 1987-02-25 Tokyo Shibaura Electric Co
JPS59186199A (en) * 1983-04-08 1984-10-22 Seiko Epson Corp Semiconductor memory
JPS60219699A (en) * 1984-04-13 1985-11-02 Mitsubishi Electric Corp Memory read device

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