JPS54105979A - Semiconductor device - Google Patents

Semiconductor device

Info

Publication number
JPS54105979A
JPS54105979A JP1272878A JP1272878A JPS54105979A JP S54105979 A JPS54105979 A JP S54105979A JP 1272878 A JP1272878 A JP 1272878A JP 1272878 A JP1272878 A JP 1272878A JP S54105979 A JPS54105979 A JP S54105979A
Authority
JP
Japan
Prior art keywords
region
film
covered
type
diffusion
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP1272878A
Other languages
Japanese (ja)
Other versions
JPS6042632B2 (en
Inventor
Takashi Shimada
Koji Otsu
Hidenobu Mochizuki
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Sony Corp
Original Assignee
Sony Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Sony Corp filed Critical Sony Corp
Priority to JP53012728A priority Critical patent/JPS6042632B2/en
Publication of JPS54105979A publication Critical patent/JPS54105979A/en
Publication of JPS6042632B2 publication Critical patent/JPS6042632B2/en
Expired legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
    • H01L27/02—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier
    • H01L27/04—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier the substrate being a semiconductor body
    • H01L27/08—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier the substrate being a semiconductor body including only semiconductor components of a single kind
    • H01L27/085—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier the substrate being a semiconductor body including only semiconductor components of a single kind including field-effect components only
    • H01L27/088—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier the substrate being a semiconductor body including only semiconductor components of a single kind including field-effect components only the components being field-effect transistors with insulated gate

Abstract

PURPOSE:To reduce the photoethcing processes as well as to lower the reading voltage of the memory by forming the MOSFET and MNOSFET memory elements on the same semiconductor substrate through the self-alignment method. CONSTITUTION:N-type island region 42a to form FET and N-type island region 42b are formed through diffusion on P-type Si substrate 41, and the entier surface is covered with insulator film 43. Then film 43 is removed on region 42a and 42b to coat newly thin SiO2 film 34, and poly-crystal Si layer 35 containing the impurity is grown on film 34 with openings 46 49 drilled via the photoetching. After this, P-type source and drain regions 40s, 40d, 30s and 30d are formed through diffusion with use of these openings at region 42a and 42d. Furthermore, opening 51 enclosed by region 30s and 30d is provided at region 42b to be covered with SiO2 film 31. Then the entire surface is covered with SiO2 film 32 with the opening drilled at each region, and then electrode 53s, 53d, 54s and 54d are attached each.
JP53012728A 1978-02-07 1978-02-07 semiconductor equipment Expired JPS6042632B2 (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP53012728A JPS6042632B2 (en) 1978-02-07 1978-02-07 semiconductor equipment

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP53012728A JPS6042632B2 (en) 1978-02-07 1978-02-07 semiconductor equipment

Publications (2)

Publication Number Publication Date
JPS54105979A true JPS54105979A (en) 1979-08-20
JPS6042632B2 JPS6042632B2 (en) 1985-09-24

Family

ID=11813489

Family Applications (1)

Application Number Title Priority Date Filing Date
JP53012728A Expired JPS6042632B2 (en) 1978-02-07 1978-02-07 semiconductor equipment

Country Status (1)

Country Link
JP (1) JPS6042632B2 (en)

Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5530845A (en) * 1978-08-28 1980-03-04 Hitachi Ltd Method for manufacturing fixed memory
JPS6399575A (en) * 1987-08-12 1988-04-30 Hitachi Ltd Manufacture of semiconductor integrated circuit
JPH0715974B2 (en) * 1983-05-27 1995-02-22 エヌ・シー・アール・インターナショナル・インコーポレイテッド Method for manufacturing semiconductor device

Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5530845A (en) * 1978-08-28 1980-03-04 Hitachi Ltd Method for manufacturing fixed memory
JPH0715974B2 (en) * 1983-05-27 1995-02-22 エヌ・シー・アール・インターナショナル・インコーポレイテッド Method for manufacturing semiconductor device
JPS6399575A (en) * 1987-08-12 1988-04-30 Hitachi Ltd Manufacture of semiconductor integrated circuit

Also Published As

Publication number Publication date
JPS6042632B2 (en) 1985-09-24

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