JPS53108379A - Manufacture of semiconductor device - Google Patents

Manufacture of semiconductor device

Info

Publication number
JPS53108379A
JPS53108379A JP2267677A JP2267677A JPS53108379A JP S53108379 A JPS53108379 A JP S53108379A JP 2267677 A JP2267677 A JP 2267677A JP 2267677 A JP2267677 A JP 2267677A JP S53108379 A JPS53108379 A JP S53108379A
Authority
JP
Japan
Prior art keywords
semiconductor device
manufacture
constitution
depth
concentration
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP2267677A
Other languages
Japanese (ja)
Inventor
Yoshiaki Kamigaki
Kiyoo Ito
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Hitachi Ltd
Original Assignee
Hitachi Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Hitachi Ltd filed Critical Hitachi Ltd
Priority to JP2267677A priority Critical patent/JPS53108379A/en
Publication of JPS53108379A publication Critical patent/JPS53108379A/en
Pending legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
    • H01L29/02Semiconductor bodies ; Multistep manufacturing processes therefor
    • H01L29/06Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions
    • H01L29/08Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions with semiconductor regions connected to an electrode carrying current to be rectified, amplified or switched and such electrode being part of a semiconductor device which comprises three or more electrodes
    • H01L29/0843Source or drain regions of field-effect devices
    • H01L29/0847Source or drain regions of field-effect devices of field-effect transistors with insulated gate
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
    • H01L29/66Types of semiconductor device ; Multistep manufacturing processes therefor
    • H01L29/68Types of semiconductor device ; Multistep manufacturing processes therefor controllable by only the electric current supplied, or only the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched
    • H01L29/76Unipolar devices, e.g. field effect transistors
    • H01L29/772Field effect transistors
    • H01L29/78Field effect transistors with field effect produced by an insulated gate

Landscapes

  • Engineering & Computer Science (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Physics & Mathematics (AREA)
  • Ceramic Engineering (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)

Abstract

PURPOSE:To give high breakdown voltage and to shallow the diffusion depth, by taking the constitution that the diffusion layer is formed to a given high concentration to a depth and the concentration has a gentle gradient around the tip, inthe manufacture of semiconductor device with high breakdown constitution.
JP2267677A 1977-03-04 1977-03-04 Manufacture of semiconductor device Pending JPS53108379A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP2267677A JPS53108379A (en) 1977-03-04 1977-03-04 Manufacture of semiconductor device

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP2267677A JPS53108379A (en) 1977-03-04 1977-03-04 Manufacture of semiconductor device

Publications (1)

Publication Number Publication Date
JPS53108379A true JPS53108379A (en) 1978-09-21

Family

ID=12089456

Family Applications (1)

Application Number Title Priority Date Filing Date
JP2267677A Pending JPS53108379A (en) 1977-03-04 1977-03-04 Manufacture of semiconductor device

Country Status (1)

Country Link
JP (1) JPS53108379A (en)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5658227A (en) * 1979-10-18 1981-05-21 Matsushita Electric Ind Co Ltd Self-alignment diffusing method

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5658227A (en) * 1979-10-18 1981-05-21 Matsushita Electric Ind Co Ltd Self-alignment diffusing method

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