JPS5268393A - Semiconductor device - Google Patents

Semiconductor device

Info

Publication number
JPS5268393A
JPS5268393A JP50145481A JP14548175A JPS5268393A JP S5268393 A JPS5268393 A JP S5268393A JP 50145481 A JP50145481 A JP 50145481A JP 14548175 A JP14548175 A JP 14548175A JP S5268393 A JPS5268393 A JP S5268393A
Authority
JP
Japan
Prior art keywords
semiconductor device
base electrode
transistor
electrode
connects
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP50145481A
Other languages
Japanese (ja)
Other versions
JPS6019673B2 (en
Inventor
Shigemichi Nagano
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
NEC Corp
Original Assignee
NEC Corp
Nippon Electric Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by NEC Corp, Nippon Electric Co Ltd filed Critical NEC Corp
Priority to JP50145481A priority Critical patent/JPS6019673B2/en
Publication of JPS5268393A publication Critical patent/JPS5268393A/en
Publication of JPS6019673B2 publication Critical patent/JPS6019673B2/en
Expired legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42Wire connectors; Manufacturing methods related thereto
    • H01L2224/47Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/4805Shape
    • H01L2224/4809Loop shape
    • H01L2224/48091Arched
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42Wire connectors; Manufacturing methods related thereto
    • H01L2224/47Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/481Disposition
    • H01L2224/48151Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/48221Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/48245Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic
    • H01L2224/48247Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic connecting the wire to a bond pad of the item

Landscapes

  • Light Receiving Elements (AREA)

Abstract

PURPOSE:To prevent malfunction in use of semiconductor device under open state of base electrode by forming conduction film which connects to earth electrode surrounding base electrode of transistor.
JP50145481A 1975-12-05 1975-12-05 semiconductor equipment Expired JPS6019673B2 (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP50145481A JPS6019673B2 (en) 1975-12-05 1975-12-05 semiconductor equipment

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP50145481A JPS6019673B2 (en) 1975-12-05 1975-12-05 semiconductor equipment

Publications (2)

Publication Number Publication Date
JPS5268393A true JPS5268393A (en) 1977-06-07
JPS6019673B2 JPS6019673B2 (en) 1985-05-17

Family

ID=15386241

Family Applications (1)

Application Number Title Priority Date Filing Date
JP50145481A Expired JPS6019673B2 (en) 1975-12-05 1975-12-05 semiconductor equipment

Country Status (1)

Country Link
JP (1) JPS6019673B2 (en)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS54125585U (en) * 1978-01-11 1979-09-01

Families Citing this family (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH02210179A (en) * 1989-02-09 1990-08-21 Hideo Otake Window frame of building

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS54125585U (en) * 1978-01-11 1979-09-01

Also Published As

Publication number Publication date
JPS6019673B2 (en) 1985-05-17

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