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Hitachi Ltd
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Hitachi Ltd
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Application filed by Hitachi LtdfiledCriticalHitachi Ltd
Priority to JP10124475ApriorityCriticalpatent/JPS5226186A/en
Publication of JPS5226186ApublicationCriticalpatent/JPS5226186A/en
Internal Circuitry In Semiconductor Integrated Circuit Devices
(AREA)
Abstract
PURPOSE: Removal of the slack of the wiring layer on both sides by applying the forward bias to the Pn junction in the substrate at the time of positive electrode oxidization.
COPYRIGHT: (C)1977,JPO&Japio
JP10124475A1975-08-221975-08-22Manufacturing method of semiconductor unit
PendingJPS5226186A
(en)