JPS52172A - Semiconductor - Google Patents

Semiconductor

Info

Publication number
JPS52172A
JPS52172A JP7560375A JP7560375A JPS52172A JP S52172 A JPS52172 A JP S52172A JP 7560375 A JP7560375 A JP 7560375A JP 7560375 A JP7560375 A JP 7560375A JP S52172 A JPS52172 A JP S52172A
Authority
JP
Japan
Prior art keywords
semiconductor
substrate
lead wire
resin molding
taken place
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP7560375A
Other languages
English (en)
Inventor
Akio Yasukawa
Sueo Kawai
Tetsuo Kumazawa
Koji Koibuchi
Mikikazu Uchida
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Hitachi Ltd
Original Assignee
Hitachi Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Hitachi Ltd filed Critical Hitachi Ltd
Priority to JP7560375A priority Critical patent/JPS52172A/ja
Priority to NL7606781A priority patent/NL7606781A/xx
Priority to DE19762627895 priority patent/DE2627895A1/de
Publication of JPS52172A publication Critical patent/JPS52172A/ja
Pending legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00Details of semiconductor or other solid state devices
    • H01L23/28Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection
    • H01L23/31Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection characterised by the arrangement or shape
    • H01L23/3107Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection characterised by the arrangement or shape the device being completely enclosed
    • H01L23/3121Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection characterised by the arrangement or shape the device being completely enclosed a substrate forming part of the encapsulation
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00Details of semiconductor or other solid state devices
    • H01L23/48Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor
    • H01L23/488Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor consisting of soldered or bonded constructions
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L24/26Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
    • H01L24/31Structure, shape, material or disposition of the layer connectors after the connecting process
    • H01L24/32Structure, shape, material or disposition of the layer connectors after the connecting process of an individual layer connector
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/26Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
    • H01L2224/31Structure, shape, material or disposition of the layer connectors after the connecting process
    • H01L2224/32Structure, shape, material or disposition of the layer connectors after the connecting process of an individual layer connector
    • H01L2224/321Disposition
    • H01L2224/32151Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/32221Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/32245Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/15Details of package parts other than the semiconductor or other solid state devices to be connected
    • H01L2924/151Die mounting substrate
    • H01L2924/1515Shape
    • H01L2924/15153Shape the die mounting substrate comprising a recess for hosting the device
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/15Details of package parts other than the semiconductor or other solid state devices to be connected
    • H01L2924/151Die mounting substrate
    • H01L2924/15165Monolayer substrate

Landscapes

  • Engineering & Computer Science (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Computer Hardware Design (AREA)
  • Power Engineering (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Structures Or Materials For Encapsulating Or Coating Semiconductor Devices Or Solid State Devices (AREA)
  • Die Bonding (AREA)
JP7560375A 1975-06-23 1975-06-23 Semiconductor Pending JPS52172A (en)

Priority Applications (3)

Application Number Priority Date Filing Date Title
JP7560375A JPS52172A (en) 1975-06-23 1975-06-23 Semiconductor
NL7606781A NL7606781A (nl) 1975-06-23 1976-06-22 Halfgeleiderinrichting.
DE19762627895 DE2627895A1 (de) 1975-06-23 1976-06-22 Halbleiteranordnung

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP7560375A JPS52172A (en) 1975-06-23 1975-06-23 Semiconductor

Publications (1)

Publication Number Publication Date
JPS52172A true JPS52172A (en) 1977-01-05

Family

ID=13580936

Family Applications (1)

Application Number Title Priority Date Filing Date
JP7560375A Pending JPS52172A (en) 1975-06-23 1975-06-23 Semiconductor

Country Status (3)

Country Link
JP (1) JPS52172A (ja)
DE (1) DE2627895A1 (ja)
NL (1) NL7606781A (ja)

Families Citing this family (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4196444A (en) * 1976-12-03 1980-04-01 Texas Instruments Deutschland Gmbh Encapsulated power semiconductor device with single piece heat sink mounting plate
JPH0770642B2 (ja) * 1989-03-30 1995-07-31 三菱電機株式会社 半導体装置
US5139969A (en) * 1990-05-30 1992-08-18 Mitsubishi Denki Kabushiki Kaisha Method of making resin molded semiconductor device
JPH0547958A (ja) * 1991-08-12 1993-02-26 Mitsubishi Electric Corp 樹脂封止型半導体装置
US6249041B1 (en) * 1998-06-02 2001-06-19 Siliconix Incorporated IC chip package with directly connected leads

Also Published As

Publication number Publication date
DE2627895A1 (de) 1977-01-13
NL7606781A (nl) 1976-12-27

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