JPS5379379A - Production of semiconductor and divice for the same - Google Patents

Production of semiconductor and divice for the same

Info

Publication number
JPS5379379A
JPS5379379A JP15488576A JP15488576A JPS5379379A JP S5379379 A JPS5379379 A JP S5379379A JP 15488576 A JP15488576 A JP 15488576A JP 15488576 A JP15488576 A JP 15488576A JP S5379379 A JPS5379379 A JP S5379379A
Authority
JP
Japan
Prior art keywords
divice
semiconductor
production
same
voides
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP15488576A
Other languages
Japanese (ja)
Inventor
Aizo Kaneda
Takeshi Watanabe
Shigeharu Tsunoda
Susumu Tsujiku
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Hitachi Ltd
Original Assignee
Hitachi Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Hitachi Ltd filed Critical Hitachi Ltd
Priority to JP15488576A priority Critical patent/JPS5379379A/en
Publication of JPS5379379A publication Critical patent/JPS5379379A/en
Pending legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/50Tape automated bonding [TAB] connectors, i.e. film carriers; Manufacturing methods related thereto

Landscapes

  • Wire Bonding (AREA)
  • Encapsulation Of And Coatings For Semiconductor Or Solid State Devices (AREA)

Abstract

PURPOSE: To obtain moldings free from internal or interface voides by fusion-bonding and covering inner-bonded semiconductor chips with tape-form thermosetting regin.
COPYRIGHT: (C)1978,JPO&Japio
JP15488576A 1976-12-24 1976-12-24 Production of semiconductor and divice for the same Pending JPS5379379A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP15488576A JPS5379379A (en) 1976-12-24 1976-12-24 Production of semiconductor and divice for the same

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP15488576A JPS5379379A (en) 1976-12-24 1976-12-24 Production of semiconductor and divice for the same

Publications (1)

Publication Number Publication Date
JPS5379379A true JPS5379379A (en) 1978-07-13

Family

ID=15594072

Family Applications (1)

Application Number Title Priority Date Filing Date
JP15488576A Pending JPS5379379A (en) 1976-12-24 1976-12-24 Production of semiconductor and divice for the same

Country Status (1)

Country Link
JP (1) JPS5379379A (en)

Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5543871A (en) * 1978-09-22 1980-03-27 Casio Comput Co Ltd Packaging of semiconductor device
JPS6076146A (en) * 1983-10-03 1985-04-30 Nitto Electric Ind Co Ltd Thin type semiconductor device
US4913930A (en) * 1988-06-28 1990-04-03 Wacker Silicones Corporation Method for coating semiconductor components on a dielectric film

Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5543871A (en) * 1978-09-22 1980-03-27 Casio Comput Co Ltd Packaging of semiconductor device
JPS6076146A (en) * 1983-10-03 1985-04-30 Nitto Electric Ind Co Ltd Thin type semiconductor device
US4913930A (en) * 1988-06-28 1990-04-03 Wacker Silicones Corporation Method for coating semiconductor components on a dielectric film

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