JPS52110530A - Mos random access memory - Google Patents

Mos random access memory

Info

Publication number
JPS52110530A
JPS52110530A JP2675276A JP2675276A JPS52110530A JP S52110530 A JPS52110530 A JP S52110530A JP 2675276 A JP2675276 A JP 2675276A JP 2675276 A JP2675276 A JP 2675276A JP S52110530 A JPS52110530 A JP S52110530A
Authority
JP
Japan
Prior art keywords
digit line
random access
access memory
mos random
mos
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP2675276A
Other languages
English (en)
Other versions
JPS5643556B2 (ja
Inventor
Koji Matsuki
Fujio Masuoka
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Toshiba Corp
Original Assignee
Toshiba Corp
Tokyo Shibaura Electric Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Toshiba Corp, Tokyo Shibaura Electric Co Ltd filed Critical Toshiba Corp
Priority to JP2675276A priority Critical patent/JPS52110530A/ja
Publication of JPS52110530A publication Critical patent/JPS52110530A/ja
Publication of JPS5643556B2 publication Critical patent/JPS5643556B2/ja
Granted legal-status Critical Current

Links

Classifications

    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C11/00—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor
    • G11C11/21—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements
    • G11C11/34—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices
    • G11C11/40—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors
    • G11C11/41—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors forming static cells with positive feedback, i.e. cells not needing refreshing or charge regeneration, e.g. bistable multivibrator or Schmitt trigger
    • G11C11/413—Auxiliary circuits, e.g. for addressing, decoding, driving, writing, sensing, timing or power reduction
    • G11C11/417—Auxiliary circuits, e.g. for addressing, decoding, driving, writing, sensing, timing or power reduction for memory cells of the field-effect type
    • G11C11/419—Read-write [R-W] circuits

Landscapes

  • Engineering & Computer Science (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Computer Hardware Design (AREA)
  • Static Random-Access Memory (AREA)
JP2675276A 1976-03-12 1976-03-12 Mos random access memory Granted JPS52110530A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP2675276A JPS52110530A (en) 1976-03-12 1976-03-12 Mos random access memory

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP2675276A JPS52110530A (en) 1976-03-12 1976-03-12 Mos random access memory

Publications (2)

Publication Number Publication Date
JPS52110530A true JPS52110530A (en) 1977-09-16
JPS5643556B2 JPS5643556B2 (ja) 1981-10-13

Family

ID=12202010

Family Applications (1)

Application Number Title Priority Date Filing Date
JP2675276A Granted JPS52110530A (en) 1976-03-12 1976-03-12 Mos random access memory

Country Status (1)

Country Link
JP (1) JPS52110530A (ja)

Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS54108623U (ja) * 1978-01-17 1979-07-31
EP0060115A2 (en) * 1981-03-09 1982-09-15 Fujitsu Limited Static RAM memory circuit
EP0264933A2 (en) * 1986-10-21 1988-04-27 Brooktree Corporation System employing negative feedback for decreasing the response time of a memory cell

Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS4996640A (ja) * 1972-11-03 1974-09-12
US3953839A (en) * 1975-04-10 1976-04-27 International Business Machines Corporation Bit circuitry for enhance-deplete ram

Patent Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS4996640A (ja) * 1972-11-03 1974-09-12
US3953839A (en) * 1975-04-10 1976-04-27 International Business Machines Corporation Bit circuitry for enhance-deplete ram

Cited By (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS54108623U (ja) * 1978-01-17 1979-07-31
JPS5843120Y2 (ja) * 1978-01-17 1983-09-29 シャープ株式会社 Ｍｏｓトランジスタの集積回路装置
EP0060115A2 (en) * 1981-03-09 1982-09-15 Fujitsu Limited Static RAM memory circuit
EP0264933A2 (en) * 1986-10-21 1988-04-27 Brooktree Corporation System employing negative feedback for decreasing the response time of a memory cell

Also Published As

Publication number Publication date
JPS5643556B2 (ja) 1981-10-13

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