JPS4996640A - - Google Patents

Info

Publication number
JPS4996640A
JPS4996640A JP48124318A JP12431873A JPS4996640A JP S4996640 A JPS4996640 A JP S4996640A JP 48124318 A JP48124318 A JP 48124318A JP 12431873 A JP12431873 A JP 12431873A JP S4996640 A JPS4996640 A JP S4996640A
Authority
JP
Japan
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP48124318A
Other versions
JPS5516353B2 (ja
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed filed Critical
Publication of JPS4996640A publication Critical patent/JPS4996640A/ja
Publication of JPS5516353B2 publication Critical patent/JPS5516353B2/ja
Expired legal-status Critical Current

Links

Classifications

    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C11/00—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor
    • G11C11/21—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements
    • G11C11/34—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices
    • G11C11/40—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors
    • G11C11/41—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors forming static cells with positive feedback, i.e. cells not needing refreshing or charge regeneration, e.g. bistable multivibrator or Schmitt trigger
    • G11C11/412—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors forming static cells with positive feedback, i.e. cells not needing refreshing or charge regeneration, e.g. bistable multivibrator or Schmitt trigger using field-effect transistors only
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C11/00—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor
    • G11C11/21—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements
    • G11C11/34—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices
    • G11C11/40—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors
    • G11C11/401—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors forming cells needing refreshing or charge regeneration, i.e. dynamic cells
    • G11C11/402—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors forming cells needing refreshing or charge regeneration, i.e. dynamic cells with charge regeneration individual to each memory cell, i.e. internal refresh
    • G11C11/4023—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors forming cells needing refreshing or charge regeneration, i.e. dynamic cells with charge regeneration individual to each memory cell, i.e. internal refresh using field effect transistors
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C11/00—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor
    • G11C11/21—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements
    • G11C11/34—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices
    • G11C11/40—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors
    • G11C11/401—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors forming cells needing refreshing or charge regeneration, i.e. dynamic cells
    • G11C11/4063—Auxiliary circuits, e.g. for addressing, decoding, driving, writing, sensing or timing
    • G11C11/407—Auxiliary circuits, e.g. for addressing, decoding, driving, writing, sensing or timing for memory cells of the field-effect type
    • G11C11/408—Address circuits
    • G11C11/4087—Address decoders, e.g. bit - or word line decoders; Multiple line decoders

Landscapes

  • Engineering & Computer Science (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Computer Hardware Design (AREA)
  • Dram (AREA)
  • Static Random-Access Memory (AREA)
  • Logic Circuits (AREA)
  • Semiconductor Integrated Circuits (AREA)
  • Read Only Memory (AREA)
JP12431873A 1972-11-03 1973-11-05 Expired JPS5516353B2 (ja)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
US30342072A 1972-11-03 1972-11-03

Publications (2)

Publication Number Publication Date
JPS4996640A true JPS4996640A (ja) 1974-09-12
JPS5516353B2 JPS5516353B2 (ja) 1980-05-01

Family

ID=23171996

Family Applications (1)

Application Number Title Priority Date Filing Date
JP12431873A Expired JPS5516353B2 (ja) 1972-11-03 1973-11-05

Country Status (2)

Country Link
US (1) US3795898A (ja)
JP (1) JPS5516353B2 (ja)

Cited By (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5130470A (ja) * 1974-09-09 1976-03-15 Nippon Electric Co
JPS51122343A (en) * 1975-04-21 1976-10-26 Intel Corp High density mos memory array
JPS51142925A (en) * 1975-06-04 1976-12-08 Hitachi Ltd Address buffer circuit
JPS52110530A (en) * 1976-03-12 1977-09-16 Toshiba Corp Mos random access memory
JPS52122059A (en) * 1974-10-08 1977-10-13 Mostek Corp Phase inverting stage input circuit
JPS52139329A (en) * 1976-05-17 1977-11-21 Toshiba Corp Circuit ensuring high-speed signal level change

Families Citing this family (34)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US3868657A (en) * 1972-08-28 1975-02-25 Motorola Inc Peripheral circuitry for dynamic mos rams
JPS4971860A (ja) * 1972-11-10 1974-07-11
US3986054A (en) * 1973-10-11 1976-10-12 International Business Machines Corporation High voltage integrated driver circuit
JPS5088944A (ja) * 1973-12-10 1975-07-17
US3902082A (en) * 1974-02-11 1975-08-26 Mostek Corp Dynamic data input latch and decoder
US3976892A (en) * 1974-07-01 1976-08-24 Motorola, Inc. Pre-conditioning circuits for MOS integrated circuits
US3967252A (en) * 1974-10-03 1976-06-29 Mostek Corporation Sense AMP for random access memory
US4087704A (en) * 1974-11-04 1978-05-02 Intel Corporation Sequential timing circuitry for a semiconductor memory
US4030083A (en) * 1975-04-04 1977-06-14 Bell Telephone Laboratories, Incorporated Self-refreshed capacitor memory cell
US4168537A (en) * 1975-05-02 1979-09-18 Tokyo Shibaura Electric Co., Ltd. Nonvolatile memory system enabling nonvolatile data transfer during power on
US4045785A (en) * 1975-11-05 1977-08-30 American Microsystems, Inc. Sense amplifier for static memory device
US4030084A (en) * 1975-11-28 1977-06-14 Honeywell Information Systems, Inc. Substrate bias voltage generated from refresh oscillator
US4477739A (en) * 1975-12-29 1984-10-16 Mostek Corporation MOSFET Random access memory chip
SU928405A1 (ru) * 1976-08-05 1982-05-15 Предприятие П/Я Р-6429 Усилитель считывани дл интегрального запоминающего устройства
DE2641693C2 (de) * 1976-09-16 1978-11-16 Siemens Ag, 1000 Berlin Und 8000 Muenchen Decodierschaltung mit MOS-Transistoren
US4133611A (en) * 1977-07-08 1979-01-09 Xerox Corporation Two-page interweaved random access memory configuration
US4146802A (en) * 1977-09-19 1979-03-27 Motorola, Inc. Self latching buffer
JPS5493335A (en) * 1977-12-30 1979-07-24 Fujitsu Ltd Decoder circuit
US4216395A (en) * 1978-01-16 1980-08-05 Bell Telephone Laboratories, Incorporated Detector circuitry
US4214175A (en) * 1978-09-22 1980-07-22 Fairchild Camera And Instrument Corporation High-performance address buffer for random-access memory
US4195356A (en) * 1978-11-16 1980-03-25 Electronic Memories And Magnetics Corporation Sense line termination circuit for semiconductor memory systems
DE2855118C2 (de) * 1978-12-20 1981-03-26 IBM Deutschland GmbH, 70569 Stuttgart Dynamischer FET-Speicher
US4193127A (en) * 1979-01-02 1980-03-11 International Business Machines Corporation Simultaneous read/write cell
US4422162A (en) * 1980-10-01 1983-12-20 Motorola, Inc. Non-dissipative memory system
JPS5774886A (en) * 1980-10-29 1982-05-11 Toshiba Corp Semiconductor integrated circuit device
EP0055594B1 (en) * 1980-12-23 1988-07-13 Fujitsu Limited Electrically programmable non-volatile semiconductor memory device
US4441039A (en) * 1981-11-20 1984-04-03 International Business Machines Corporation Input buffer circuit for semiconductor memory
US4595978A (en) * 1982-09-30 1986-06-17 Automatic Power, Inc. Programmable control circuit for controlling the on-off operation of an indicator device
JPS62247621A (ja) * 1986-11-28 1987-10-28 Nec Corp トランジスタ回路
JPH03231320A (ja) * 1990-02-06 1991-10-15 Mitsubishi Electric Corp マイクロコンピュータシステム
KR0145852B1 (ko) * 1995-04-14 1998-11-02 김광호 반도체메모리소자의 어드레스버퍼
US5835401A (en) * 1996-12-05 1998-11-10 Cypress Semiconductor Corporation Dram with hidden refresh
GB2376781B (en) 2001-03-29 2003-09-24 Mentor Graphics Corp Memory device
DE102004016155B3 (de) * 2004-04-01 2006-05-24 Infineon Technologies Ag Kraftsensor mit organischen Feldeffekttransistoren, darauf beruhender Drucksensor, Positionssensor und Fingerabdrucksensor

Citations (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US1288285A (en) * 1917-03-31 1918-12-17 James F Taylor Wheel.
US3541531A (en) * 1967-02-07 1970-11-17 Bell Telephone Labor Inc Semiconductive memory array wherein operating power is supplied via information paths
US3600609A (en) * 1970-02-03 1971-08-17 Shell Oil Co Igfet read amplifier for double-rail memory systems
US3662356A (en) * 1970-08-28 1972-05-09 Gen Electric Integrated circuit bistable memory cell using charge-pumped devices

Family Cites Families (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US3680061A (en) * 1970-04-30 1972-07-25 Ncr Co Integrated circuit bipolar random access memory system with low stand-by power consumption
US3740730A (en) * 1971-06-30 1973-06-19 Ibm Latchable decoder driver and memory array
US3757310A (en) * 1972-01-03 1973-09-04 Honeywell Inf Systems Memory address selction apparatus including isolation circuits

Patent Citations (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US1288285A (en) * 1917-03-31 1918-12-17 James F Taylor Wheel.
US3541531A (en) * 1967-02-07 1970-11-17 Bell Telephone Labor Inc Semiconductive memory array wherein operating power is supplied via information paths
US3600609A (en) * 1970-02-03 1971-08-17 Shell Oil Co Igfet read amplifier for double-rail memory systems
US3662356A (en) * 1970-08-28 1972-05-09 Gen Electric Integrated circuit bistable memory cell using charge-pumped devices

Cited By (9)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5130470A (ja) * 1974-09-09 1976-03-15 Nippon Electric Co
JPS5528138B2 (ja) * 1974-09-09 1980-07-25
JPS52122059A (en) * 1974-10-08 1977-10-13 Mostek Corp Phase inverting stage input circuit
JPS51122343A (en) * 1975-04-21 1976-10-26 Intel Corp High density mos memory array
JPS51142925A (en) * 1975-06-04 1976-12-08 Hitachi Ltd Address buffer circuit
JPS5649394B2 (ja) * 1975-06-04 1981-11-21
JPS52110530A (en) * 1976-03-12 1977-09-16 Toshiba Corp Mos random access memory
JPS5643556B2 (ja) * 1976-03-12 1981-10-13
JPS52139329A (en) * 1976-05-17 1977-11-21 Toshiba Corp Circuit ensuring high-speed signal level change

Also Published As

Publication number Publication date
US3795898A (en) 1974-03-05
DE2354734B2 (de) 1977-01-27
JPS5516353B2 (ja) 1980-05-01
DE2354734A1 (de) 1974-05-09

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