JPS5210568A - Method of manufacturing multilayered printed wiring substrate - Google Patents
Method of manufacturing multilayered printed wiring substrateInfo
- Publication number
- JPS5210568A JPS5210568A JP406775A JP406775A JPS5210568A JP S5210568 A JPS5210568 A JP S5210568A JP 406775 A JP406775 A JP 406775A JP 406775 A JP406775 A JP 406775A JP S5210568 A JPS5210568 A JP S5210568A
- Authority
- JP
- Japan
- Prior art keywords
- printed wiring
- wiring substrate
- multilayered printed
- manufacturing multilayered
- manufacturing
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
Classifications
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K3/00—Apparatus or processes for manufacturing printed circuits
- H05K3/46—Manufacturing multilayer circuits
- H05K3/4644—Manufacturing multilayer circuits by building the multilayer layer by layer, i.e. build-up multilayer circuits
- H05K3/4664—Adding a circuit layer by thick film methods, e.g. printing techniques or by other techniques for making conductive patterns by using pastes, inks or powders
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K1/00—Printed circuits
- H05K1/02—Details
- H05K1/09—Use of materials for the conductive, e.g. metallic pattern
- H05K1/092—Dispersed materials, e.g. conductive pastes or inks
- H05K1/095—Dispersed materials, e.g. conductive pastes or inks for polymer thick films, i.e. having a permanent organic polymeric binder
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K2201/00—Indexing scheme relating to printed circuits covered by H05K1/00
- H05K2201/03—Conductive materials
- H05K2201/0332—Structure of the conductor
- H05K2201/0335—Layered conductors or foils
- H05K2201/0347—Overplating, e.g. for reinforcing conductors or bumps; Plating over filled vias
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K3/00—Apparatus or processes for manufacturing printed circuits
- H05K3/0011—Working of insulating substrates or insulating layers
- H05K3/0017—Etching of the substrate by chemical or physical means
- H05K3/0023—Etching of the substrate by chemical or physical means by exposure and development of a photosensitive insulating layer
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K3/00—Apparatus or processes for manufacturing printed circuits
- H05K3/22—Secondary treatment of printed circuits
- H05K3/28—Applying non-metallic protective coatings
Landscapes
- Engineering & Computer Science (AREA)
- Manufacturing & Machinery (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Production Of Multi-Layered Print Wiring Board (AREA)
- Laminated Bodies (AREA)
Priority Applications (5)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP406775A JPS5210568A (en) | 1974-12-28 | 1974-12-28 | Method of manufacturing multilayered printed wiring substrate |
DE19752558367 DE2558367A1 (de) | 1974-12-28 | 1975-12-23 | Verfahren zur herstellung einer mehrschichtigen gedruckten schaltung |
FR7539660A FR2296347A1 (fr) | 1974-12-28 | 1975-12-24 | Procede pour fabriquer des panneaux de circuits imprimes a couches multiples |
NL7515090A NL7515090A (nl) | 1974-12-28 | 1975-12-24 | Werkwijze om neerlaags gedrukte bedradingen te vervaardigen. |
DE19752558744 DE2558744A1 (de) | 1974-12-28 | 1975-12-24 | Verfahren zur herstellung einer mehrschichtigen gedruckten schaltung |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP406775A JPS5210568A (en) | 1974-12-28 | 1974-12-28 | Method of manufacturing multilayered printed wiring substrate |
Publications (1)
Publication Number | Publication Date |
---|---|
JPS5210568A true JPS5210568A (en) | 1977-01-26 |
Family
ID=11574472
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP406775A Pending JPS5210568A (en) | 1974-12-28 | 1974-12-28 | Method of manufacturing multilayered printed wiring substrate |
Country Status (4)
Country | Link |
---|---|
JP (1) | JPS5210568A (nl) |
DE (2) | DE2558367A1 (nl) |
FR (1) | FR2296347A1 (nl) |
NL (1) | NL7515090A (nl) |
Cited By (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS63272097A (ja) * | 1987-04-30 | 1988-11-09 | Mitsui Mining & Smelting Co Ltd | 多層回路基板の製造法 |
CN107484358A (zh) * | 2017-07-26 | 2017-12-15 | 江门崇达电路技术有限公司 | 一种无压合无钻孔的多层线路板制作方法 |
Families Citing this family (19)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
DE3006117C2 (de) * | 1980-02-19 | 1981-11-26 | Ruwel-Werke Spezialfabrik für Leiterplatten GmbH, 4170 Geldern | Verfahren zum Herstellen von Leiterplatten mit mindestens zwei Leiterzugebenen |
US4416914A (en) * | 1980-12-29 | 1983-11-22 | General Electric Company | Electrical conductors arranged in multiple layers and preparation thereof |
EP0062084A1 (en) * | 1981-04-06 | 1982-10-13 | Herbert Irwin Schachter | Multi-level circuit and method of making same |
DE3137279C2 (de) * | 1981-09-18 | 1986-12-11 | Wilhelm Ruf KG, 8000 München | Verfahren zur Herstellung von Mehrlagen-Leiterplatten sowie nach dem Verfahren hergestellte mehrlagige Leiterplatte |
DE3407799A1 (de) * | 1984-03-02 | 1985-09-05 | Brown, Boveri & Cie Ag, 6800 Mannheim | Verfahren zur herstellung einer multilayer-hybridschaltung |
US4566186A (en) * | 1984-06-29 | 1986-01-28 | Tektronix, Inc. | Multilayer interconnect circuitry using photoimageable dielectric |
JPS6276600A (ja) * | 1985-09-29 | 1987-04-08 | 株式会社 アサヒ化学研究所 | 基板に導電回路を形成する方法 |
US4735676A (en) * | 1986-01-14 | 1988-04-05 | Asahi Chemical Research Laboratory Co., Ltd. | Method for forming electric circuits on a base board |
US4724040A (en) * | 1986-01-14 | 1988-02-09 | Asahi Chemical Research Laboratory Co., Ltd. | Method for producing electric circuits on a base boad |
CA1261481A (en) * | 1986-03-13 | 1989-09-26 | Kazumasa Eguchi | Printed circuit board capable of preventing electromagnetic interference |
AU8107987A (en) * | 1986-09-30 | 1988-04-21 | Wilde Membran Impulstechnik G.m.b.H. | Electrically conductive structure with applied metallization |
DE3733002A1 (de) * | 1986-09-30 | 1988-04-07 | Wilde Membran Impuls Tech | Additiv metallisierte elektrisch leitfaehige struktur |
US4837050A (en) * | 1986-09-30 | 1989-06-06 | Asahi Chemical Research Laboratory Co., Ltd. | Method for producing electrically conductive circuits on a base board |
DE3704497A1 (de) * | 1987-02-13 | 1988-08-25 | Aristo Graphic Systeme | Verfahren zur herstellung eines digitalisiertabletts |
DE3704498A1 (de) * | 1987-02-13 | 1988-08-25 | Aristo Graphic Systeme | Verfahren zur herstellung eines digitalisiertabletts |
DE3741918A1 (de) * | 1987-12-10 | 1989-06-22 | Heino Pachschwoell | Verfahren zur herstellung einer elektronischen schaltungsvorrichtung |
KR900005308B1 (ko) * | 1987-12-31 | 1990-07-27 | 정풍물산 주식회사 | 인쇄회로기판과 그의 제조방법 |
JPH0682926B2 (ja) * | 1988-04-22 | 1994-10-19 | 日本電気株式会社 | 多層配線基板の製造方法 |
DE68913941T2 (de) * | 1988-11-29 | 1994-10-20 | Nippon Cmk Kk | Verfahren zur Herstellung einer Leiterplatte. |
Citations (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS4878470A (nl) * | 1972-01-28 | 1973-10-22 |
-
1974
- 1974-12-28 JP JP406775A patent/JPS5210568A/ja active Pending
-
1975
- 1975-12-23 DE DE19752558367 patent/DE2558367A1/de active Pending
- 1975-12-24 NL NL7515090A patent/NL7515090A/nl not_active Application Discontinuation
- 1975-12-24 FR FR7539660A patent/FR2296347A1/fr not_active Withdrawn
- 1975-12-24 DE DE19752558744 patent/DE2558744A1/de active Pending
Patent Citations (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS4878470A (nl) * | 1972-01-28 | 1973-10-22 |
Cited By (3)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS63272097A (ja) * | 1987-04-30 | 1988-11-09 | Mitsui Mining & Smelting Co Ltd | 多層回路基板の製造法 |
CN107484358A (zh) * | 2017-07-26 | 2017-12-15 | 江门崇达电路技术有限公司 | 一种无压合无钻孔的多层线路板制作方法 |
CN107484358B (zh) * | 2017-07-26 | 2019-06-21 | 江门崇达电路技术有限公司 | 一种无压合无钻孔的多层线路板制作方法 |
Also Published As
Publication number | Publication date |
---|---|
NL7515090A (nl) | 1976-06-30 |
FR2296347A1 (fr) | 1976-07-23 |
DE2558744A1 (de) | 1976-07-01 |
DE2558367A1 (de) | 1976-07-08 |
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