JPS51134570A - Semiconductor circuit unit package manufacturing process - Google Patents
Semiconductor circuit unit package manufacturing processInfo
- Publication number
- JPS51134570A JPS51134570A JP50058724A JP5872475A JPS51134570A JP S51134570 A JPS51134570 A JP S51134570A JP 50058724 A JP50058724 A JP 50058724A JP 5872475 A JP5872475 A JP 5872475A JP S51134570 A JPS51134570 A JP S51134570A
- Authority
- JP
- Japan
- Prior art keywords
- circuit unit
- unit package
- manufacturing process
- semiconductor circuit
- package manufacturing
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Granted
Links
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
- H01L2224/4805—Shape
- H01L2224/4809—Loop shape
- H01L2224/48091—Arched
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
- H01L2224/481—Disposition
- H01L2224/48151—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
- H01L2224/48221—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
- H01L2224/48225—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
- H01L2224/48227—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation connecting the wire to a bond pad of the item
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/15—Details of package parts other than the semiconductor or other solid state devices to be connected
- H01L2924/161—Cap
- H01L2924/1615—Shape
- H01L2924/16152—Cap comprising a cavity for hosting the device, e.g. U-shaped cap
Landscapes
- Lead Frames For Integrated Circuits (AREA)
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP50058724A JPS51134570A (en) | 1975-05-19 | 1975-05-19 | Semiconductor circuit unit package manufacturing process |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP50058724A JPS51134570A (en) | 1975-05-19 | 1975-05-19 | Semiconductor circuit unit package manufacturing process |
Publications (2)
Publication Number | Publication Date |
---|---|
JPS51134570A true JPS51134570A (en) | 1976-11-22 |
JPS5430875B2 JPS5430875B2 (GUID-C5D7CC26-194C-43D0-91A1-9AE8C70A9BFF.html) | 1979-10-03 |
Family
ID=13092438
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP50058724A Granted JPS51134570A (en) | 1975-05-19 | 1975-05-19 | Semiconductor circuit unit package manufacturing process |
Country Status (1)
Country | Link |
---|---|
JP (1) | JPS51134570A (GUID-C5D7CC26-194C-43D0-91A1-9AE8C70A9BFF.html) |
-
1975
- 1975-05-19 JP JP50058724A patent/JPS51134570A/ja active Granted
Also Published As
Publication number | Publication date |
---|---|
JPS5430875B2 (GUID-C5D7CC26-194C-43D0-91A1-9AE8C70A9BFF.html) | 1979-10-03 |
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