JPH11250408A5 - - Google Patents

Info

Publication number
JPH11250408A5
JPH11250408A5 JP1998046610A JP4661098A JPH11250408A5 JP H11250408 A5 JPH11250408 A5 JP H11250408A5 JP 1998046610 A JP1998046610 A JP 1998046610A JP 4661098 A JP4661098 A JP 4661098A JP H11250408 A5 JPH11250408 A5 JP H11250408A5
Authority
JP
Japan
Prior art keywords
delay
delay line
signal
value
output
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Withdrawn
Application number
JP1998046610A
Other languages
English (en)
Japanese (ja)
Other versions
JPH11250408A (ja
Filing date
Publication date
Application filed filed Critical
Priority to JP10046610A priority Critical patent/JPH11250408A/ja
Priority claimed from JP10046610A external-priority patent/JPH11250408A/ja
Priority to US09/258,253 priority patent/US6127869A/en
Publication of JPH11250408A publication Critical patent/JPH11250408A/ja
Publication of JPH11250408A5 publication Critical patent/JPH11250408A5/ja
Withdrawn legal-status Critical Current

Links

JP10046610A 1998-02-27 1998-02-27 遅延量校正回路及び方法 Withdrawn JPH11250408A (ja)

Priority Applications (2)

Application Number Priority Date Filing Date Title
JP10046610A JPH11250408A (ja) 1998-02-27 1998-02-27 遅延量校正回路及び方法
US09/258,253 US6127869A (en) 1998-02-27 1999-02-25 Circuit for calibrating delay lines and method

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP10046610A JPH11250408A (ja) 1998-02-27 1998-02-27 遅延量校正回路及び方法

Publications (2)

Publication Number Publication Date
JPH11250408A JPH11250408A (ja) 1999-09-17
JPH11250408A5 true JPH11250408A5 (enExample) 2005-08-25

Family

ID=12752084

Family Applications (1)

Application Number Title Priority Date Filing Date
JP10046610A Withdrawn JPH11250408A (ja) 1998-02-27 1998-02-27 遅延量校正回路及び方法

Country Status (2)

Country Link
US (1) US6127869A (enExample)
JP (1) JPH11250408A (enExample)

Families Citing this family (10)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
KR100317317B1 (ko) * 1998-12-31 2002-01-16 김영환 반도체입력장치의셋업/홀드타임제어회로
JP3870333B2 (ja) * 2000-11-30 2007-01-17 富士通株式会社 磁気記録再生装置および磁気記録再生用ｌｓｉ
DE10111439A1 (de) * 2001-03-09 2002-09-26 Infineon Technologies Ag Signalverzögerungsschaltung
TWI240919B (en) * 2003-07-04 2005-10-01 Mediatek Inc Write signals control circuit in a disk drive
DE10332008B4 (de) * 2003-07-14 2006-08-10 Infineon Technologies Ag Elektrische Schaltung sowie Verfahren zum Testen von elektronischen Bauteilen
US7157952B2 (en) * 2004-08-20 2007-01-02 L-3 Integrated Systems Company Systems and methods for implementing delay line circuitry
US20060176095A1 (en) * 2005-02-09 2006-08-10 International Business Machines Corporation Cycle staging latch with dual phase dynamic outputs for hit logic compare
US7332983B2 (en) * 2005-10-31 2008-02-19 Hewlett-Packard Development Company, L.P. Tunable delay line using selectively connected grounding means
US7378831B1 (en) * 2007-01-18 2008-05-27 International Business Machines Corporation System and method for determining a delay time interval of components
US8306796B2 (en) * 2007-08-15 2012-11-06 The Boeing Company Pyrotechnic shock simulation system and method

Family Cites Families (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4684897A (en) * 1984-01-03 1987-08-04 Raytheon Company Frequency correction apparatus
US4780667A (en) * 1985-06-25 1988-10-25 Hewlett-Packard Company Magnetostatic wave delay line discriminator with automatic quadrature setting and automatic calibration
US5317219A (en) * 1991-09-30 1994-05-31 Data Delay Devices, Inc. Compensated digital delay circuit

Similar Documents

Publication Publication Date Title
EP2207264A1 (en) Analogue to digital converting
WO2004017079A3 (en) Method and apparatus for obtaining power computation parameters
JPH11250408A5 (enExample)
JPH11250407A5 (enExample)
US4843390A (en) Oversampled A/D converter having digital error correction
CN103178779B (zh) 一种具有幅度补偿功能的信号发生器及其方法
AU612574B2 (en) Gain switching device with reduced error for watt meter
AU2003201703A1 (en) Method and apparatus for alias suppressed digitizing of high frequency analog signals
JPH06506091A (ja) ディジタル／アナログ信号変換方法および装置
US5933013A (en) Calibration circuit for calibrating frequency characteristics of an AC/DC converter
JPH0868809A (ja) 電圧−抵抗合成装置
JP5023339B2 (ja) パルス幅制御信号発生回路、電力変換制御回路および電力変換制御用ｌｓｉ
US6304202B1 (en) Delay correction system and method for a voltage channel in a sampled data measurement system
CN110658715B (zh) 一种基于抽头动态可调进位链细时间内插延时线的tdc电路
JPH09181604A (ja) 半導体集積回路装置およびその雑音低減方法
US4783632A (en) Multi-arm frequency sweep generator
US5374929A (en) DA converter which combines output of a plurality of low pass filters selectively enabled and disabled by respective electronic switches
CN118300579B (zh) 一种触发式信号源、信号发生器和多信号源同步方法
JPH08327681A (ja) 雑音検出回路及びその制御方法及び雑音低減回路
JP2000138585A (ja) 出力振幅調整回路
SU815926A1 (ru) Устройство автоматической настройкигАРМОНичЕСКОгО KOPPEKTOPA
JP3373742B2 (ja) Ａｃ／ｄｃ変換装置及び方法
US20060061394A1 (en) Quasi-peak detector with inductor
JPH05211442A (ja) アナログ・ディジタル変換器の試験方法
JP2548418B2 (ja) 遅延装置