JPH1098108A5 - - Google Patents
Info
- Publication number
- JPH1098108A5 JPH1098108A5 JP1996251765A JP25176596A JPH1098108A5 JP H1098108 A5 JPH1098108 A5 JP H1098108A5 JP 1996251765 A JP1996251765 A JP 1996251765A JP 25176596 A JP25176596 A JP 25176596A JP H1098108 A5 JPH1098108 A5 JP H1098108A5
- Authority
- JP
- Japan
- Prior art keywords
- insulating layer
- wiring
- region
- semiconductor device
- transistors
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Granted
Links
Priority Applications (4)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP25176596A JP3962441B2 (ja) | 1996-09-24 | 1996-09-24 | 半導体装置 |
| US08/859,036 US5903019A (en) | 1996-09-24 | 1997-05-20 | Semiconductor device having a plurality of input/output cell areas with reduced pitches therebetween |
| KR1019970023724A KR100260345B1 (ko) | 1996-09-24 | 1997-06-10 | 반도체 장치 |
| TW086106802A TW337614B (en) | 1996-09-24 | 1997-09-27 | A semiconductor device |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP25176596A JP3962441B2 (ja) | 1996-09-24 | 1996-09-24 | 半導体装置 |
Publications (3)
| Publication Number | Publication Date |
|---|---|
| JPH1098108A JPH1098108A (ja) | 1998-04-14 |
| JPH1098108A5 true JPH1098108A5 (GUID-C5D7CC26-194C-43D0-91A1-9AE8C70A9BFF.html) | 2004-07-22 |
| JP3962441B2 JP3962441B2 (ja) | 2007-08-22 |
Family
ID=17227590
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP25176596A Expired - Lifetime JP3962441B2 (ja) | 1996-09-24 | 1996-09-24 | 半導体装置 |
Country Status (4)
Families Citing this family (9)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JP3989038B2 (ja) * | 1996-04-17 | 2007-10-10 | 株式会社ルネサステクノロジ | 半導体集積回路装置 |
| JP3914649B2 (ja) * | 1999-02-10 | 2007-05-16 | 株式会社東芝 | 半導体装置 |
| US6696712B1 (en) * | 2000-08-11 | 2004-02-24 | Seiko Epson Corporation | Semicustom IC having adjacent macrocells |
| JP2001339047A (ja) * | 2000-05-29 | 2001-12-07 | Matsushita Electric Ind Co Ltd | 半導体装置 |
| JP4798881B2 (ja) * | 2001-06-18 | 2011-10-19 | 富士通セミコンダクター株式会社 | 半導体集積回路装置 |
| US7217966B1 (en) * | 2005-02-18 | 2007-05-15 | National Semiconductor Corporation | Self-protecting transistor array |
| US7594198B2 (en) * | 2007-02-27 | 2009-09-22 | Taiwan Semiconductor Manufacturing Co., Ltd. | Ultra fine pitch I/O design for microchips |
| US9972624B2 (en) | 2013-08-23 | 2018-05-15 | Qualcomm Incorporated | Layout construction for addressing electromigration |
| US9786663B2 (en) * | 2013-08-23 | 2017-10-10 | Qualcomm Incorporated | Layout construction for addressing electromigration |
Family Cites Families (6)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US5300796A (en) * | 1988-06-29 | 1994-04-05 | Hitachi, Ltd. | Semiconductor device having an internal cell array region and a peripheral region surrounding the internal cell array for providing input/output basic cells |
| JPH02152254A (ja) * | 1988-12-02 | 1990-06-12 | Mitsubishi Electric Corp | 半導体集積回路装置 |
| JP3185271B2 (ja) * | 1991-09-13 | 2001-07-09 | 日本電気株式会社 | 半導体集積回路 |
| JP3228583B2 (ja) * | 1992-03-31 | 2001-11-12 | 株式会社東芝 | 半導体集積回路装置 |
| JP2822781B2 (ja) * | 1992-06-11 | 1998-11-11 | 三菱電機株式会社 | マスタスライス方式半導体集積回路装置 |
| JPH06326194A (ja) * | 1993-05-17 | 1994-11-25 | Mitsubishi Electric Corp | 半導体集積回路装置 |
-
1996
- 1996-09-24 JP JP25176596A patent/JP3962441B2/ja not_active Expired - Lifetime
-
1997
- 1997-05-20 US US08/859,036 patent/US5903019A/en not_active Expired - Lifetime
- 1997-06-10 KR KR1019970023724A patent/KR100260345B1/ko not_active Expired - Lifetime
- 1997-09-27 TW TW086106802A patent/TW337614B/zh not_active IP Right Cessation
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