JPH1056095A - Multilayer printed board and semiconductor device provided with it - Google Patents

Abstract

PROBLEM TO BE SOLVED: To enable a barrier layer and a coating layer out of a laminated conductive layer composed of a barrier layer, a coating layer, and a conductive main material layer on an insulating board to be lessened in thickness without deteriorating a semiconductor chip in adhesive properties or bonding properties. SOLUTION: A semiconductor device multilayer printed board 1 is equipped with a semiconductor chip mounting die pad 11 and a bonding pad 12 provided onto the surface of an insulating board 51 where an inner wiring 5 is formed and an electrode pad 13 formed on the rear of the insulating board 51, wherein the die pad 11, the bonding pad 12, and the electrode pad 11 are of laminated structure composed of a conductive main material layer 101, a barrier layer 102 of nickel or nickel alloy, and a coating layer 103 of palladium or palladium alloy successively laminated in this sequence. By this setup, a diffusion reaction is prevented from occurring between the coating layer 103, the conductive main material 101, and the barrier 102, and the barrier layer 102 and the coating layer 103 are reduced to an irreducible minimum in thickness.

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

The present invention relates to a multilayer printed circuit board for a semiconductor device and a semiconductor device using the multilayer printed circuit board, and more particularly to a multilayer printed circuit board used for a ball grid array type semiconductor device and a ball grid array using the same. Semiconductor device.

[0002]

2. Description of the Related Art As shown in FIG. 5, a multilayer printed circuit board 5 for a ball grid array type semiconductor device has a die pad 52 and a bonding pad 53 on the surface of an insulating substrate 51. An electrode pad 54 is provided on the back surface of 51. In addition, a wiring (internal wiring 55) is provided inside the insulating substrate 51, and a through hole 56 that connects the back side and the front side thereof is provided. The inner wall of the through hole 56 and the insulating substrate 5
1, the die pad 52, the bonding pad 53, the electrode pad 54, and the internal wiring 55
(External wiring 57) are provided to connect the wirings to each other. Further, the die pad 52, the bonding pad 53 and the electrode pad 54 are exposed, and the through hole 56 is formed.
The solder resist 5 is covered with the external wiring 57 covered.
8 is formed.

The enlarged view in the figure is an enlarged view of a portion A, an A 'portion and an A "portion. As shown in FIG.
The conductive layers of the bonding pad 53 and the electrode pad 54 are formed by forming a barrier layer 50 made of nickel or a nickel alloy on a conductive main material layer 501 made of copper or a copper alloy.
2 and a coating layer 503 made of gold or a gold alloy is further laminated on the barrier layer 502.

As described above, the coating layer 5 made of gold or gold alloy is used.
By forming 03, corrosion resistance, bonding property, and die attachability in each of the above-mentioned power transmission layers are ensured.
Further, a barrier layer 502 made of nickel is formed on the coating layer 5.
Forming between the conductive main material layer 03 and the conductive main material layer 501 prevents the coating layer 503 from being diffused into the conductive main material layer 501 and lost.

A semiconductor device 6 using the multilayer printed circuit board 5 having the above-described configuration includes a semiconductor chip 62 die-bonded on a die pad 52 via a conductive adhesive 61 such as a silver paste, and an electrode pad 54. The semiconductor device includes a solder ball 63 formed thereon, and a wire 64 connected to the semiconductor chip 62 and the bonding pad 53. Then, the semiconductor chip 62, the wires 64 and the bonding pads 53 are covered with the sealing resin 65.

[0006]

The multilayer printed circuit board for a semiconductor device having the above structure and the semiconductor device using the multilayer printed circuit board have the following problems. That is, in the multilayer printed circuit board 5 shown in FIG.
In order to ensure the performance of the above, the thickness of the barrier layer 502 is set to 1
It is necessary to secure the barrier property of the barrier layer 502 by setting the thickness to at least μm. Further, the film thickness of the coating layer 503 is also set to 0.1.
By setting the thickness to 3 μm or more, it is necessary to prevent loss of the coating layer 503 due to a diffusion reaction between the coating layer 503 and the barrier layer 502.

However, when the thicknesses of the barrier layer 502 and the coating layer 503 are increased, the time required for forming each layer becomes longer, TAT decreases, and the economical efficiency decreases due to an increase in material costs. become.

Further, in the semiconductor device 6 using the above-mentioned multilayer printed board, an intermetallic compound is generated between the coating layer 503 constituting the surface of the electrode pad 54 and the solder ball 63 formed on the upper surface. Therefore, in order to secure the performance of the coating layer 503 as described above,
When the thickness of the intermetallic compound is increased, the thickness of the solder ball 63 and the electrode pad 54 is increased.
There is a problem in that the resistance value between the semiconductor devices increases, leading to a decrease in the reliability of the semiconductor device.

[0009]

SUMMARY OF THE INVENTION In order to solve the above-mentioned problems, the present invention has a die pad and a bonding pad for mounting a semiconductor chip on a surface of an insulating substrate having wiring formed therein. A multilayer printed circuit board for a semiconductor device having an electrode pad on a back surface of the insulating substrate, wherein the die pad, the bonding pad, and the electrode pad are formed of a barrier made of nickel or a nickel alloy on a conductive main material layer. A layer and a coating layer made of palladium or a palladium alloy are laminated in order from the lower layer.

In the above-mentioned multilayer printed circuit board, palladium or a palladium alloy constituting the coating layer is a material which does not easily undergo a diffusion reaction with the metal constituting the conductive main material layer such as copper and copper alloy. The required thickness of the barrier layer for preventing the reaction is reduced. With this,
Since the palladium and the palladium alloy hardly cause a diffusion reaction with nickel and the nickel alloy constituting the barrier layer, the required film thickness of the coating layer itself is also reduced. In addition, since the surfaces of the die pad, the bonding pad, and the electrode pad are covered with a coating layer made of palladium or a palladium alloy, the corrosion resistance of each conductive layer, the adhesiveness of the semiconductor chip on the die pad, and the wire bonding property on the bonding pad are impaired. It will not be.

In the multilayer printed board, an upper coating layer made of gold or a gold alloy may be laminated on the coating layer. In this case, the coating layer serves as a barrier layer, and a diffusion reaction between the upper coating layer and the conductive main material layer and the barrier layer is prevented. Further, the oxidation resistance and the solderability are increased by the upper coating layer, so that the required thickness of the coating layer is reduced.

Further, according to the present invention, there is provided a semiconductor device mounted on a die pad of a multilayer printed circuit board having the above-described structure, a solder ball formed on an electrode pad of the printed circuit board, and the semiconductor chip and the printed circuit board. And a wire connected to the bonding pad of the substrate.

In this semiconductor device, since the palladium or palladium alloy forming the coating layer hardly forms an intermetallic compound with the solder, the formation of the intermetallic compound with the solder ball on the electrode pad is difficult. Is prevented.

When a multilayer printed board having an upper coating layer formed on the coating layer is used, solderability is ensured by gold or a gold alloy constituting the upper coating layer. Since the required thickness of the upper coating layer is small, the thickness of the intermetallic compound formed between the upper coating layer made of gold or a gold alloy and the solder ball is small.

[0015]

DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS Hereinafter, embodiments of a multilayer printed board and a semiconductor device using the multilayer printed board according to the present invention will be described with reference to the drawings. The same components as those in the related art are denoted by the same reference numerals, and overlapping descriptions will be omitted.

FIG. 1 is a view for explaining an embodiment of a multilayer printed circuit board according to the present invention. First, an embodiment of a multilayer printed circuit board will be described with reference to FIG. The difference between the multilayer printed board 1 of the present embodiment and the multilayer printed board (5) described with reference to FIG. 5 in the related art lies in the configuration of the die pad 11, the bonding pad 12, and the electrode pad 13, and other configurations. Is similar.

The enlarged view in the figure is an enlarged view of a portion B, a portion B ′ and a portion B ″. As shown in this figure, the die pad 11, the bonding pad 12, and the electrode pad 13 in the multilayer printed circuit board 1 are A conductive main material layer 101 made of copper or a copper alloy, a barrier layer 102 made of nickel or a nickel alloy, and a coating layer 103 made of palladium or a palladium alloy are laminated on an insulating substrate 51 in order from the bottom.

The detailed structure of each of the above layers will be described in accordance with these film forming procedures. First, an insulating substrate 51 having an internal wiring 55 and a through hole 56 formed inside a substrate such as glass-epoxy is prepared. Then, the die pad 11, the bonding pad 12, the electrode pad 13, and the external wiring 57 on the front surface and the rear surface of the insulating substrate 51 are formed.
Is plated with an electroless plating method and then with an electrolytic plating method. Thus, the conductive main material layer 101 made of copper is formed into a pattern. The conductive main material layer 101 may be formed of a copper alloy, or may be formed only by an electroless plating method or an electrolytic plating method.

Next, a solder resist 58 is formed in such a manner that the portions where the die pads 11, the bonding pads 12 and the electrode pads 13 are formed are exposed, the through holes 56 are closed, and the exposed portions of the external wirings 57 are covered.

Thereafter, nickel plating is performed on the exposed surface of the conductive main material layer 101 by an electrolytic plating method. Thus, a barrier layer 102 made of nickel is formed on the conductive main material layer 101. This barrier layer 102
The thickness is about 0.5 μm or more. In addition, the barrier layer 10
2 may be formed of a nickel alloy.

Next, the barrier layer 1 is formed by electrolytic plating.
02 is subjected to palladium plating on the exposed surface. Thereby, the coating layer 10 made of palladium is formed on the barrier layer 102.
3 is formed. This coating layer 103 has a thickness of about 0.02 μm or more. Further, the coating layer 103 may be formed of a palladium alloy.

As described above, the conductive main material layer 101
The multilayer printed board 1 is formed by forming a die pad 11, a bonding pad 12, and an electrode pad 13 on an insulating substrate 51 by laminating a barrier layer 102 and a coating layer 103 in this order from the bottom.

In the multilayer printed board 1 having the above structure, palladium (including a palladium alloy) forming the coating layer 103 is unlikely to cause a diffusion reaction with copper (including a copper alloy) forming the conductive main material layer 101. Because it is a material,
The required minimum thickness of the barrier layer 102 for preventing this diffusion reaction can be reduced to 0.5 μm.
At the same time, since the palladium hardly causes a diffusion reaction with nickel (including a nickel alloy) constituting the barrier layer 102, the required minimum film thickness of the coating layer 103 itself is as small as 0.02 μm. This is the barrier layer 1
02, the required minimum thickness of the coating layer is 0.3 μm when only the coating layer made of gold or a gold alloy is characteristically formed on
It can be seen that the value is thinner than that of m.

In addition, since the surfaces of the die pad 11, the bonding pad 12, and the electrode pad 13 are covered with the coating layer 103 made of palladium,
3, the die pad 11 and the bonding pad 1
2 and the electrode pads 13 are secured, the adhesiveness of the semiconductor chip 62 on the die pad 11 and the wire bonding property on the bonding pad 12 are secured.

FIG. 2 is a diagram showing an embodiment of a semiconductor device using a multilayer printed circuit board. The difference between this semiconductor device 2 and the semiconductor device (6) described with reference to FIG. 5 in the prior art is that the semiconductor device 2 uses the multilayer printed circuit board 1 described with reference to FIG. Is similar.

In the semiconductor device 2 configured as described above,
Since the palladium forming the coating layer 103 is a metal that hardly forms an intermetallic compound with the solder, it is possible to prevent an increase in the resistance value between the electrode pad 13 and the solder ball 63 due to the formation of the intermetallic compound.

Next, FIG. 3 is a view for explaining another embodiment of the multilayer printed circuit board of the present invention. The difference between the multilayer printed board 3 shown in this figure and the multilayer printed board (1) described with reference to FIG. 1 lies in the configuration of the die pad 31, the bonding pad 32, and the electrode pad 33.

The enlarged view in the figure is an enlarged view of the portion C, the portion C 'and the portion C ". As shown in the enlarged view, these die pad 31, bonding pad 32 and electrode pad 3 are shown.
No. 3 has a configuration in which an upper layer 103 made of gold or a gold alloy is further provided on the upper layer 103 made of palladium. The other configuration is the same as that of the multilayer printed circuit board (1) described with reference to FIG.

To form the multilayer printed circuit board 3,
After forming up to the coating layer 103 in the same manner as in the multilayer printed board (1) described with reference to FIG. 1, gold plating is performed on the exposed surface of the coating layer 103 by an electrolytic plating method. Thereby, the upper coating layer 1 made of gold is formed on the coating layer 103.
03 is formed. The upper coating layer 103 has a thickness of 0.001
The thickness is set to about μm to 0.3 μm. Further, the upper coating layer 103 may be formed of a gold alloy.

In the multilayer printed circuit board 3 having the above-described structure, the coating layer 103 made of palladium is formed.
Becomes a barrier, and the upper coating layer 103 and the conductive main material layer 1
01 and the barrier layer 102 are prevented from diffusing. For this reason, in the case where only the coating layer made of gold or a gold alloy is formed on the barrier layer 102, the required minimum thickness of the coating layer is 0.3 μm, but the gold formed here is used. The required minimum thickness of the upper coating layer is 0.00
The thickness can be reduced to 1 μm.

FIG. 4 is a diagram showing an embodiment of a semiconductor device using a multilayer printed circuit board. This semiconductor device 4 is different from the semiconductor device (2) described with reference to FIG. 2 in that the multilayer printed circuit board 3 described with reference to FIG. 3 is used, and other configurations are the same. .

In the semiconductor device 4 configured as described above,
Upper coating layer 1 made of gold than conventional semiconductor device (6)
03 (the film layer in the prior art) can be set to be thin. Therefore, the intermetallic compound formed between the upper coating layer 103 and the solder ball 63 has a small thickness,
An increase in the resistance between the electrode pad 33 and the solder ball 63 can be suppressed. The oxidation resistance and solderability of the die pad 31, the bonding pad 32, and the electrode pad 33 are ensured by the upper coating layer 103 made of gold (including a gold alloy).

In each of the above embodiments, the barrier layer 10
2. The coating layer 103 and the upper coating layer 103 were formed by electrolytic plating. However, each of the above layers may be formed by, for example, an electroless plating method or another method.

In each of the above embodiments, the die pad 3
1. Only in the bonding pad 32 and the electrode pad 33, the barrier layer 102, the coating layer 103, and the upper coating layer 103 were provided on the conductive main material layer 101. However, if necessary, the conductive main material layer 10
A barrier layer 102, a coating layer 103, and an upper coating layer 103 may be provided on 1. In this case, solder resist 5
Before forming the conductive layer 8, a barrier layer 102, a coating layer 103, and an upper coating layer 103 are formed on the conductive main material layer 101.

[0035]

As described above, according to the multilayer printed circuit board for a semiconductor device of the present invention, the barrier layer and the coating layer are formed on the conductive layer on the insulating substrate without impairing the adhesiveness and bonding property of the semiconductor chip. It becomes possible to reduce the thickness. For this reason, it is possible to reduce the material cost for manufacturing the multilayer printed circuit board, thereby improving the economical efficiency, and to shorten the film forming time of each of the above-described layers, thereby improving the TAT. Further, according to the semiconductor device of the present invention, by forming the coating layer with palladium, which hardly forms an intermetallic compound with the solder, the formation of the intermetallic compound with the solder ball on the electrode pad This can prevent the resistance value from increasing and improve the reliability of the semiconductor device.

[Brief description of the drawings]

FIG. 1 is a diagram illustrating a configuration of a multilayer printed circuit board according to a first embodiment.

FIG. 2 is a diagram illustrating a configuration of the semiconductor device according to the first embodiment;

FIG. 3 is a diagram illustrating a configuration of a multilayer printed circuit board according to a second embodiment.

FIG. 4 is a diagram illustrating a configuration of a semiconductor device according to a second embodiment.

FIG. 5 is a diagram showing a configuration of a conventional multilayer printed circuit board and a semiconductor device.

[Explanation of symbols]

1,3 Multilayer printed circuit board 2,4 Semiconductor device 11,31 Die pad 12,32 Bonding pad 13,33 Electrode pad 51 Insulating substrate 55
Internal wiring 62 Semiconductor chip 63 Solder ball 64 Wire 101 Conductive main material layer 102 Barrier layer 10
3 Coating layer 104 Upper coating layer

Claims (4)

[Claims] 1. A semiconductor device having a die pad for mounting a semiconductor chip and a bonding pad on a surface of an insulating substrate having wiring formed therein, and having an electrode pad on a back surface of the insulating substrate. A multilayer printed circuit board, wherein the die pad, the bonding pad, and the electrode pad are formed by sequentially laminating a barrier layer made of nickel or a nickel alloy and a coating layer made of palladium or a palladium alloy on a conductive main material layer in order from the lower layer. A multilayer printed circuit board for a semiconductor device, comprising: 2. The multilayer printed circuit board for a semiconductor device according to claim 1, wherein an upper coating layer made of gold or a gold alloy is laminated on the coating layer. 3. A multilayer printed circuit board having a die pad and a bonding pad for mounting a semiconductor chip on a surface of an insulating substrate having wiring formed therein, and having electrode pads on a back surface of the insulating substrate. A semiconductor chip comprising: a semiconductor chip mounted on the die pad; a solder ball formed on the electrode pad; and a wire connected to the semiconductor chip and the bonding pad. A semiconductor device comprising: a bonding pad and an electrode pad in which a barrier layer made of nickel or a nickel alloy and a coating layer made of palladium or a palladium alloy are sequentially laminated on a conductive main material layer from a lower layer. 4. The semiconductor device according to claim 3, wherein an upper coating layer made of gold or a gold alloy is laminated on the coating layer.