JPH09330991A - Leadless ceramic multilayered substrate - Google Patents

Abstract

PROBLEM TO BE SOLVED: To prevent the occurrence of a nonconducting state which occurs when a metal is eroded by solder at the time of mounting and connecting a leadless ceramic multilayered substrate on and to a device. SOLUTION: When soldering 4 is performed at the corner edge section of a substrate 1 between a rear-surface pad 12 and an open through hole 11 on the side face of a through hole 11, the hole 11 is eroded by the solder 4, but, since the pad 12 is electrically connected to the hole through a via hole 15 and a wiring layer 16 in the substrate 1, the electrical connection between the pad 12 and hole 11 can be maintained even when disconnection occurs at the edge of the substrate 11 due to the erosion.

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a leadless ceramic multilayer substrate, and more particularly, to a leadless ceramic multilayer substrate for a power amplifier multi-chip integrated circuit (MCIC) used in a communication device such as a mobile phone which requires miniaturization. It is about.

[0002]

2. Description of the Related Art A power amplifier MCIC used in a mobile phone or the like is required to have a smaller package as well as a lower voltage and lower power consumption. There is leadless as one means to meet this demand. 2A and 2B are external views of a leadless type MCIC using a ceramic multilayer substrate. FIG. 2A is a top perspective view and FIG. 2B is a rear perspective view.

In FIG. 2, a plurality of pads 12 and a ground metal layer 14 are formed on the back surface (one main surface) of the leadless multi-layer substrate 1. These pads 12 and ground metal layer 14 are respectively formed. Correspondingly, an open through hole (semi-cylindrical groove) for electrical connection along the side surface 1
1, 13 are provided. In addition, 2 is a top cover.

As can be seen from FIG. 2, the conventional leads, which are formed so as to project from the substrate, are eliminated to achieve miniaturization.

FIG. 3 is a perspective view of the leadless multilayer ceramic substrate 1 as seen through the inside from the side surface. In this example, a total of 5 layers including the ground metal layer 14 are included.
It is a ceramic substrate having a layered structure, and these interlayer connections are made through via holes 15.

A method of connecting to an external interface in a leadless type substrate without such a lead will be described. As shown in FIG. 4, the leadless MCIC is mounted on the component mounting surface of the external interface (device) 3.
, So that the back side is placed. And MC
Each open hole 11 on the side surface of the IC 1 is soldered 4 to electrically connect to a corresponding circuit portion on the external interface 3.

As described above, the main component of electrical conduction between the substrate 1 and the external interface section 3 is the soldering 4 of the open through hole 11, and therefore the open through hole 11 can be soldered. Is metalized like this. Silver palladium (AgPd) is used as the metal in this case.

[0008]

FIG. 5 shows an enlarged view of the edge portion of the substrate 1 which is the circled portion in FIG. The electrical connection between the open through hole 11 and the back surface pad 12 is made with a silver-palladium metal layer on the outer peripheral surface of the substrate, as shown in FIG. Focusing on this, it can be seen that this edge portion (corner) is the thinnest.

With such a structure, the soldering 4 for electrical connection is performed. The metal of this portion, silver palladium, has a property of being particularly apt to be eroded by the solder. Therefore, if corrosion occurs in the thin metal portion of the substrate edge portion, disconnection is likely to occur in that portion, and there is a risk of electrical failure.

The erosion effect will be described in detail below. When the metal reacts with the solder to form an alloy (FIG. 5B)
5), the phenomenon of not adhering to the interlayer insulator (ceramic) of the multilayer substrate occurs, and this state can be said to be excessive erosion of the solder to the metal.

Factors that promote excessive erosion when reacting the metal adhered to the insulator and the molten solder will be considered from the following two points.

Regarding metal surface: Factor A: Kind of metal (metal that easily reacts with solder) Factor B: Large amount of solder unsuitable for reaction ability of metal Regarding back surface of insulator; Factor A: Adhesion method between insulator and metal And adhesive strength Factor B: Adhesive ability between an insulator and an alloy.

The countermeasures against the above erosion promoting factors are shown below.
However, since it is difficult to artificially operate the factor-B, considering the factors-A, -B, and -A, "selection of metal", "selection of appropriate amount of solder", and "metal" are considered. And the selection of the method of adhering the insulating material ”.

The first "selection of metal" has no option in terms of cost, and the third "selection of bonding method" has no option due to technical problems of the board maker. I will narrow down to "selection".

In this case, the amount of solder paste used during assembly in a mass production line is almost fixed. Therefore, conversely, the amount of metal (thickness and area) is considered and considered, and the result is shown below.

The thickness of the metal (AgPd) is changed from 8 μm to 15
When it is set to μm, the continuity test between the back surface pad and the open through hole on the side surface is conducted by solder dip (240 ° C., 10 seconds condition). Improved to 5 times. However, this method is not only disadvantageous in terms of cost, but also cannot completely prevent non-conduction between the open through hole and the back surface pad.

An object of the present invention is to provide a leadless ceramic multilayer substrate capable of preventing non-conduction between the open through hole and the back surface pad.

[0018]

According to the present invention, a plurality of multilayer wiring layers, a plurality of pads provided on one main surface of the multilayer wiring layer, and a plurality of pads formed on side surfaces of the multilayer wiring layer are formed. And a plurality of metal wiring layers provided corresponding to each of the pads and electrically connected to the corresponding pads, and the one main surface on which the pads are provided is mounted on a substrate mounting surface of the device. At least, it is a leadless ceramic multilayer substrate in which each of the metal wiring layers and the circuit on the substrate mounting surface are connected by soldering, and the electrical connection between each of the pads and the corresponding metal wiring layer is performed. A leadless ceramic multilayer substrate having a connection wiring therein can be obtained.

[0019]

DESCRIPTION OF THE PREFERRED EMBODIMENTS The operation of the present invention will be described.

A pad is formed on a part of the inner layer of the multilayer wiring,
Connect with open through holes. This pad is connected to the circuit inside the substrate and also to the back surface pad by a via hole. As a result, even if the silver-palladium on the edge of the board is eroded by the solder and the open through hole and the back surface pad become non-conductive, the open through hole is connected to the pad of the intermediate layer, so that the external interface and the board are not connected. The internal circuit will never become non-conductive.

Actually, a solder dip at 240 ° C. for 10 seconds was used to conduct a continuity test between the back surface pad and the side open through holes. , There was no non-conduction between the sides (100% conduction in the target number of times).

As described above, since the customer can automatically mount the apparatus on the apparatus and the non-conducting defects are reduced, the effect of reducing the man-hours and improving the yield can be obtained.

Embodiments of the present invention will be described below with reference to the drawings.

FIG. 1 is a partial sectional view of an embodiment of the present invention, in which the same parts as those in FIGS. 2 to 5 are designated by the same reference numerals. Referring to FIG. 1, a back surface pad 12 and a side open through hole 11 corresponding to the back surface pad 12 are connected to each other on the outer peripheral surface of the substrate 1, which is similar to the conventional example. The open through hole 11 is silver palladium (AgPd).
It is assumed to be a metal layer of.

Also inside the substrate 1, the pad 1
2 and the open through hole 11 are connected by the via hole 15 and the circuit wiring layer of the intermediate layer inside the substrate.

Even if the silver palladium on the edge portion of the substrate is corroded by the solder 4 for connecting to the external interface 3 and the open through hole 11 and the back surface pad 12 become non-conducting, the intermediate layer inside the substrate. Since it is connected by the wiring and the via hole, it does not become non-conductive.

[0027]

As described above, according to the present invention, since the circuit for connecting the back surface pad and the open through hole is provided inside the substrate as well, there is an effect that the non-conduction of both due to the solder erosion effect can be prevented. .

[Brief description of drawings]

FIG. 1 is a partial cross-sectional view showing an embodiment of the present invention.

2A is a top perspective view of the MCIC, and FIG. 2B is a rear perspective view thereof.

FIG. 3 is a side perspective view of a multilayer ceramic substrate of an MCIC.

FIG. 4 is a diagram showing a connection relationship between a multilayer ceramic substrate and an external interface.

5A is a partially enlarged view of FIG. 4, and FIG. 5B is a diagram illustrating solder erosion.

[Explanation of symbols]

 1 Leadless Multilayer Ceramic Substrate 2 Cover 3 External Interface 4 Solder 11 Open Through Hole 12 Backside Pad 15 Via Hole 16 Wiring Layer

Claims (4)

[Claims] 1. A multi-layered wiring layer, a plurality of pads provided on one main surface of the multi-layered wiring layer, and a plurality of pads formed on a side surface of the multi-layered wiring layer and corresponding to each of the pads. A plurality of metal wiring layers provided and electrically connected to corresponding pads, the one main surface on which the pads are provided is mounted on a substrate mounting surface of the device, and each of the metal wiring layers A leadless ceramic multilayer substrate in which a circuit on a substrate mounting surface is connected by soldering, and a wiring for electrical connection between each of the pads and a corresponding metal wiring layer is provided inside. And leadless ceramic multilayer board. 2. The electrical connection wiring has a via hole having one end connected to the pad and extending to an intermediate layer of the multilayer wiring layer, and a connection layer connecting the other end of the via hole and the metal wiring layer. And consisting of:
Leadless ceramic multilayer substrate as described. 3. The leadless according to claim 1, wherein the metal wiring layer is adhered to an inner peripheral surface of an open through hole provided on a side surface of the multilayer wiring layer. Ceramic multilayer substrate. 4. The leadless ceramic multilayer substrate according to claim 1, wherein the metal wiring layer is AgPd, and the interlayer insulating material of the multilayer wiring layer is ceramic.