JPH0823151A - Chip-on-board and its production - Google Patents

Chip-on-board and its production

Info

Publication number
JPH0823151A
JPH0823151A JP17764194A JP17764194A JPH0823151A JP H0823151 A JPH0823151 A JP H0823151A JP 17764194 A JP17764194 A JP 17764194A JP 17764194 A JP17764194 A JP 17764194A JP H0823151 A JPH0823151 A JP H0823151A
Authority
JP
Japan
Prior art keywords
component
board
chip
bonding
center
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP17764194A
Other languages
Japanese (ja)
Inventor
Tamotsu Onodera
保 小野寺
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Tanaka Kikinzoku Kogyo KK
Original Assignee
Tanaka Kikinzoku Kogyo KK
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Tanaka Kikinzoku Kogyo KK filed Critical Tanaka Kikinzoku Kogyo KK
Priority to JP17764194A priority Critical patent/JPH0823151A/en
Publication of JPH0823151A publication Critical patent/JPH0823151A/en
Pending legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K1/00Printed circuits
    • H05K1/18Printed circuits structurally associated with non-printed electric components
    • H05K1/182Printed circuits structurally associated with non-printed electric components associated with components mounted in the printed circuit board, e.g. insert mounted components [IMC]

Abstract

PURPOSE:To provide a chip-on-board in which the disconnection of a bonding wire can be prevented during transfer operation, etc. CONSTITUTION:A lot of bonding pads 3a are formed in an internal layer 3 of a multi-layer printed board 1, and the pads 3a are exposed around the bottom surface of a recessed part 7 for housing parts that is prepared in the board 1, further the pads are electrically connected with a part 9 fixed at the center of the bottom surface of the part 7 by bonding wires 10. Thus the bonding wire is made of buried-in type.

Description

【発明の詳細な説明】Detailed Description of the Invention

【0001】[0001]

【産業上の利用分野】本発明は、ICチップ等の部品を
裸のまま直接プリント基板に搭載したチップオンボード
及びその製造方法に関する。
BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a chip-on-board in which components such as IC chips are directly mounted on a printed circuit board as they are, and a manufacturing method thereof.

【0002】[0002]

【従来の技術】従来、この種のチップオンボード(CO
B)は、例えば図3に示すように、プリント基板(PW
B)31の所要箇所に部品収容凹部32を座ぐり加工等によ
って設け、この部品収容凹部32にICチップ等の裸の部
品33を共晶合金34等により固定(ダイスボンディング)
し、かつ部品33とプリント基板31の表層回路のボンディ
ングパッド35とを金線等のボンディングワイヤ36による
ワイヤボンディングにより電気的に接続したり、あるい
は図4に示すように、プリント基板37の所要箇所に設け
た部品収容凹部38に、Cu−Ni−Au合金からなる放
熱ケース39を嵌着し、この放熱ケース39内に固定した部
品40とプリント基板37の表層回路のボンディングパッド
41とをボンディングワイヤ42によるワイヤボンディング
により電気的に接続して構成されており、いずれも部品
33、40を保護するために、エポキシ樹脂等による封止
(ポッティング)が施されるものである。
2. Description of the Related Art Conventionally, this type of chip-on-board (CO
B) is a printed circuit board (PW) as shown in FIG.
B) A component accommodating recess 32 is provided in a required portion of 31 by counter boring or the like, and a bare component 33 such as an IC chip is fixed to the component accommodating recess 32 by a eutectic alloy 34 or the like (die bonding).
In addition, the component 33 and the bonding pad 35 of the surface layer circuit of the printed circuit board 31 are electrically connected by wire bonding with a bonding wire 36 such as a gold wire, or as shown in FIG. A heat dissipating case 39 made of a Cu-Ni-Au alloy is fitted in the part accommodating recess 38 provided in the heat dissipating case 39.
41 and 41 are electrically connected by wire bonding with a bonding wire 42.
In order to protect 33 and 40, sealing (potting) with epoxy resin or the like is performed.

【0003】[0003]

【発明が解決しようとする課題】しかしながら、従来の
チップオンボード及びその製造方法では、ボンディング
パッドが表層に設けられているため、搬送時等にボンデ
ィングワイヤの断線のおそれがある一方、部品の上方を
利用できないと共に、板厚が厚くなる不具合がある。そ
こで、本発明は、搬送時等のボンディングワイヤの断線
を防止し得、又、部品の上方を別部品の搭載に利用し、
かつ板厚を薄くし得るチップオンボード及びその製造方
法を提供することを目的とする。
However, in the conventional chip-on-board and the manufacturing method thereof, since the bonding pad is provided on the surface layer, the bonding wire may be broken at the time of transportation or the like, while the upper part of the component may be broken. There is a problem that the plate cannot be used and the plate thickness becomes thick. Therefore, the present invention can prevent disconnection of the bonding wire at the time of transportation, and the upper side of the component is used for mounting another component,
Moreover, it is an object of the present invention to provide a chip-on-board capable of reducing the plate thickness and a manufacturing method thereof.

【0004】[0004]

【課題を解決するための手段】前記課題を解決するた
め、本発明のチップオンボードは、多層プリント基板の
銅厚70μm以上の銅箔からなる内層回路に多数のボンデ
ィングパッドが形成され、これらのボンディングパッド
が多層プリント基板に設けた部品収容凹部の底面周辺に
露出され、これらのボンディングパッドと部品収容凹部
の底面中央に固定された部品とがボンディングワイヤに
より電気的に接続されていることを特徴とする。前記部
品収容凹部は、部品の高さより深く形成されていること
が好ましい。又、前記部品収容凹部の底面中央に前記部
品を載せて放熱する放熱板が埋設されていることが好ま
しい。
In order to solve the above-mentioned problems, the chip-on-board of the present invention has a large number of bonding pads formed on an inner layer circuit made of a copper foil having a copper thickness of 70 μm or more of a multilayer printed board. The bonding pads are exposed around the bottom surface of the component accommodating recess provided on the multilayer printed circuit board, and these bonding pads and the component fixed to the center of the bottom surface of the component accommodating recess are electrically connected by a bonding wire. And It is preferable that the component accommodating recess is formed deeper than the height of the component. Further, it is preferable that a heat radiating plate for placing and radiating the component is embedded in the center of the bottom surface of the component accommodating recess.

【0005】一方、チップオンボードの製造方法は、多
数のボンディングパッドを有する銅厚70μm以上の銅箔
からなる内層回路を形成して多層プリント基板を構成
し、前記各ボンディングパッドが底面周辺に露出するよ
うに前記プリント基板に座ぐり加工を施して部品収容凹
部を形成した後、各ボンディングパッドにめっきを施
し、部品収容凹部の底面中央に部品を固定した後、各ボ
ンディングパッドと部品とをボンディングワイヤにより
電気的に接続することを特徴とする。前記内層回路は、
多層プリント基板の表面から部品の高さよりに深い位置
に形成することが好ましい。又、前記内層回路の各ボン
ディングパッドの中央に位置させて放熱板を多層プリン
ト基板に予め埋設しておくことが好ましい。
On the other hand, in the method of manufacturing a chip-on-board, an inner layer circuit made of a copper foil having a copper thickness of 70 μm or more having a large number of bonding pads is formed to form a multilayer printed circuit board, and each bonding pad is exposed around the bottom surface. After forming a component accommodating recess on the printed circuit board as described above, plating each bonding pad and fixing the component to the center of the bottom surface of the component accommodating recess, and then bonding each bonding pad with the component. It is characterized by being electrically connected by a wire. The inner layer circuit is
It is preferably formed at a position deeper than the height of the component from the surface of the multilayer printed board. In addition, it is preferable that the heat dissipation plate is located in the center of each bonding pad of the inner layer circuit and is embedded in the multilayer printed circuit board in advance.

【0006】[0006]

【作用】本発明のチップオンボードにおいては、ボンデ
ィングワイヤが埋め込み型となる。又、部品収容凹部
を、部品の高さより深く形成することによって、部品等
の完全な埋め込みが可能となる。更に、部品収容凹部の
底面中央に放熱板を埋設することによって、部品の放熱
特性が向上する。
In the chip on board of the present invention, the bonding wire is embedded. Further, by forming the component accommodating recess deeper than the height of the component, it is possible to completely embed the component and the like. Furthermore, by embedding the heat dissipation plate in the center of the bottom surface of the component accommodating recess, the heat dissipation characteristics of the component are improved.

【0007】[0007]

【実施例】以下、本発明の実施例について図面を参照し
て説明する。図1は本発明のチップオンボードの一実施
例を示す要部の断面図である。図中1は表層、内層及び
裏層回路2、3、4と上下2層の絶縁層5、6とを交互
に積層してなる3層プリント基板(3層PWB)であ
り、この3層プリント基板1の内層回路3は、上方の絶
縁層5の厚さを後述する部品の高さより厚くすることに
より、表面(図1においては上面)から上記部品の高さ
より深い位置に形成されていると共に、銅厚70μm以上
(実施例においては 105μm)の銅箔からなり、かつ多
数のボンディングパッド3aを一体形成してある。そし
て、各ボンディングパッド3aは、3層プリント基板1
の上方の絶縁層5の所要箇所に凹設した部品収容凹部7
の底面周辺に露出されている。上記部品収容凹部7の底
面中央には、Cu箔+Ni−Auメッキからなる放熱板
8が埋設されており、この放熱板8上にはICチップ等
の部品9が共晶合金、銀ペースト又はクリームはんだ等
によって固定されている。そして、部品9は、金めっき
等が施された上記各ボンディングパッド3aと金線等の
ボンディングワイヤ10を用いたワイヤボンディングによ
り電気的に接続されている。
Embodiments of the present invention will be described below with reference to the drawings. FIG. 1 is a sectional view of a main part showing an embodiment of the chip-on-board of the present invention. In the figure, 1 is a three-layer printed circuit board (three-layer PWB) in which surface layers, inner layers and back layer circuits 2, 3, 4 and upper and lower two insulating layers 5, 6 are alternately laminated. The inner layer circuit 3 of the substrate 1 is formed at a position deeper than the height of the above component from the surface (upper surface in FIG. 1) by making the thickness of the upper insulating layer 5 thicker than the height of the component described later. , A copper foil having a copper thickness of 70 μm or more (105 μm in the embodiment), and a large number of bonding pads 3a are integrally formed. Then, each bonding pad 3a is a three-layer printed circuit board 1
Component accommodating recess 7 recessed at a required position on the insulating layer 5 above the
Exposed around the bottom of the. A radiator plate 8 made of Cu foil + Ni-Au plating is embedded in the center of the bottom surface of the component accommodating recess 7, and a component 9 such as an IC chip is eutectic alloy, silver paste or cream on the radiator plate 8. It is fixed with solder or the like. The component 9 is electrically connected to each of the bonding pads 3a plated with gold or the like by wire bonding using a bonding wire 10 such as a gold wire.

【0008】上記構成のチップオンボードを製造するに
は、先ず、表層、内層及び裏層回路2、3、4と上下2
層の絶縁層5、6を交互に積層して3層プリント基板1
を作成する。この3層プリント基板1の作製に際し、内
層回路3の3層プリント基板1の表面からの位置を部品
9の高さより深くするため、上方の絶縁層5の厚さを部
品9の高さより大きくしておくと共に、内層回路3を多
数のボンディングパッド3aを有する銅厚70μm以上の
銅箔により形成する一方、放熱板8を各ボンディングパ
ッド3aの中央に位置させて下方の絶縁層6に予め埋設
しておく。次いで、3層プリント基板1における上方の
絶縁層5の所要箇所に座ぐり加工を施して部品収容凹部
7を凹設し、上記各ボンディングパッド3a及び放熱板
8がそれぞれ部品収容凹部7の底面周辺及び底面中央に
露出させた後、各ボンディングパッド3aにCu−Au
めっきを施す。次に、部品収容凹部7の底面中央の放熱
板8に部品9を共晶合金等を用いて固定した後、部品9
と各ボンディングパッド3aとを金線等のボンディング
ワイヤ10を用いてワイヤボンディングすると、チップオ
ンボードが完成する。そして、上述したチップオンボー
ドには必要に応じて図2に示すように、部品収容凹部7
を蓋板11により閉鎖し、この蓋板11上に別の部品12を搭
載する。
In order to manufacture the chip-on-board having the above structure, first, the surface layer, inner layer and back layer circuits 2, 3, 4 and the upper and lower 2 are formed.
Three-layer printed circuit board 1 by alternately laminating insulating layers 5 and 6
Create When manufacturing the three-layer printed circuit board 1, in order to make the position of the inner layer circuit 3 from the surface of the three-layer printed circuit board 1 deeper than the height of the component 9, the thickness of the upper insulating layer 5 is made larger than the height of the component 9. In addition, the inner layer circuit 3 is formed of a copper foil having a copper thickness of 70 μm or more having a large number of bonding pads 3a, while the heat dissipation plate 8 is located at the center of each bonding pad 3a and embedded in the lower insulating layer 6 in advance. Keep it. Next, the upper part of the insulating layer 5 in the three-layer printed circuit board 1 is counterbored to form a component accommodating recess 7, and each of the bonding pads 3a and the heat dissipation plate 8 surrounds the bottom surface of the component accommodating recess 7. And after exposing it to the center of the bottom surface, Cu-Au is applied to each bonding pad 3a.
Apply plating. Next, after fixing the component 9 to the heat dissipation plate 8 in the center of the bottom surface of the component accommodating recess 7 using a eutectic alloy or the like,
The chip-on-board is completed by wire-bonding the bonding pads 3a and the bonding pads 3a with a bonding wire 10 such as a gold wire. Then, as shown in FIG. 2, the above-described chip-on-board may include a component accommodating recess 7 as necessary.
Is closed by a lid plate 11, and another component 12 is mounted on the lid plate 11.

【0009】なお、上記実施例においては、プリント基
板として3層プリント基板1を用いる場合について述べ
たが、これに限定されるものではなく、4層以上の多層
プリント基板を用いてもよい。この場合、部品収容凹部
7を2層以上の絶縁層に及んで設けてもよい。
In the above embodiment, the case where the three-layer printed board 1 is used as the printed board has been described, but the present invention is not limited to this, and a multilayer printed board having four or more layers may be used. In this case, the component housing recess 7 may be provided so as to extend over two or more insulating layers.

【0010】[0010]

【発明の効果】以上説明したように、本発明のチップオ
ンボード及びその製造方法によれば、ボンディングワイ
ヤが埋め込み型となるので、搬送時等にボンディングワ
イヤが断線したりすることがない。又、部品収容凹部
を、部品の高さより深く形成することによって、部品等
が完全な埋め込みが可能となるので、部品の上方を別部
品の搭載に利用することができ、かつ板厚を薄くするこ
とができる。更に、部品収容凹部の底面中央に放熱板を
埋設することによって、部品の放熱特性が向上するの
で、その劣化を防止することができる。
As described above, according to the chip-on-board and the method of manufacturing the same of the present invention, the bonding wire is embedded, so that the bonding wire will not be broken during transportation. Further, by forming the component accommodating recess deeper than the height of the component, the component and the like can be completely embedded, so that the upper part of the component can be used for mounting another component and the plate thickness can be reduced. be able to. Further, by embedding the heat dissipation plate in the center of the bottom surface of the component accommodating recess, the heat dissipation characteristics of the component are improved, so that the deterioration can be prevented.

【図面の簡単な説明】[Brief description of drawings]

【図1】本発明のチップオンボードの一実施例を示す要
部の断面図である。
FIG. 1 is a sectional view of essential parts showing an embodiment of a chip on board of the present invention.

【図2】図1のチップオンボードの使用態様を示す要部
の断面図である。
FIG. 2 is a cross-sectional view of essential parts showing a mode of use of the chip on board of FIG.

【図3】従来のチップオンボードの要部の断面図であ
る。
FIG. 3 is a cross-sectional view of a main part of a conventional chip on board.

【図4】従来の他のチップオンボードの要部の断面図で
ある。
FIG. 4 is a sectional view of a main part of another conventional chip on board.

【符号の説明】[Explanation of symbols]

1 3層プリント基板(PWB) 3 内層回路 3a ボンディングパッド 7 部品収容凹部 8 放熱板 9 部品 10 ボンディングワイヤ 1 3 layer printed circuit board (PWB) 3 inner layer circuit 3a bonding pad 7 component accommodating recess 8 heat sink 9 component 10 bonding wire

Claims (6)

【特許請求の範囲】[Claims] 【請求項1】 多層プリント基板の内層回路に多数のボ
ンディングパッドが形成され、これらのボンディングパ
ッドが多層プリント基板に設けた部品収容凹部の底面周
辺に露出され、これらのボンディングパッドと部品収容
凹部の底面中央に固定された部品とがボンディングワイ
ヤにより電気的に接続されていることを特徴とするチッ
プオンボード。
1. A plurality of bonding pads are formed on an inner layer circuit of a multi-layer printed circuit board, and these bonding pads are exposed around a bottom surface of a component accommodating recess provided in the multi-layer printed circuit board. A chip-on-board characterized in that a component fixed to the center of the bottom surface is electrically connected by a bonding wire.
【請求項2】 前記部品収容凹部が、部品の高さより深
く形成されていることを特徴とする請求項1記載のチッ
プオンボード。
2. The chip-on-board according to claim 1, wherein the component accommodating recess is formed deeper than the height of the component.
【請求項3】 前記部品収容凹部の底面中央に前記部品
を載せて放熱する放熱板が埋設されていることを特徴と
する請求項1又は2記載のチップオンボード。
3. The chip-on-board according to claim 1, wherein a heat radiating plate for mounting and radiating the component is buried in the center of the bottom surface of the component accommodating recess.
【請求項4】 多数のボンディングパッドを有する銅箔
からなる内層回路を形成して多層プリント基板を構成
し、前記各ボンディングパッドが底面周辺に露出するよ
うに前記多層プリント基板に座ぐり加工を施して部品収
容凹部を形成した後、各ボンディングパッドにめっきを
施し、部品収容凹部の底面中央に部品を固定した後、各
ボンディングパッドと部品とをボンディングワイヤによ
り電気的に接続することを特徴とするチップオンボード
の製造方法。
4. A multi-layer printed circuit board is formed by forming an inner layer circuit made of copper foil having a large number of bonding pads, and the multi-layer printed circuit board is spotted so that each of the bonding pads is exposed around the bottom surface. After forming the component accommodating concave portion, plating each bonding pad, fixing the component to the center of the bottom surface of the component accommodating concave portion, and electrically connecting each bonding pad and the component with a bonding wire. Chip-on-board manufacturing method.
【請求項5】 前記内層回路を多層プリント基板の表面
から部品の高さより深い位置に形成することを特徴とす
る請求項4記載のチップオンボードの製造方法。
5. The method for manufacturing a chip on board according to claim 4, wherein the inner layer circuit is formed at a position deeper than the height of the component from the surface of the multilayer printed board.
【請求項6】 前記内層回路の各ボンディングパッドの
中央に位置させて放熱板を多層プリント基板に予め埋設
しておくことを特徴とする請求項4又は5記載のチップ
オンボードの製造方法。
6. The method for manufacturing a chip-on-board according to claim 4, wherein a heat dissipation plate located in the center of each bonding pad of the inner layer circuit is embedded in the multilayer printed board in advance.
JP17764194A 1994-07-06 1994-07-06 Chip-on-board and its production Pending JPH0823151A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP17764194A JPH0823151A (en) 1994-07-06 1994-07-06 Chip-on-board and its production

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP17764194A JPH0823151A (en) 1994-07-06 1994-07-06 Chip-on-board and its production

Publications (1)

Publication Number Publication Date
JPH0823151A true JPH0823151A (en) 1996-01-23

Family

ID=16034548

Family Applications (1)

Application Number Title Priority Date Filing Date
JP17764194A Pending JPH0823151A (en) 1994-07-06 1994-07-06 Chip-on-board and its production

Country Status (1)

Country Link
JP (1) JPH0823151A (en)

Cited By (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
KR19990000701A (en) * 1997-06-10 1999-01-15 윤종용 Printed circuit boards for chip-on-board (COB) packages and chip-on-board packages using the same
WO2016197318A1 (en) * 2015-06-09 2016-12-15 方丽文 Embedded circuit board patch structure
CN108617091A (en) * 2018-05-30 2018-10-02 太龙(福建)商业照明股份有限公司 A kind of on-plane surface pcb board
US11842977B2 (en) 2020-12-29 2023-12-12 Samsung Electronics Co., Ltd. Semiconductor package

Cited By (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
KR19990000701A (en) * 1997-06-10 1999-01-15 윤종용 Printed circuit boards for chip-on-board (COB) packages and chip-on-board packages using the same
WO2016197318A1 (en) * 2015-06-09 2016-12-15 方丽文 Embedded circuit board patch structure
CN108617091A (en) * 2018-05-30 2018-10-02 太龙(福建)商业照明股份有限公司 A kind of on-plane surface pcb board
US11842977B2 (en) 2020-12-29 2023-12-12 Samsung Electronics Co., Ltd. Semiconductor package

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