JPH10508451A - 折り返し形a/d変換器 - Google Patents
折り返し形a/d変換器Info
- Publication number
- JPH10508451A JPH10508451A JP9510036A JP51003697A JPH10508451A JP H10508451 A JPH10508451 A JP H10508451A JP 9510036 A JP9510036 A JP 9510036A JP 51003697 A JP51003697 A JP 51003697A JP H10508451 A JPH10508451 A JP H10508451A
- Authority
- JP
- Japan
- Prior art keywords
- signals
- signal
- comparison output
- transitions
- amplitude
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Granted
Links
Classifications
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- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03M—CODING; DECODING; CODE CONVERSION IN GENERAL
- H03M1/00—Analogue/digital conversion; Digital/analogue conversion
- H03M1/12—Analogue/digital converters
- H03M1/34—Analogue value compared with reference values
- H03M1/36—Analogue value compared with reference values simultaneously only, i.e. parallel type
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- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03M—CODING; DECODING; CODE CONVERSION IN GENERAL
- H03M1/00—Analogue/digital conversion; Digital/analogue conversion
- H03M1/12—Analogue/digital converters
- H03M1/20—Increasing resolution using an n bit system to obtain n + m bits
- H03M1/202—Increasing resolution using an n bit system to obtain n + m bits by interpolation
- H03M1/203—Increasing resolution using an n bit system to obtain n + m bits by interpolation using an analogue interpolation circuit
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- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03F—AMPLIFIERS
- H03F3/00—Amplifiers with only discharge tubes or only semiconductor devices as amplifying elements
- H03F3/45—Differential amplifiers
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03M—CODING; DECODING; CODE CONVERSION IN GENERAL
- H03M1/00—Analogue/digital conversion; Digital/analogue conversion
- H03M1/12—Analogue/digital converters
- H03M1/14—Conversion in steps with each step involving the same or a different conversion means and delivering more than one bit
- H03M1/141—Conversion in steps with each step involving the same or a different conversion means and delivering more than one bit in which at least one step is of the folding type; Folding stages therefore
Landscapes
- Engineering & Computer Science (AREA)
- Theoretical Computer Science (AREA)
- Power Engineering (AREA)
- Amplifiers (AREA)
- Analogue/Digital Conversion (AREA)
Abstract
Description
Claims (1)
- 【特許請求の範囲】 1.折り返し増幅器(FA)を有するA/D変換器において、前記折り返し増幅器が 、 入力信号(Si)に応答して、互いにシフトした互いに重なり合う遷移部を有す る複数の比較出力信号(Sc1..Sc9;Sc1..Sc27)を発生する比較手段(CPM)と、 前記複数の比較出力信号(Sc1..Sc9;Sc1..Sc27)に応答して、実質的に重なり 合わない遷移部を有する複数の振幅制限信号(SlI..SlIII)を発生する振幅制限手 段(LIM)と、 前記複数の振幅制限信号(SlI..SlIII)を合成して折り返し信号(Sf)を発生す る合成手段(CBM)と、 を具えることを特徴とするA/D変換器。 2.前記振幅制限手段が、 互いに実質的に重なり合わない互いにシフトされた遷移部を有する比較出力 信号(Sc1-Sc4-Sc7,..;Sc1-Sc10-Sc19,..)の各別のグループを合成して、互いに 重なり合う互いにシフトされた遷移部を有する複数の中間折り返し信号(SifI..S ifIII;SifI..SifIX)を発生する複数の合成器(C1..C3;C1..C9)と、 前記複数の中間折り返し信号(SifI..SifIII;SifI..SifIX)を受信するよう結 合された入力端子と前記合成手段(CBM)に結合された出力端子を有する複数のリ ミッタ(L1..L3;L1..L9)と、 を具えることを特徴とする請求項1記載のA/D変換器。 3.前記振幅制限手段が、 互いに実質的に重なり合わない互いにシフトされた遷移部を有する振幅制限 中間折り返し信号の各別の組合せ(SilI-SilIV-SilVII,SilII-SilV-SilVIII,SilI II-SilVI-SilIX)を合成して互いに重なり合う互いにシフトされた遷移部を有す る複数の他の中間折り返し信号(SfifI,SfifII,SfifIII)を発生する複数の他の合 成器(CF1,CF2,CF3)と、 前記複数の他の中間折り返し信号(SfifI,SfifII,SfifIII)を受信するよう結 合された入力端子と前記合成手段(CBM)に結合された出力端子を有する複数の他 のリミッタ(LF1.LF2,LF3)と、 を具えることを特徴とする請求項2記載のA/D変換器。 4.各合成器(C1..C3;C1..C9)が3つの入力端子を有し、各入力端子が中間折り 返し信号(SifI..SifIII;SifI..SifIX)を受信するよう結合されていることを特徴 とする請求項2記載のA/D変換器。 5.各他の合成器(CF1,CF2,CF3)が3つの入力端子を有し、各入力端子が他の中 間折り返し信号(SfifI,SfifII,SfifIII)を受信するよう結合されていることを特 徴とする請求項3記載のA/D変換器。 6.前記比較手段(CPM)が、前記複数の比較出力信号(Sc1..Sc9;Sf1..Sf9)の遷移 部に利得を与えるよう構成されていることを特徴とする請求項1記載のA/D変 換器。 7.請求項1に記載されたA/D変換器を具えることを特徴とする受信機。 8.入力信号(Si)に応答して、互いに重なり合う互いにシフトされた遷移部を有 する複数の比較出力信号(Sc1..Sc9;Sc1..Sc27)を発生する比較手段(CPM)と、 前記複数の比較出力信号(Sc1..Sc9;Sc1..Sc27)に応答して、実質的に重なり 合わない遷移部を有する複数の振幅制限信号(SlI..SlIII)を発生する振幅制限手 段(LIM)と、 前記複数の振幅制限信号(SlI..SlIII)を合成して折り返し信号(Sf)を発生す る合成手段(CBM)と、 を具えることを特徴とする折り返し増幅器。
Applications Claiming Priority (3)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
NL95202355.4 | 1995-08-31 | ||
EP95202355 | 1995-08-31 | ||
PCT/IB1996/000834 WO1997008834A1 (en) | 1995-08-31 | 1996-08-26 | Folding a/d converter |
Publications (2)
Publication Number | Publication Date |
---|---|
JPH10508451A true JPH10508451A (ja) | 1998-08-18 |
JP3836144B2 JP3836144B2 (ja) | 2006-10-18 |
Family
ID=8220600
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP51003697A Expired - Lifetime JP3836144B2 (ja) | 1995-08-31 | 1996-08-26 | 折り返し形a/d変換器 |
Country Status (6)
Country | Link |
---|---|
US (1) | US5835047A (ja) |
EP (1) | EP0789952B1 (ja) |
JP (1) | JP3836144B2 (ja) |
KR (1) | KR100458975B1 (ja) |
DE (1) | DE69618924D1 (ja) |
WO (1) | WO1997008834A1 (ja) |
Families Citing this family (11)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US6693953B2 (en) * | 1998-09-30 | 2004-02-17 | Skyworks Solutions, Inc. | Adaptive wireless communication receiver |
FR2791490A1 (fr) * | 1999-03-23 | 2000-09-29 | Koninkl Philips Electronics Nv | Dispositif de conversion analogique/numerique a non-linearite differentielle constante |
US6172636B1 (en) | 1999-07-13 | 2001-01-09 | Analog Devices, Inc. | Linearizing structures and methods for adjustable-gain folding amplifiers |
US6163290A (en) * | 1999-07-13 | 2000-12-19 | Analog Devices, Inc. | Linearizing structures and methods for unity-gain folding amplifiers |
US6369742B1 (en) * | 2000-11-01 | 2002-04-09 | Motorola, Inc. | Selective over-ranging in folding and averaging integrated circuits |
US6452529B1 (en) | 2001-01-17 | 2002-09-17 | Qunying Li | Fully differential folding A/D converter architecture |
US6611222B1 (en) | 2002-06-03 | 2003-08-26 | Charles Douglas Murphy | Low-complexity high-speed analog-to-digital converters |
KR101111268B1 (ko) * | 2003-07-30 | 2012-03-13 | 에스티 에릭슨 에스에이 | 교차결합 폴딩회로 및 a/d 컨버터 |
US20050083223A1 (en) * | 2003-10-20 | 2005-04-21 | Devendorf Don C. | Resolution enhanced folding amplifier |
US7088281B1 (en) * | 2004-01-14 | 2006-08-08 | National Semiconductor Corporation | Coarse channel calibration for folding ADC architectures |
GB0918027D0 (en) * | 2009-10-15 | 2009-12-02 | Dyson Technology Ltd | A surface trating appliance |
Family Cites Families (3)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US5157397A (en) * | 1991-01-28 | 1992-10-20 | Trw Inc. | Quantizer and related method for improving linearity |
EP0533253B1 (fr) * | 1991-09-20 | 1996-07-10 | Philips Composants Et Semiconducteurs | Procédé de transcodage de données d'un code thermométrique, décodeur et convertisseur appliquant ce procédé |
US5307067A (en) * | 1992-04-20 | 1994-04-26 | Matsushita Electric Industrial Co., Ltd. | Folding circuit and analog-to-digital converter |
-
1996
- 1996-08-26 EP EP96926521A patent/EP0789952B1/en not_active Expired - Lifetime
- 1996-08-26 JP JP51003697A patent/JP3836144B2/ja not_active Expired - Lifetime
- 1996-08-26 KR KR1019970702814A patent/KR100458975B1/ko not_active IP Right Cessation
- 1996-08-26 DE DE69618924T patent/DE69618924D1/de not_active Expired - Lifetime
- 1996-08-26 WO PCT/IB1996/000834 patent/WO1997008834A1/en active IP Right Grant
- 1996-08-28 US US08/704,198 patent/US5835047A/en not_active Expired - Lifetime
Also Published As
Publication number | Publication date |
---|---|
WO1997008834A1 (en) | 1997-03-06 |
KR100458975B1 (ko) | 2005-06-13 |
KR970707641A (ko) | 1997-12-01 |
US5835047A (en) | 1998-11-10 |
DE69618924D1 (de) | 2002-03-14 |
EP0789952A1 (en) | 1997-08-20 |
JP3836144B2 (ja) | 2006-10-18 |
EP0789952B1 (en) | 2002-01-30 |
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