JPH10269775A - 半導体集積回路および位相同期ループ回路 - Google Patents

半導体集積回路および位相同期ループ回路

Info

Publication number
JPH10269775A
JPH10269775A JP9075685A JP7568597A JPH10269775A JP H10269775 A JPH10269775 A JP H10269775A JP 9075685 A JP9075685 A JP 9075685A JP 7568597 A JP7568597 A JP 7568597A JP H10269775 A JPH10269775 A JP H10269775A
Authority
JP
Japan
Prior art keywords
bit line
data
transistor
current
circuit
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP9075685A
Other languages
English (en)
Japanese (ja)
Other versions
JPH10269775A5 (enExample
Inventor
Tsukasa Oishi
司 大石
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Mitsubishi Electric Corp
Original Assignee
Mitsubishi Electric Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Mitsubishi Electric Corp filed Critical Mitsubishi Electric Corp
Priority to JP9075685A priority Critical patent/JPH10269775A/ja
Priority to US08/917,858 priority patent/US6134611A/en
Publication of JPH10269775A publication Critical patent/JPH10269775A/ja
Priority to US09/609,934 priority patent/US6502145B1/en
Publication of JPH10269775A5 publication Critical patent/JPH10269775A5/ja
Pending legal-status Critical Current

Links

Classifications

    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C11/00—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor
    • G11C11/21—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements
    • G11C11/34—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices
    • G11C11/40—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors
    • G11C11/401—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors forming cells needing refreshing or charge regeneration, i.e. dynamic cells
    • G11C11/4063—Auxiliary circuits, e.g. for addressing, decoding, driving, writing, sensing or timing
    • G11C11/407—Auxiliary circuits, e.g. for addressing, decoding, driving, writing, sensing or timing for memory cells of the field-effect type
    • G11C11/409—Read-write [R-W] circuits 
    • G11C11/4093—Input/output [I/O] data interface arrangements, e.g. data buffers

Landscapes

  • Engineering & Computer Science (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Computer Hardware Design (AREA)
  • Dram (AREA)
  • Stabilization Of Oscillater, Synchronisation, Frequency Synthesizers (AREA)
  • For Increasing The Reliability Of Semiconductor Memories (AREA)
  • Semiconductor Memories (AREA)
JP9075685A 1997-03-27 1997-03-27 半導体集積回路および位相同期ループ回路 Pending JPH10269775A (ja)

Priority Applications (3)

Application Number Priority Date Filing Date Title
JP9075685A JPH10269775A (ja) 1997-03-27 1997-03-27 半導体集積回路および位相同期ループ回路
US08/917,858 US6134611A (en) 1997-03-27 1997-08-27 System for interface circuit to control multiplexer to transfer data to one of two internal devices and transferring data between internal devices without multiplexer
US09/609,934 US6502145B1 (en) 1997-03-27 2000-06-30 Semiconductor memory with application of predetermined power line potentials

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP9075685A JPH10269775A (ja) 1997-03-27 1997-03-27 半導体集積回路および位相同期ループ回路

Related Child Applications (1)

Application Number Title Priority Date Filing Date
JP2004074330A Division JP2004234837A (ja) 2004-03-16 2004-03-16 半導体集積回路

Publications (2)

Publication Number Publication Date
JPH10269775A true JPH10269775A (ja) 1998-10-09
JPH10269775A5 JPH10269775A5 (enExample) 2005-02-17

Family

ID=13583305

Family Applications (1)

Application Number Title Priority Date Filing Date
JP9075685A Pending JPH10269775A (ja) 1997-03-27 1997-03-27 半導体集積回路および位相同期ループ回路

Country Status (2)

Country Link
US (2) US6134611A (enExample)
JP (1) JPH10269775A (enExample)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US6930938B2 (en) 2002-11-28 2005-08-16 Renesas Technology Corp. Semiconductor memory device having test mode

Families Citing this family (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US20040252713A1 (en) * 2003-06-13 2004-12-16 Roger Taylor Channel status management system for multi-channel LIU
DE102004013429A1 (de) * 2004-03-18 2005-10-13 Infineon Technologies Ag Überwachungsvorrichtung zur Überwachung interner Signale während einer Initialisierung einer elektronischen Schaltungseinheit
US7495420B2 (en) * 2006-01-05 2009-02-24 Micrel, Inc. LDO with slaved switching regulator using feedback for maintaining the LDO transistor at a predetermined conduction level
TWI563505B (en) * 2014-02-20 2016-12-21 Piecemakers Technology Inc Adaptive contorl method based on input clock and related adaptive contorlled apparatus

Family Cites Families (15)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4744078A (en) * 1985-05-13 1988-05-10 Gould Inc. Multiple path multiplexed host to network data communication system
US5163132A (en) * 1987-09-24 1992-11-10 Ncr Corporation Integrated controller using alternately filled and emptied buffers for controlling bi-directional data transfer between a processor and a data storage device
US4994688A (en) * 1988-05-25 1991-02-19 Hitachi Ltd. Semiconductor device having a reference voltage generating circuit
JPH02245810A (ja) * 1989-03-20 1990-10-01 Hitachi Ltd 基準電圧発生回路
JP2531275B2 (ja) * 1989-09-29 1996-09-04 日本電気株式会社 Ａｔｍセル転送方式
JPH04152439A (ja) * 1990-10-17 1992-05-26 Fujitsu Ltd ファイル代行処理方式
JP3027445B2 (ja) * 1991-07-31 2000-04-04 株式会社高取育英会 メモリーコントロールデバイス
US5337270A (en) * 1991-08-26 1994-08-09 Nec Corporation Semiconductor dynamic memory
JP3789490B2 (ja) * 1992-06-30 2006-06-21 パイオニア株式会社 Ｃｄ−ｒｏｍプレーヤおよびオーディオデータの高速再生方法
JPH06223568A (ja) * 1993-01-29 1994-08-12 Mitsubishi Electric Corp 中間電位発生装置
US5583561A (en) * 1994-06-07 1996-12-10 Unisys Corporation Multi-cast digital video data server using synchronization groups
JPH08186490A (ja) * 1994-11-04 1996-07-16 Fujitsu Ltd 位相同期回路及びデータ再生装置
JP3413298B2 (ja) * 1994-12-02 2003-06-03 三菱電機株式会社 半導体記憶装置
RU2176814C2 (ru) * 1995-06-07 2001-12-10 Самсунг Электроникс Ко., Лтд. Схема уменьшения задержки при передаче буферизованных данных между двумя взаимно асинхронными шинами
US5819111A (en) * 1996-03-15 1998-10-06 Adobe Systems, Inc. System for managing transfer of data by delaying flow controlling of data through the interface controller until the run length encoded data transfer is complete

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US6930938B2 (en) 2002-11-28 2005-08-16 Renesas Technology Corp. Semiconductor memory device having test mode

Also Published As

Publication number Publication date
US6502145B1 (en) 2002-12-31
US6134611A (en) 2000-10-17

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