JPH10269775A5 - - Google Patents
Info
- Publication number
- JPH10269775A5 JPH10269775A5 JP1997075685A JP7568597A JPH10269775A5 JP H10269775 A5 JPH10269775 A5 JP H10269775A5 JP 1997075685 A JP1997075685 A JP 1997075685A JP 7568597 A JP7568597 A JP 7568597A JP H10269775 A5 JPH10269775 A5 JP H10269775A5
- Authority
- JP
- Japan
- Prior art keywords
- interface
- internal
- internal device
- multiplexer
- device connected
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
Priority Applications (3)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP9075685A JPH10269775A (ja) | 1997-03-27 | 1997-03-27 | 半導体集積回路および位相同期ループ回路 |
| US08/917,858 US6134611A (en) | 1997-03-27 | 1997-08-27 | System for interface circuit to control multiplexer to transfer data to one of two internal devices and transferring data between internal devices without multiplexer |
| US09/609,934 US6502145B1 (en) | 1997-03-27 | 2000-06-30 | Semiconductor memory with application of predetermined power line potentials |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP9075685A JPH10269775A (ja) | 1997-03-27 | 1997-03-27 | 半導体集積回路および位相同期ループ回路 |
Related Child Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP2004074330A Division JP2004234837A (ja) | 2004-03-16 | 2004-03-16 | 半導体集積回路 |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| JPH10269775A JPH10269775A (ja) | 1998-10-09 |
| JPH10269775A5 true JPH10269775A5 (enExample) | 2005-02-17 |
Family
ID=13583305
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP9075685A Pending JPH10269775A (ja) | 1997-03-27 | 1997-03-27 | 半導体集積回路および位相同期ループ回路 |
Country Status (2)
| Country | Link |
|---|---|
| US (2) | US6134611A (enExample) |
| JP (1) | JPH10269775A (enExample) |
Families Citing this family (5)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JP2004178725A (ja) | 2002-11-28 | 2004-06-24 | Renesas Technology Corp | 半導体記憶装置 |
| US20040252713A1 (en) * | 2003-06-13 | 2004-12-16 | Roger Taylor | Channel status management system for multi-channel LIU |
| DE102004013429A1 (de) * | 2004-03-18 | 2005-10-13 | Infineon Technologies Ag | Überwachungsvorrichtung zur Überwachung interner Signale während einer Initialisierung einer elektronischen Schaltungseinheit |
| US7495420B2 (en) * | 2006-01-05 | 2009-02-24 | Micrel, Inc. | LDO with slaved switching regulator using feedback for maintaining the LDO transistor at a predetermined conduction level |
| TWI563505B (en) * | 2014-02-20 | 2016-12-21 | Piecemakers Technology Inc | Adaptive contorl method based on input clock and related adaptive contorlled apparatus |
Family Cites Families (15)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US4744078A (en) * | 1985-05-13 | 1988-05-10 | Gould Inc. | Multiple path multiplexed host to network data communication system |
| US5163132A (en) * | 1987-09-24 | 1992-11-10 | Ncr Corporation | Integrated controller using alternately filled and emptied buffers for controlling bi-directional data transfer between a processor and a data storage device |
| US4994688A (en) * | 1988-05-25 | 1991-02-19 | Hitachi Ltd. | Semiconductor device having a reference voltage generating circuit |
| JPH02245810A (ja) * | 1989-03-20 | 1990-10-01 | Hitachi Ltd | 基準電圧発生回路 |
| JP2531275B2 (ja) * | 1989-09-29 | 1996-09-04 | 日本電気株式会社 | Atmセル転送方式 |
| JPH04152439A (ja) * | 1990-10-17 | 1992-05-26 | Fujitsu Ltd | ファイル代行処理方式 |
| JP3027445B2 (ja) * | 1991-07-31 | 2000-04-04 | 株式会社高取育英会 | メモリーコントロールデバイス |
| US5337270A (en) * | 1991-08-26 | 1994-08-09 | Nec Corporation | Semiconductor dynamic memory |
| JP3789490B2 (ja) * | 1992-06-30 | 2006-06-21 | パイオニア株式会社 | Cd−romプレーヤおよびオーディオデータの高速再生方法 |
| JPH06223568A (ja) * | 1993-01-29 | 1994-08-12 | Mitsubishi Electric Corp | 中間電位発生装置 |
| US5583561A (en) * | 1994-06-07 | 1996-12-10 | Unisys Corporation | Multi-cast digital video data server using synchronization groups |
| JPH08186490A (ja) * | 1994-11-04 | 1996-07-16 | Fujitsu Ltd | 位相同期回路及びデータ再生装置 |
| JP3413298B2 (ja) * | 1994-12-02 | 2003-06-03 | 三菱電機株式会社 | 半導体記憶装置 |
| WO1996041267A1 (en) * | 1995-06-07 | 1996-12-19 | Ast Research, Inc. | Delay reduction in transfer of buffered data between two mutually asynchronous buses |
| US5819111A (en) * | 1996-03-15 | 1998-10-06 | Adobe Systems, Inc. | System for managing transfer of data by delaying flow controlling of data through the interface controller until the run length encoded data transfer is complete |
-
1997
- 1997-03-27 JP JP9075685A patent/JPH10269775A/ja active Pending
- 1997-08-27 US US08/917,858 patent/US6134611A/en not_active Expired - Fee Related
-
2000
- 2000-06-30 US US09/609,934 patent/US6502145B1/en not_active Expired - Fee Related
Similar Documents
| Publication | Publication Date | Title |
|---|---|---|
| WO1999031902A8 (en) | Electronic paging device including a computer connection port | |
| WO2002054212A3 (en) | Computer peripheral device that remains operable when central processor operations are suspended | |
| EP0655839A3 (en) | Electronic system, semiconductor IC and termination device. | |
| EP0213037A3 (en) | Semiconductor memory device having test pattern generating circuit | |
| WO2001096979A3 (en) | Integrated processor platform supporting wireless handheld multi-media devices | |
| AR245302A1 (es) | Circuito de interfaz de expansion de bus de entrada/salida. | |
| EP0777207A3 (en) | Methods and circuits for interfacing processing circuitry with memories | |
| JP2000184004A5 (enExample) | ||
| JPH10269775A5 (enExample) | ||
| WO1999066416A3 (en) | Resource control in a computer system | |
| EP1324189A3 (en) | Self-timed digital processing circuits | |
| JP2000215155A5 (enExample) | ||
| KR970023959A (ko) | 내부 회로의 선택적 패드-대-패드 바이패스를 가진 직접 회로 다이(Integrated Circuit Die With Selective Pad-To-Pad Bypass of Internal Circuitry) | |
| EP0725356A3 (en) | Semiconductor device, semiconductor circuit in which the device is used and correlation calculator, signal converter and signal processing system in which the circuit is used | |
| JP4234243B2 (ja) | 入力バッファを備える半導体装置 | |
| WO2002101349A3 (de) | Vorrichtung und ein verfahren zur umsetzung einer diagnoseschnittstelle auf standard-spi | |
| GB2328570B (en) | Signal transmission circuit,cmos semiconductor device,and circuit board | |
| TW343387B (en) | Semiconductor device | |
| EP0772143A3 (en) | Parallel signal processing circuit, semiconductor device having this circuit, and signal processing system having this circuit | |
| JPS63188961A (ja) | 半導体集積回路用パツケ−ジ | |
| JP3083627U (ja) | 外付記憶装置 | |
| JP2001273246A5 (ja) | 情報処理装置 | |
| JPH0255318U (enExample) | ||
| JP2003108441A (ja) | 秘匿データ処理回路 | |
| KR920020884A (ko) | 버스 점유 중재장치 |