TWI563505B - Adaptive contorl method based on input clock and related adaptive contorlled apparatus - Google Patents

Adaptive contorl method based on input clock and related adaptive contorlled apparatus

Info

Publication number
TWI563505B
TWI563505B TW103105734A TW103105734A TWI563505B TW I563505 B TWI563505 B TW I563505B TW 103105734 A TW103105734 A TW 103105734A TW 103105734 A TW103105734 A TW 103105734A TW I563505 B TWI563505 B TW I563505B
Authority
TW
Taiwan
Prior art keywords
adaptive
contorlled
method based
input clock
contorl
Prior art date
Application number
TW103105734A
Other languages
Chinese (zh)
Other versions
TW201533738A (en
Inventor
Tah Kang Ting
Li Chin Tien
Original Assignee
Piecemakers Technology Inc
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Piecemakers Technology Inc filed Critical Piecemakers Technology Inc
Priority to TW103105734A priority Critical patent/TWI563505B/en
Priority to US14/623,511 priority patent/US20150235678A1/en
Publication of TW201533738A publication Critical patent/TW201533738A/en
Application granted granted Critical
Publication of TWI563505B publication Critical patent/TWI563505B/en

Links

Classifications

    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C7/00—Arrangements for writing information into, or reading information out from, a digital store
    • G11C7/06—Sense amplifiers; Associated circuits, e.g. timing or triggering circuits
    • G11C7/08—Control thereof
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C11/00—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor
    • G11C11/21—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements
    • G11C11/34—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices
    • G11C11/40—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors
    • G11C11/401—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors forming cells needing refreshing or charge regeneration, i.e. dynamic cells
    • G11C11/4063—Auxiliary circuits, e.g. for addressing, decoding, driving, writing, sensing or timing
    • G11C11/407—Auxiliary circuits, e.g. for addressing, decoding, driving, writing, sensing or timing for memory cells of the field-effect type
    • G11C11/4076—Timing circuits
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C11/00—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor
    • G11C11/21—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements
    • G11C11/34—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices
    • G11C11/40—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors
    • G11C11/401—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors forming cells needing refreshing or charge regeneration, i.e. dynamic cells
    • G11C11/4063—Auxiliary circuits, e.g. for addressing, decoding, driving, writing, sensing or timing
    • G11C11/407—Auxiliary circuits, e.g. for addressing, decoding, driving, writing, sensing or timing for memory cells of the field-effect type
    • G11C11/409—Read-write [R-W] circuits 
    • G11C11/4091—Sense or sense/refresh amplifiers, or associated sense circuitry, e.g. for coupled bit-line precharging, equalising or isolating
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C11/00—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor
    • G11C11/21—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements
    • G11C11/34—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices
    • G11C11/40—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors
    • G11C11/41—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors forming static cells with positive feedback, i.e. cells not needing refreshing or charge regeneration, e.g. bistable multivibrator or Schmitt trigger
    • G11C11/413—Auxiliary circuits, e.g. for addressing, decoding, driving, writing, sensing, timing or power reduction
    • G11C11/417—Auxiliary circuits, e.g. for addressing, decoding, driving, writing, sensing, timing or power reduction for memory cells of the field-effect type
    • G11C11/419—Read-write [R-W] circuits
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C7/00—Arrangements for writing information into, or reading information out from, a digital store
    • G11C7/22—Read-write [R-W] timing or clocking circuits; Read-write [R-W] control signal generators or management 
    • G11C7/222—Clock generating, synchronizing or distributing circuits within memory device
TW103105734A 2014-02-20 2014-02-20 Adaptive contorl method based on input clock and related adaptive contorlled apparatus TWI563505B (en)

Priority Applications (2)

Application Number Priority Date Filing Date Title
TW103105734A TWI563505B (en) 2014-02-20 2014-02-20 Adaptive contorl method based on input clock and related adaptive contorlled apparatus
US14/623,511 US20150235678A1 (en) 2014-02-20 2015-02-17 Adaptive control method based on input clock and related adaptive controlled apparatus

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
TW103105734A TWI563505B (en) 2014-02-20 2014-02-20 Adaptive contorl method based on input clock and related adaptive contorlled apparatus

Publications (2)

Publication Number Publication Date
TW201533738A TW201533738A (en) 2015-09-01
TWI563505B true TWI563505B (en) 2016-12-21

Family

ID=53798654

Family Applications (1)

Application Number Title Priority Date Filing Date
TW103105734A TWI563505B (en) 2014-02-20 2014-02-20 Adaptive contorl method based on input clock and related adaptive contorlled apparatus

Country Status (2)

Country Link
US (1) US20150235678A1 (en)
TW (1) TWI563505B (en)

Citations (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US6009030A (en) * 1996-12-28 1999-12-28 Hyundai Electronics Industries Co., Ltd. Sense amplifier enable signal generating circuit of semiconductor memory devices
US20040202039A1 (en) * 2003-04-11 2004-10-14 Sun Microsystems, Inc. Programmable delay for self-timed-margin
US7065002B2 (en) * 2004-08-11 2006-06-20 Fujitsu Limited Memory device, memory device read method
US7936590B2 (en) * 2008-12-08 2011-05-03 Qualcomm Incorporated Digitally-controllable delay for sense amplifier
US8243535B2 (en) * 2009-03-25 2012-08-14 Samsung Electronics Co., Ltd. Semiconductor memory device comprising variable delay circuit
US20130170306A1 (en) * 2011-12-29 2013-07-04 Stmicroelectronics Pvt. Ltd. Memory architecture and design methodology with adaptive read

Family Cites Families (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5708624A (en) * 1996-11-27 1998-01-13 Monolithic System Technology, Inc. Method and structure for controlling internal operations of a DRAM array
JPH10269775A (en) * 1997-03-27 1998-10-09 Mitsubishi Electric Corp Semiconductor integrated circuit and phase-locked loop circuit
JP3800164B2 (en) * 2002-10-18 2006-07-26 ソニー株式会社 Information processing device, information storage device, information processing method, and information processing program

Patent Citations (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US6009030A (en) * 1996-12-28 1999-12-28 Hyundai Electronics Industries Co., Ltd. Sense amplifier enable signal generating circuit of semiconductor memory devices
US20040202039A1 (en) * 2003-04-11 2004-10-14 Sun Microsystems, Inc. Programmable delay for self-timed-margin
US7065002B2 (en) * 2004-08-11 2006-06-20 Fujitsu Limited Memory device, memory device read method
US7936590B2 (en) * 2008-12-08 2011-05-03 Qualcomm Incorporated Digitally-controllable delay for sense amplifier
US8243535B2 (en) * 2009-03-25 2012-08-14 Samsung Electronics Co., Ltd. Semiconductor memory device comprising variable delay circuit
US20130170306A1 (en) * 2011-12-29 2013-07-04 Stmicroelectronics Pvt. Ltd. Memory architecture and design methodology with adaptive read

Also Published As

Publication number Publication date
US20150235678A1 (en) 2015-08-20
TW201533738A (en) 2015-09-01

Similar Documents

Publication Publication Date Title
GB201507384D0 (en) Control apparatus and related method
GB201409086D0 (en) Apparatus and method
EP3206136A4 (en) Highly effective input prediction method and device
EP3222471A4 (en) Input device and input method therefor
GB201409077D0 (en) Apparatus and method
GB201409064D0 (en) Method and apparatus
GB201418539D0 (en) Apparatus and method
SG10201504331XA (en) Frequency Control Method And Frequency Control Apparatus
GB201405662D0 (en) Apparatus and method
GB201516238D0 (en) Apparatus and method
GB201418199D0 (en) Method and apparatus
GB201415599D0 (en) Method and apparatus
GB201406332D0 (en) Apparatus and method
GB201506947D0 (en) Apparatus and method
GB201418538D0 (en) Apparatus and method
SG10201500936YA (en) Electronic apparatus and control method thereof
GB201415873D0 (en) Apparatus And Method
GB201411726D0 (en) Apparatus and method
GB201411631D0 (en) Apparatus and method
GB201405663D0 (en) Apparatus and method
EP3249507C0 (en) Input apparatus and input operation method therefor
GB201513190D0 (en) Method and apparatus
GB201418540D0 (en) Apparatus and method
GB201412726D0 (en) Method and apparatus
GB201410964D0 (en) Apparatus and method