JPH10241354A5 - - Google Patents

Info

Publication number
JPH10241354A5
JPH10241354A5 JP1997037683A JP3768397A JPH10241354A5 JP H10241354 A5 JPH10241354 A5 JP H10241354A5 JP 1997037683 A JP1997037683 A JP 1997037683A JP 3768397 A JP3768397 A JP 3768397A JP H10241354 A5 JPH10241354 A5 JP H10241354A5
Authority
JP
Japan
Prior art keywords
list
lines
module
read
steps
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP1997037683A
Other languages
English (en)
Japanese (ja)
Other versions
JPH10241354A (ja
Filing date
Publication date
Application filed filed Critical
Priority to JP9037683A priority Critical patent/JPH10241354A/ja
Priority claimed from JP9037683A external-priority patent/JPH10241354A/ja
Priority to US08/876,048 priority patent/US6067605A/en
Priority to KR1019970043250A priority patent/KR100262434B1/ko
Publication of JPH10241354A publication Critical patent/JPH10241354A/ja
Publication of JPH10241354A5 publication Critical patent/JPH10241354A5/ja
Pending legal-status Critical Current

Links

JP9037683A 1997-02-21 1997-02-21 双方向転送型記憶装置及びメモリの入出力制御方法 Pending JPH10241354A (ja)

Priority Applications (3)

Application Number Priority Date Filing Date Title
JP9037683A JPH10241354A (ja) 1997-02-21 1997-02-21 双方向転送型記憶装置及びメモリの入出力制御方法
US08/876,048 US6067605A (en) 1997-02-21 1997-06-13 Bidirectional transfer type storage and method for controlling input and output of memory
KR1019970043250A KR100262434B1 (ko) 1997-02-21 1997-08-29 쌍방향 전송형 기억장치 및 메모리의 입출력 제어방법

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP9037683A JPH10241354A (ja) 1997-02-21 1997-02-21 双方向転送型記憶装置及びメモリの入出力制御方法

Publications (2)

Publication Number Publication Date
JPH10241354A JPH10241354A (ja) 1998-09-11
JPH10241354A5 true JPH10241354A5 (cg-RX-API-DMAC7.html) 2004-09-09

Family

ID=12504406

Family Applications (1)

Application Number Title Priority Date Filing Date
JP9037683A Pending JPH10241354A (ja) 1997-02-21 1997-02-21 双方向転送型記憶装置及びメモリの入出力制御方法

Country Status (3)

Country Link
US (1) US6067605A (cg-RX-API-DMAC7.html)
JP (1) JPH10241354A (cg-RX-API-DMAC7.html)
KR (1) KR100262434B1 (cg-RX-API-DMAC7.html)

Families Citing this family (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP4627823B2 (ja) * 1999-06-25 2011-02-09 三洋電機株式会社 表示装置の制御回路
GB2417360B (en) * 2003-05-20 2007-03-28 Kagutech Ltd Digital backplane
US10690072B2 (en) 2016-10-19 2020-06-23 Ford Global Technologies, Llc Method and system for catalytic conversion

Family Cites Families (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5958689A (ja) * 1982-09-28 1984-04-04 Fujitsu Ltd 半導体記憶装置
US4665482A (en) * 1983-06-13 1987-05-12 Honeywell Information Systems Inc. Data multiplex control facility
JPH04248729A (ja) * 1991-02-05 1992-09-04 Fujitsu Ltd Ａｔｍ交換機
EP0778703A3 (en) * 1992-03-24 1999-03-31 Kabushiki Kaisha Toshiba Variable length code recording/playback apparatus
US5442282A (en) * 1992-07-02 1995-08-15 Lsi Logic Corporation Testing and exercising individual, unsingulated dies on a wafer
JPH06224933A (ja) * 1993-01-22 1994-08-12 Toshiba Corp バッファメモリ装置

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