JPH10125826A - Semiconductor device and manufacture thereof - Google Patents
Semiconductor device and manufacture thereofInfo
- Publication number
- JPH10125826A JPH10125826A JP8282054A JP28205496A JPH10125826A JP H10125826 A JPH10125826 A JP H10125826A JP 8282054 A JP8282054 A JP 8282054A JP 28205496 A JP28205496 A JP 28205496A JP H10125826 A JPH10125826 A JP H10125826A
- Authority
- JP
- Japan
- Prior art keywords
- resin
- heat sink
- lead frame
- adhesive sheet
- thermosetting resin
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/26—Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
- H01L2224/31—Structure, shape, material or disposition of the layer connectors after the connecting process
- H01L2224/32—Structure, shape, material or disposition of the layer connectors after the connecting process of an individual layer connector
- H01L2224/321—Disposition
- H01L2224/32151—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
- H01L2224/32221—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
- H01L2224/32245—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
- H01L2224/4805—Shape
- H01L2224/4809—Loop shape
- H01L2224/48091—Arched
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
- H01L2224/481—Disposition
- H01L2224/48151—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
- H01L2224/48221—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
- H01L2224/48245—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic
- H01L2224/48247—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic connecting the wire to a bond pad of the item
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/73—Means for bonding being of different types provided for in two or more of groups H01L2224/10, H01L2224/18, H01L2224/26, H01L2224/34, H01L2224/42, H01L2224/50, H01L2224/63, H01L2224/71
- H01L2224/732—Location after the connecting process
- H01L2224/73251—Location after the connecting process on different surfaces
- H01L2224/73265—Layer and wire connectors
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/10—Details of semiconductor or other solid state devices to be connected
- H01L2924/11—Device type
- H01L2924/13—Discrete devices, e.g. 3 terminal devices
- H01L2924/1304—Transistor
- H01L2924/1305—Bipolar Junction Transistor [BJT]
- H01L2924/13055—Insulated gate bipolar transistor [IGBT]
Landscapes
- Structures Or Materials For Encapsulating Or Coating Semiconductor Devices Or Solid State Devices (AREA)
- Cooling Or The Like Of Semiconductors Or Solid State Devices (AREA)
Abstract
Description
【０００１】[0001]
【発明の属する技術分野】本発明は複数の半導体チップ
がリードフレーム上に搭載され、熱硬化性樹脂で気密封
止された半導体装置及びその製法に関し、リードフレー
ムと放熱用ヒートシンクとの絶縁を絶縁接着シートで確
保した半導体装置及びその製法に関する。BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a semiconductor device in which a plurality of semiconductor chips are mounted on a lead frame and hermetically sealed with a thermosetting resin and a method of manufacturing the same, and insulates the lead frame from a heat sink for heat radiation. The present invention relates to a semiconductor device secured by an adhesive sheet and a method for manufacturing the same.
【０００２】[0002]
【従来の技術】Ａｌ又はＣｕからなる金属ベース上がセ
ラミックス又は有機物からなる絶縁材で覆われ、該絶縁
材上がＡｌ又はＣｕからなる金属箔で回路が形成され、
該回路上に複数の半導体素子が配置された半導体モジュ
ールを樹脂で気密封止することは周知のとおりである。2. Description of the Related Art A metal base made of Al or Cu is covered with an insulating material made of ceramics or an organic substance, and a circuit is formed on the insulating material by a metal foil made of Al or Cu.
It is well known that a semiconductor module having a plurality of semiconductor elements arranged on the circuit is hermetically sealed with a resin.
【０００３】樹脂で気密封止した例としては、特開昭60
−74655 号で開示されているように、複数の半導体素子
が搭載された金属ベース回路基板の側面をケースで覆
い、シリコーン系のゲルを注入し、その上をエポキシ系
樹脂でモールドしたものがある。この場合は、前記樹脂
の流失を防止する気密封止のためのケースが必要であ
り、これを接着するための熱処理，シリコーン系ゲルや
エポキシ系等樹脂の２度の熱硬化等３度の熱処理があり
プロセスが煩雑であること、ケースを用いるため部品点
数が増える等コストを圧迫する問題があった。An example of hermetically sealing with resin is disclosed in
As disclosed in -74655, a metal-based circuit board on which a plurality of semiconductor elements are mounted is covered with a case, a silicone-based gel is injected, and an epoxy-based resin is molded thereon. . In this case, it is necessary to provide a case for hermetic sealing to prevent the resin from flowing out, and to perform a heat treatment for bonding the resin, a heat treatment for the silicone gel or epoxy resin and the like three times, such as a second heat curing. However, there is a problem that the process is complicated, and the use of a case increases the number of parts, thereby reducing costs.
【０００４】一方、最近になって、前記モジュールの樹
脂を金型中に加圧封入することによってケースを排した
モジュール、特公平6−80748号が開示されている。この
例について図８によって説明する。On the other hand, recently, Japanese Patent Publication No. 6-80748 discloses a module in which the case is discharged by pressurizing and sealing the resin of the module in a mold. This example will be described with reference to FIG.
【０００５】半導体素子４はリードフレーム２のベット
部２．１に接合し、更に該半導体素子４と外部回路と接
続するためのリード部２．２間をＡｌのボンディングワ
イヤ５等で連結したものを金型に入れ、第１のモールド
樹脂６．１で気密封止する。ここまでの工程はＴＯ−２
２０等従来既知の非絶縁型個別素子等で行われているモ
ールド法と同じ形態である。次いで金型中にヒートシン
ク１と、先の第１のモールド樹脂６．１で気密封止され
たリードフレーム２を入れ、第２のモールド樹脂６．２
で気密封止する。この場合、ヒートシンク１とリードフ
レームのベット部２．１間は絶縁のための第２のモール
ド樹脂６．２が均一に挿入される。この層が絶縁層をな
す。The semiconductor element 4 is joined to the bet portion 2.1 of the lead frame 2, and the lead section 2.2 for connecting the semiconductor element 4 to an external circuit is connected by an Al bonding wire 5 or the like. Into a mold, and hermetically sealed with a first mold resin 6.1. The process up to this point is TO-2
This is the same form as the molding method used for conventionally known non-insulated individual elements and the like. Next, the heat sink 1 and the lead frame 2 hermetically sealed with the first molding resin 6.1 are put into a mold, and the second molding resin 6.2 is formed.
And hermetically sealed. In this case, the second mold resin 6.2 for insulation is uniformly inserted between the heat sink 1 and the bet portion 2.1 of the lead frame. This layer forms an insulating layer.
【０００６】[0006]
【発明が解決しようとする課題】しかしながら、（１）
これには絶縁層の厚さが安定にできないこと、（２）リ
ードとヒートシンク間の縁面距離が短いこと、（３）２
回の樹脂注入が必要であること等の欠点がある。絶縁層
の厚さが安定にできないという（１）に関しては、薄い
場合は絶縁耐圧不良、厚い場合には熱抵抗の増大、リー
ド−ヒートシンク間の縁面距離が短いこと、（２）に関
しては、前者同様絶縁耐圧不良という問題があり、
（３）はプロセス及びコストの増大という問題である。
前記(１)，(３)は予め絶縁層と回路配線がなされた従来
公知の絶縁金属基板（メタルコア）等を用いればよいこ
とも考えられるが、コスト的に折り合わないことや外部
への引出用リードを後付けするなどプロセス的にも煩雑
となる。However, (1)
This is because the thickness of the insulating layer cannot be stabilized, (2) the edge surface distance between the lead and the heat sink is short, (3) 2
There are drawbacks such as the necessity of multiple resin injections. Regarding (1) that the thickness of the insulating layer cannot be stabilized, when the thickness is thin, the withstand voltage is poor, when the thickness is thick, the thermal resistance increases, and the edge distance between the lead and the heat sink is short. As with the former, there is a problem of poor dielectric strength,
The problem (3) is an increase in process and cost.
For (1) and (3), it is conceivable to use a conventionally known insulated metal substrate (metal core) or the like in which an insulating layer and circuit wiring have been formed in advance. The process becomes complicated, such as attaching leads.
【０００７】[0007]
【課題を解決するための手段】従って、前記（１)，
(３）を解決するには予め半導体素子が接合され、所望
の位置にＡｌ，Ｃｕ等からなるワイヤで結線がなされた
Ｃｕ又はＣｕ合金からなるリードフレームと有機物から
なる絶縁接着シート及びＡｌ又はＣｕあるいはＡｌ又は
Ｃｕを主成分とする合金からなる金属ベース又はヒート
シンクを用意し、それぞれを所望の位置に合わせて仮圧
着する。ここでの接着は、樹脂の硬化を目的としないた
め、温度は樹脂のガラス転移温度以下でよく、圧力も押
さえる程度の低いものでよい。Accordingly, the above (1),
In order to solve (3), a semiconductor element is joined in advance, and a lead frame made of Cu or a Cu alloy connected to a desired position with a wire made of Al, Cu, or the like, an insulating adhesive sheet made of an organic material, and Al or Cu. Alternatively, a metal base or a heat sink made of an alloy containing Al or Cu as a main component is prepared, and each is temporarily press-bonded to a desired position. Since the bonding here does not aim at curing the resin, the temperature may be lower than the glass transition temperature of the resin and may be low enough to suppress the pressure.
【０００８】仮止めされた絶縁接着シートでリードフレ
ーム及び金属ベース又はヒートシンクは所望の形状をし
た金型に入れ熱硬化性の樹脂、例えばエポキシ系樹脂を
加圧注入して気密封止する。リードフレームと金属ベー
ス又はヒートシンクとの接着及び絶縁接着シートの硬化
は、この工程及びその後の熱処理（キュアー）によって
行われる。ここで用いられる絶縁接着シートは熱硬化性
の樹脂であって、樹脂中には６０〜９０重量％のアルミ
ナあるいはシリカ等からなる無機質フィラーが充填され
た半硬化のシートである。The lead frame and the metal base or the heat sink are temporarily sealed and placed in a mold having a desired shape, and a thermosetting resin, for example, an epoxy resin is injected under pressure and hermetically sealed. The bonding between the lead frame and the metal base or the heat sink and the curing of the insulating adhesive sheet are performed by this step and the subsequent heat treatment (curing). The insulating adhesive sheet used here is a thermosetting resin, and is a semi-cured sheet in which 60 to 90% by weight of an inorganic filler such as alumina or silica is filled.
【０００９】一方、縁面の絶縁耐圧を向上させるには、
外部回路と接続するためのリードの取り出し位置を通常
のモジュール、例えば、特開昭60−74655 号で開示され
ているようにヒートシンクに対して垂直方向でモールド
樹脂の表面側に配置すればよい。以下、実施例を図によ
って説明する。On the other hand, in order to improve the dielectric strength of the edge surface,
The lead extraction position for connecting to the external circuit may be arranged on the surface of the mold resin in a direction perpendicular to the heat sink as disclosed in Japanese Patent Application Laid-Open No. 60-74655. Hereinafter, embodiments will be described with reference to the drawings.
【００１０】[0010]
【発明の実施の形態】図１(ａ）は整流ダイオード４．
１の群からなるコンバ−タとＩＧＢＴ４．２,ＦＷＤ
４．３の群からなるインバータで構成されたモジュール
の平面図で、(ｂ)は断面図である。整流ダイオード４．
１及びＩＧＢＴ４．２，ＦＷＤ４．３は全てリードフレ
ーム２上に接合され、該リードフレーム２は絶縁接着シ
ート７を介して金属ベースあるいは金属からなるヒート
シンク１上に搭載されている。DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS FIG.
1 group of converters and IGBT 4.2, FWD
FIG. 4B is a plan view of a module constituted by the inverters of the group 4.3, and FIG. 4B is a cross-sectional view. Rectifier diode4.
1 and the IGBTs 4.2 and FWD 4.3 are all bonded on a lead frame 2, and the lead frame 2 is mounted on a metal base or a heat sink 1 made of metal via an insulating adhesive sheet 7.
【００１１】以下、このモジュールの組立て法を図２で
説明する。Hereinafter, a method of assembling the module will be described with reference to FIG.
【００１２】（ａ）予め、半導体チップ４が接合された
リードフレーム２と絶縁接着シート７、及び金属ベース
あるいは金属からなるヒートシンク１とを重ね合わせ、
(ｂ)仮接着する。この場合、圧力は押さえるだけの力が
あればよく、また、温度も樹脂のガラス転移温度以下で
あればよい。つまり、接着はモールド用の樹脂を金型中
に加圧封入する際行われるからである。（ｃ）該リード
フレーム２，絶縁接着シート７、及び金属ベースあるい
は金属からなるヒートシンク１とを仮に接着した試料
(ｂ)は金型８に入れ、モールド用樹脂で加圧封止する。
絶縁接着シートの接着をホットプレス等で圧力と温度を
かけて行った場合、以下の欠点が生じ好ましくない。絶
縁接着シートの接着は、図３で示す作用によってなされ
る。(A) The lead frame 2 to which the semiconductor chip 4 has been bonded, the insulating adhesive sheet 7 and the heat sink 1 made of a metal base or metal are overlapped in advance.
(b) Temporarily bond. In this case, the pressure only needs to have a force enough to suppress the pressure, and the temperature need only be lower than the glass transition temperature of the resin. That is, the bonding is performed when the resin for molding is sealed under pressure in the mold. (C) A sample in which the lead frame 2, the insulating adhesive sheet 7, and the heat sink 1 made of a metal base or metal are temporarily bonded.
(b) is placed in a mold 8 and sealed with a molding resin under pressure.
When the bonding of the insulating adhesive sheet is performed by applying pressure and temperature by a hot press or the like, the following defects occur, which is not preferable. The bonding of the insulating adhesive sheet is performed by the operation shown in FIG.
【００１３】すなわち、（ａ）で示すように、モールド
用樹脂を封入する際金型内部の各部にはほぼ均等に圧力
がかかる。半導体チップ４等が搭載されたリードフレー
ム２とヒートシンク１とが絶縁接着シート７で所望の位
置で仮止めした試料を金型８に入れ熱硬化性のエポキシ
系樹脂を加圧封入する。この時、金型は樹脂を封入する
部分のみ開口されているのみで他は密封状態にあり、圧
力はほぼ均等にかかる。ここで、モールド樹脂６と絶縁
接着シート７はガラス転移温度以上に温められているの
で、該リードフレーム２とヒートシンク１あるいは半導
体チップ４等に密着するとともに硬化が進行する。
（ｂ）は、前記した手法でモールドしたモジュールの拡
大断面図であり、リードフレーム２のそれぞれのパター
ンは絶縁接着シート７に埋没することなく接着すること
ができる。しかしながら、リードフレーム２とヒートシ
ンク１との接着をホットプレスや圧延ロール等を用いる
通常の手法で行った場合は、（ｃ）で示したようにリー
ドフレーム２は絶縁接着シート７に埋没し絶縁層が薄く
なるばかりか、矢印で示したリードフレーム端面部分に
亀裂が入り絶縁特性の低下の原因ともなっていた。That is, as shown in (a), when sealing the molding resin, pressure is applied almost equally to each part inside the mold. A sample in which the lead frame 2 on which the semiconductor chip 4 and the like are mounted and the heat sink 1 are temporarily fixed at desired positions with an insulating adhesive sheet 7 is placed in a mold 8 and a thermosetting epoxy resin is sealed under pressure. At this time, the mold is opened only at the portion where the resin is sealed, and the other portions are in a sealed state, and the pressure is applied substantially uniformly. Here, since the mold resin 6 and the insulating adhesive sheet 7 are heated to a temperature equal to or higher than the glass transition temperature, the lead frame 2 and the heat sink 1 or the semiconductor chip 4 and the like are brought into close contact with each other and hardening proceeds.
FIG. 2B is an enlarged cross-sectional view of the module molded by the above-described method. Each pattern of the lead frame 2 can be bonded without being buried in the insulating adhesive sheet 7. However, when the bonding between the lead frame 2 and the heat sink 1 is performed by a normal method using a hot press or a rolling roll, the lead frame 2 is buried in the insulating adhesive sheet 7 as shown in FIG. Not only became thinner, but also cracks were formed in the end face of the lead frame indicated by the arrow, which was a cause of a decrease in insulation properties.
【００１４】また、図４はリードフレーム２とヒートシ
ンク１との接着状況を説明する図である。ここで、リー
ドフレーム２及びヒートシンク１の２つの金属材料の絶
縁接着シート７とが接着される表面、少なくとも接着面
が粗面加工されていることが重要である。これはリード
フレーム２及びヒートシンク１と絶縁接着シート７との
接着のための表面積を増やして、密着性を増すとともに
アンカー効果による接着の強度を確保するためでもあ
る。しかしながら、この粗面化にも限度があり、谷にあ
たるａ部と山にあたるｂ部との高低差が使用する絶縁接
着シート７の厚みの７％を超えない値でなけなければな
らない。これ以上の高低差がある場合は、絶縁接着シー
ト７の実質厚みが薄くなること及び亀裂が生じる等して
絶縁特性を低下させるため避けなければならない。FIG. 4 is a view for explaining the state of adhesion between the lead frame 2 and the heat sink 1. Here, it is important that the surface of the lead frame 2 and the heat sink 1 where the two metal materials are bonded to the insulating bonding sheet 7, at least the bonding surface, is roughened. This is also to increase the surface area for bonding between the lead frame 2 and the heat sink 1 and the insulating adhesive sheet 7 to increase the adhesion and to secure the bonding strength by the anchor effect. However, there is a limit to this roughening, and the height difference between the part a corresponding to the valley and the part b corresponding to the peak must be a value that does not exceed 7% of the thickness of the insulating adhesive sheet 7 used. If the height difference is larger than this, the insulating adhesive sheet 7 must be avoided because the substantial thickness of the insulating adhesive sheet 7 is reduced and the insulating properties are deteriorated due to cracks.
【００１５】一方、ここで用いられる絶縁接着シート７
は樹脂成分中に重量比で６０〜９５％の無機成分、例え
ばアルミナ（Ａｌ2Ｏ3）等の金属酸化物が充填されてい
る。これは、樹脂の熱伝導率と膨張係数を改善するため
である。図５は、本発明になる半導体モジュールに異な
る割合の無機成分を充填した絶縁接着シート（２００μ
ｍ）を用いた場合の熱抵抗を調べた結果である。ここで
は、絶縁接着シートの厚みが２００μｍの場合である
が、例えば１００μｍの絶縁接着シートを用いたときは
相対的に熱抵抗が下がることは周知の通りである。On the other hand, the insulating adhesive sheet 7 used here
The resin component is filled with 60 to 95% by weight of an inorganic component, for example, a metal oxide such as alumina (Al 2 O 3 ). This is to improve the thermal conductivity and expansion coefficient of the resin. FIG. 5 shows an insulating adhesive sheet (200 μm) in which a semiconductor module according to the present invention is filled with different proportions of inorganic components.
The result of examining the thermal resistance in the case where m) was used. Here, the thickness of the insulating adhesive sheet is 200 μm, but it is well known that, for example, when an insulating adhesive sheet having a thickness of 100 μm is used, the thermal resistance is relatively reduced.
【００１６】なお、無機成分の量が６０％を下回る場
合、熱抵抗が１.６℃／Ｗ 以上を越え、周囲温度にもよ
るがジャンクション温度を越えるなど好ましい状態でな
い。また、無機成分が９５％を越える場合にはシートを
作りにくいことやシート中に気泡が混ざりやすいこと等
の欠点がある。また、樹脂成分は熱硬化性の樹脂、例え
ばノボラック型やビスフェノール型のエポキシ樹脂が挙
げられるが、熱硬化性の樹脂であってガラス転移温度が
１００℃を越えるような樹脂であればこの限りではな
い。When the amount of the inorganic component is less than 60%, the heat resistance exceeds 1.6 ° C./W or more, and depending on the ambient temperature, it is not a preferable state such as exceeding the junction temperature. Further, when the content of the inorganic component exceeds 95%, there are disadvantages such as difficulty in producing a sheet and easy mixing of bubbles in the sheet. The resin component may be a thermosetting resin, for example, a novolak type or bisphenol type epoxy resin, but as long as the resin is a thermosetting resin and has a glass transition temperature exceeding 100 ° C. Absent.
【００１７】本発明は、図６の方法でも達成できる。つ
まり、リードフレームを（ａ）で示したように折り曲げ
ることなく、通常のトランスファモールド法のようにリ
ード部分をヒートシンク１に対し平行に出し、これを、
金型に入れる。この時、リードフレームの折曲げ部で樹
脂と接する部分に離形材９を塗付けておくか又は貼り付
けておく。（ｂ）はモールド樹脂を封入した例で、リー
ドフレーム２のある部分の上金型８．１は下金型８．２
より狭くなっている。（ｃ）は樹脂のモールド後金型か
らとり外した例である。リードはここで樹脂の側面に沿
って折り曲げられる。図７は、このリード部分の斜視図
である。（ａ）は前記図６（ｃ）のモールド後の半導体
モジュールで、リードフレーム２はヒートシンクに対し
て平行に位置している。（ｂ）はリードをヒートシンク
に対して垂直方向に折り曲げた例で、モールド樹脂の一
部には離形材９を貼り付け、更にはリードフレーム２に
沈み込んだような剥離痕９．１が残る。ただし、このま
まではリードフレーム２の側面が露出してヒートシンク
との縁面距離が短いので、（ｃ）この部分には第２のモ
ールド樹脂６．２を塗布し絶縁する。ここで用いられる
第２の樹脂は熱硬化性樹脂であっても、熱可塑性樹脂で
あってもよい。The present invention can also be achieved by the method shown in FIG. That is, without bending the lead frame as shown in (a), the lead portion is put out in parallel to the heat sink 1 as in a normal transfer molding method, and
Put in the mold. At this time, the release material 9 is applied or affixed to a portion of the lead frame that is in contact with the resin at the bent portion. (B) is an example in which a mold resin is sealed, and an upper mold 8.1 with a part of the lead frame 2 is a lower mold 8.2.
It is narrower. (C) is an example in which the resin is removed from the mold after molding. The lead is now bent along the side of the resin. FIG. 7 is a perspective view of the lead portion. FIG. 6A shows the semiconductor module after molding shown in FIG. 6C, in which the lead frame 2 is positioned parallel to the heat sink. (B) shows an example in which the lead is bent in the vertical direction with respect to the heat sink. A release material 9 is attached to a part of the mold resin, and further, a peeling mark 9.1 that sinks into the lead frame 2 is formed. Remains. However, in this state, since the side surface of the lead frame 2 is exposed and the edge surface distance with the heat sink is short, (c) the second mold resin 6.2 is applied to this part to insulate it. The second resin used here may be a thermosetting resin or a thermoplastic resin.
【００１８】[0018]
【発明の効果】ヒートシンクと半導体素子が搭載された
リードフレーム間にモールド樹脂を封入することで絶縁
をとっていた従来の半導体モジュールの欠点である、熱
抵抗等放熱特性と絶縁特性の不安定性を、本発明のよう
に一定な厚みの無機質フィラー含有絶縁接着シートを挿
入することにより改善できる。また、絶縁接着シートの
接着をモールド樹脂、すなわち、熱硬化性樹脂封入時に
行うことにより、繰り返される熱処理を省ける。また、
外部端子を入出力端子をヒートシンクに対して垂直に出
しているため、絶縁特性が向上し、また、外部回路と接
続が容易となるなどの効果がある。The disadvantages of the conventional semiconductor module, which is insulated by encapsulating a molding resin between the heat sink and the lead frame on which the semiconductor element is mounted, which are disadvantages of the heat dissipation characteristics such as thermal resistance and the instability of the insulation characteristics. It can be improved by inserting an inorganic filler-containing insulating adhesive sheet having a constant thickness as in the present invention. Further, by performing the bonding of the insulating adhesive sheet at the time of encapsulating the mold resin, that is, the thermosetting resin, the repeated heat treatment can be omitted. Also,
Since the external terminals are arranged so that the input / output terminals are perpendicular to the heat sink, there is an effect that the insulation characteristics are improved and the connection with an external circuit is facilitated.
【図１】本発明の半導体モジュールで用いられる回路の
正面図。FIG. 1 is a front view of a circuit used in a semiconductor module of the present invention.
【図２】本発明の製造方法を説明する図。FIG. 2 is a diagram illustrating a manufacturing method of the present invention.
【図３】本発明の作用を説明する図。FIG. 3 is a diagram illustrating the operation of the present invention.
【図４】本発明の接着構造を説明する図。FIG. 4 is a diagram illustrating an adhesive structure according to the present invention.
【図５】本発明で使用される絶縁接着シートを説明する
図。FIG. 5 is a diagram illustrating an insulating adhesive sheet used in the present invention.
【図６】本発明の第２の製法及びリード部分の拡大図。FIG. 6 is an enlarged view of a second manufacturing method and a lead portion of the present invention.
【図７】本発明の第２の製法及びリード部分の拡大図。FIG. 7 is an enlarged view of a second manufacturing method and a lead portion of the present invention.
【図８】従来法を説明する図。FIG. 8 is a diagram illustrating a conventional method.
１…ヒートシンク、２…リードフレーム、２．１…ベッ
ト部、２．２…リード部、３…はんだ、４…半導体チッ
プ、５…ボンディングワイヤ、６…モールド樹脂、６．
１…第１のモールド樹脂、６．２…第２のモールド樹
脂、７…絶縁接着シート、８…金型、８．１…上金型、
８．２…下金型、９…離形材、９．１…剥離痕。DESCRIPTION OF SYMBOLS 1 ... Heat sink, 2 ... Lead frame, 2.1 ... Bet part, 2.2 ... Lead part, 3 ... Solder, 4 ... Semiconductor chip, 5 ... Bonding wire, 6 ... Mold resin, 6 ...
1: first mold resin, 6.2: second mold resin, 7: insulating adhesive sheet, 8: mold, 8.1: upper mold,
8.2: Lower mold, 9: Release material, 9.1: Peeling mark.
───────────────────────────────────────────────────── フロントページの続き (72)発明者 神村 典孝 茨城県日立市大みか町七丁目１番１号 株 式会社日立製作所日立研究所内 (72)発明者 鈴木 和弘 茨城県日立市大みか町七丁目１番１号 株 式会社日立製作所日立研究所内 (72)発明者 遠藤 常博 千葉県習志野市東習志野七丁目１番１号 株式会社日立製作所産業機器事業部内 ────────────────────────────────────────────────── ─── Continuing on the front page (72) Noritaka Kamimura 7-1-1, Omika-cho, Hitachi City, Ibaraki Prefecture Inside Hitachi Research Laboratory, Hitachi, Ltd. (72) Kazuhiro Suzuki 7-1-1, Omika-cho, Hitachi City, Ibaraki Prefecture No. 1 Hitachi, Ltd. Hitachi Research Laboratory (72) Inventor Tsunehiro Endo 7-1-1 Higashi Narashino, Narashino City, Chiba Prefecture Inside the Hitachi, Ltd. Industrial Equipment Division
Claims (3)
るいは抵抗，コンデンサ等電子部品が搭載され、熱硬化
性樹脂でモールドされた半導体装置において、 金属材からなる放熱板等ヒートシンクと該リードフレー
ムとを有機樹脂からなる絶縁接着シートを介して接着
し、熱硬化性樹脂で気密封止された半導体装置。In a semiconductor device in which a plurality of semiconductor chips or electronic components such as resistors and capacitors are mounted on a lead frame and molded with a thermosetting resin, a heat sink such as a heat sink made of a metal material and the lead frame are connected. A semiconductor device bonded through an insulating adhesive sheet made of an organic resin and hermetically sealed with a thermosetting resin.
るいは抵抗，コンデンサ等電子部品が搭載し、熱硬化性
樹脂でモールドする半導体装置の製法において、 複数の半導体チップあるいは抵抗，コンデンサ等電子部
品が搭載されたリードフレームとＡｌ又はＣｕあるいは
それらの合金からなる放熱板等ヒートシンク間に有機樹
脂からなる絶縁接着シートを挿入して積層し、該絶縁接
着シートの硬化を熱硬化性樹脂を加圧封止と同時に硬化
させることを特徴とする半導体装置の製法。2. A method of manufacturing a semiconductor device in which a plurality of semiconductor chips or electronic components such as resistors and capacitors are mounted on a lead frame and molded with a thermosetting resin, a plurality of electronic components such as semiconductor chips or resistors and capacitors are mounted. An insulating adhesive sheet made of an organic resin is inserted and laminated between a lead frame and a heat sink such as a heat sink made of Al or Cu or an alloy thereof, and the insulating adhesive sheet is cured by pressure sealing a thermosetting resin. A method of manufacturing a semiconductor device, characterized by curing at the same time.
るいは抵抗，コンデンサ等電子部品が搭載し、熱硬化性
樹脂でモールドする半導体装置の製法において、 熱硬化性樹脂でモールドする時に、リードフレームでモ
ールド後に樹脂から露出するリード部分を放熱板等ヒー
トシンクと水平方向になるように折り曲げ加工し、樹脂
をモールドした後、樹脂から露出したリード部分を放熱
板等ヒートシンクと垂直方向に折り曲げることを特徴と
する半導体装置の製法。3. A method of manufacturing a semiconductor device in which a plurality of semiconductor chips or electronic components such as resistors and capacitors are mounted on a lead frame and molded with a thermosetting resin. The lead portion exposed later from the resin is bent so as to be horizontal with the heat sink such as a heat sink, and after molding the resin, the lead portion exposed from the resin is bent vertically with the heat sink such as the heat sink. Manufacturing method of semiconductor device.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP8282054A JPH10125826A (en) | 1996-10-24 | 1996-10-24 | Semiconductor device and manufacture thereof |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP8282054A JPH10125826A (en) | 1996-10-24 | 1996-10-24 | Semiconductor device and manufacture thereof |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| JPH10125826A true JPH10125826A (en) | 1998-05-15 |
Family
ID=17647566
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP8282054A Pending JPH10125826A (en) | 1996-10-24 | 1996-10-24 | Semiconductor device and manufacture thereof |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPH10125826A (en) |
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| JP2018088558A (en) * | 2018-03-01 | 2018-06-07 | ローム株式会社 | Semiconductor device |
| JP2019140398A (en) * | 2019-04-01 | 2019-08-22 | ローム株式会社 | Power module and method for manufacturing the same |
| CN112701093A (en) * | 2019-10-23 | 2021-04-23 | 三菱电机株式会社 | Semiconductor module and power conversion device |
| JP2021068803A (en) * | 2019-10-23 | 2021-04-30 | 三菱電機株式会社 | Semiconductor module and power converter |
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