JPH0831546B2 - High power circuit board and hybrid integrated circuit thereof - Google Patents

High power circuit board and hybrid integrated circuit thereof

Info

Publication number
JPH0831546B2
JPH0831546B2 JP62182877A JP18287787A JPH0831546B2 JP H0831546 B2 JPH0831546 B2 JP H0831546B2 JP 62182877 A JP62182877 A JP 62182877A JP 18287787 A JP18287787 A JP 18287787A JP H0831546 B2 JPH0831546 B2 JP H0831546B2
Authority
JP
Japan
Prior art keywords
circuit
aluminum
foil
circuit board
insulating layer
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Fee Related
Application number
JP62182877A
Other languages
Japanese (ja)
Other versions
JPS6425554A (en
Inventor
和男 加藤
辰夫 中野
新一郎 浅井
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Denka Co Ltd
Original Assignee
Denki Kagaku Kogyo KK
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Denki Kagaku Kogyo KK filed Critical Denki Kagaku Kogyo KK
Priority to JP62182877A priority Critical patent/JPH0831546B2/en
Publication of JPS6425554A publication Critical patent/JPS6425554A/en
Publication of JPH0831546B2 publication Critical patent/JPH0831546B2/en
Anticipated expiration legal-status Critical
Expired - Fee Related legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42Wire connectors; Manufacturing methods related thereto
    • H01L2224/47Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/4805Shape
    • H01L2224/4809Loop shape
    • H01L2224/48091Arched
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42Wire connectors; Manufacturing methods related thereto
    • H01L2224/47Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/481Disposition
    • H01L2224/48151Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/48221Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/48225Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
    • H01L2224/48227Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation connecting the wire to a bond pad of the item
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/73Means for bonding being of different types provided for in two or more of groups H01L2224/10, H01L2224/18, H01L2224/26, H01L2224/34, H01L2224/42, H01L2224/50, H01L2224/63, H01L2224/71
    • H01L2224/732Location after the connecting process
    • H01L2224/73251Location after the connecting process on different surfaces
    • H01L2224/73265Layer and wire connectors

Landscapes

  • Cooling Or The Like Of Semiconductors Or Solid State Devices (AREA)
  • Parts Printed On Printed Circuit Boards (AREA)
  • Structure Of Printed Boards (AREA)

Description

【発明の詳細な説明】 (産業上の利用分野) 本発明は、回路基板の最上層にもアルミニウム箔から
なる回路を有する耐電圧性に安定し、しかもアルミニウ
ム線のボンデイング性にもすぐれた大電流回路を持つイ
ンバーダーで代表されるパワーモジユールのハイパワー
用回路基板及びその混成集積回路に関するものである。
DETAILED DESCRIPTION OF THE INVENTION (Field of Industrial Application) The present invention has a circuit having an aluminum foil on the uppermost layer of a circuit board, is stable in withstand voltage, and is excellent in the bondability of an aluminum wire. The present invention relates to a high-power circuit board of a power module represented by an inverter having a current circuit and a hybrid integrated circuit thereof.

(従来の技術) パワーモジユール用の混成集積回路基板としては、近
年金属基板、特にアルミニウム基板の絶縁層上に肉厚の
銅箔を形成して大電流回路としたものが、開発されてい
る。この肉厚の銅箔からなる回路の形成方法としては、
35μm以上の銅箔を使用し、エツチングにより回路を形
成する方法と、肉薄例えば10μmの銅箔の大電流回路と
なる部分にメツキをして肉厚部分を作る方法との2つが
ある。
(Prior Art) As a hybrid integrated circuit board for a power module, a large current circuit has recently been developed by forming a thick copper foil on an insulating layer of a metal board, particularly an aluminum board. . As a method of forming a circuit made of this thick copper foil,
There are two methods: a method of forming a circuit by etching using a copper foil having a thickness of 35 μm or more, and a method of forming a thick portion by making a plating on a portion of a thin copper foil having a large current circuit of 10 μm to be a large current circuit.

しかしながらこのいずれの方法においても出来上つた
回路基板は、金属板例えばアルミニウム板上に絶縁層を
介して肉厚銅箔を形成した構造となつており、1).金
属基板と銅箔との膨張係数の相違からヒートシヨツクで
絶縁層にクラツクが入る、2).肉厚銅箔は、一般には
電解銅箔であり、電解メツキ時間が長いためメツキ面、
すなわち絶縁層と接着する面に数10μmの突起があり、
この突起が絶縁層の厚みを局部的に薄くして、耐電圧不
良を起す、3).肉厚圧延銅箔を用いる時には絶縁層と
の接着性を向上させるため、箔面を粗面化する工程が必
要となる等の欠点を有している。
However, in any of these methods, the completed circuit board has a structure in which a thick copper foil is formed on a metal plate, for example, an aluminum plate via an insulating layer, 1). Due to the difference in the expansion coefficient between the metal substrate and the copper foil, heat insulation causes cracks in the insulating layer 2). Thick copper foil is generally an electrolytic copper foil, which has a long electrolytic plating time,
That is, there are protrusions of several tens of μm on the surface that adheres to the insulating layer,
These protrusions locally reduce the thickness of the insulating layer, causing defective withstand voltage 3). When a thick rolled copper foil is used, it has a drawback that a step of roughening the foil surface is required in order to improve the adhesiveness with the insulating layer.

(発明が解決しようとする問題点) 本発明は、かかる欠点を解決するものであり、金属基
板上の絶縁層にアルミニウム箔、肉厚の銅箔及びアルミ
ニウム箔の順に積層された層を形成することにより、絶
縁層との接着強度が増大するとともに安定し、金属基板
と銅箔との膨張係数の相違からくるヒートシヨツクも緩
和されて絶縁層の破損防止となり、しかも絶縁層の耐電
圧性低下もなく、さらに回路基板の最上層がアルミニウ
ム箔のため、アルミニウム線によるワイヤーボンデイン
グが容易にできるハイパワー用回路基板及びその混成集
積回路を完成するに至つた。
(Problems to be Solved by the Invention) The present invention is to solve such a drawback, and forms a layer in which an aluminum foil, a thick copper foil and an aluminum foil are laminated in this order on an insulating layer on a metal substrate. As a result, the adhesive strength with the insulating layer increases and becomes stable, and the heat shock caused by the difference in the expansion coefficient between the metal substrate and the copper foil is mitigated, preventing the insulating layer from being damaged and lowering the withstand voltage of the insulating layer. Furthermore, since the uppermost layer of the circuit board is aluminum foil, a high-power circuit board and a hybrid integrated circuit thereof which can easily perform wire bonding with an aluminum wire have been completed.

(問題点を解決するための手段) すなわち本発明は、 1. 金属基板上の良熱伝導性絶縁層を介してアルミニウ
ム箔、35μmを超えてなる銅箔及びアルミニウム箔の層
の順に積層して夫々回路を形成してなるハイパワー用回
路基板 2. 金属基板上の良熱伝導性絶縁層を介してアルミニウ
ム箔、35μmを超えてなる銅箔及びアルミニウム箔の層
の順に積層して夫々回路を形成してなる回路基板に半導
体を配置し、該半導体とアルミニウム回路とをアルミニ
ウム線で接続したハイパワー用混成集積回路及び 3. 金属基板上の良熱伝導性絶縁層を介してアルミニウ
ム箔、35μmを超えてなる銅箔及びアルミニウム箔の層
の順に積層して夫々回路を形成してなる回路基板に半導
体を配置し、該半導体とアルミニウム回路とをアルミニ
ウム線で接続した回路に外部端子を接続し、前記回路を
ゲル状シリコン系樹脂及びエポキシ樹脂組成物にて封止
したハイパワー用混成集積回路 を特徴とするものである。
(Means for Solving Problems) That is, the present invention is as follows: 1. An aluminum foil, a copper foil having a thickness of more than 35 μm, and an aluminum foil layer are laminated in this order on a metal substrate through a good heat conductive insulating layer. Circuit board for high power with each circuit formed 2. Aluminum foil, copper foil with a thickness of more than 35 μm, and aluminum foil layer are laminated in this order on the metal substrate through a good heat conductive insulating layer to form the circuit respectively. A high-power hybrid integrated circuit in which a semiconductor is arranged on a formed circuit board and the semiconductor and an aluminum circuit are connected by an aluminum wire, and 3. An aluminum foil, 35 μm, through a good heat conductive insulating layer on a metal substrate. A semiconductor is placed on a circuit board formed by laminating layers of copper foil and aluminum foil in the order above to form a circuit, and the semiconductor and the aluminum circuit are connected to each other by an aluminum wire. A high-power hybrid integrated circuit in which terminals are connected and the circuit is sealed with a gel silicon resin and an epoxy resin composition.

以下本発明を詳細に説明する。 The present invention will be described in detail below.

第1図(a)及び(b)は、本発明の回路基板を表わ
す実施例の平面図と断面図である。まづ金属基板6上に
は絶縁層5を介して最下層に耐電圧性安定用アルミニウ
ム回路部2、中間層に大電流回路用肉厚銅回路部1及び
最上層にアルミニウム箔からなるアルミニウムボンデイ
ングポスト3が積層されている。さらに(a)の平面図
に示すとおり、肉厚銅回路の局所に外部リード端子を取
付けるための外部リード端子半田付部4が設けられてい
る。前記3層の箔積層体部分を異種金属複合箔を用いて
回路形成する方法としては、1)アルミニウム、肉厚銅
及びアルミニウムの順となつたクラツド箔、2)アルミ
ニウム箔上に銅メツキをして肉厚箔を形成し、さらに該
肉厚箔上にアルミニウム箔を重ねる、3)アルミニウム
箔に亜鉛もしくはニッケルを介して銅を順次メツキして
箔を形成し、該箔上にアルミニウムを重ねるのいづれか
の複合箔を絶縁物上に張り合せた基板をエツチングする
ことにより回路を形成することができる。
1 (a) and 1 (b) are a plan view and a sectional view of an embodiment showing a circuit board of the present invention. First, on the metal substrate 6, the aluminum circuit part 2 for stabilizing the withstand voltage is formed as the lowermost layer through the insulating layer 5, the thick copper circuit part 1 for the large current circuit is formed as the intermediate layer, and the aluminum bonding is formed of the aluminum foil as the uppermost layer. The posts 3 are stacked. Further, as shown in the plan view of (a), an external lead terminal soldering portion 4 for mounting the external lead terminal locally is provided on the thick copper circuit. As a method of forming a circuit in the three-layer foil laminated body portion using a different metal composite foil, 1) aluminum, thick copper, and a clad foil in the order of aluminum, and 2) copper plating on the aluminum foil. To form a thick foil and further lay an aluminum foil on the thick foil. 3) Copper is sequentially plated on the aluminum foil via zinc or nickel to form a foil, and aluminum is laid on the foil. A circuit can be formed by etching a substrate in which any one of composite foils is laminated on an insulator.

本発明に用いる金属基板6としては、良熱伝導性を有
する、アルミニウム、銅、鉄やそれらの合金が用いられ
る。また熱伝導性の良い絶縁層5はアルミナ、ベリリ
ア、ボロンナイトライド、マグネシア、シリカおよび窒
化アルミニウム等の良熱伝導性無機フイラーを例えば60
重量%以上含んだ熱硬化性樹脂等であり、その厚みも耐
電圧が許される限り薄いものが良く、通常は20μm以上
が必要である。
As the metal substrate 6 used in the present invention, aluminum, copper, iron and their alloys having good thermal conductivity are used. Further, the insulating layer 5 having good thermal conductivity is made of, for example, 60% good thermal conductive inorganic filler such as alumina, beryllia, boron nitride, magnesia, silica and aluminum nitride.
It is a thermosetting resin or the like containing at least wt%, and the thickness thereof is preferably as thin as the withstand voltage allows, and usually 20 μm or more is required.

また本発明に用いる異種金属複合箔の肉厚銅箔部1の
肉厚は、35μm超、好ましくは45μm〜1500μm、さら
に好ましくは50μm〜300μmである。肉厚が35μm以
下では満足な大電流通電容量が得られず、また上限は別
に制限はないが、通常の混成集積回路としては、1500μ
m程度が限度である。
Further, the thickness of the thick copper foil portion 1 of the dissimilar metal composite foil used in the present invention is more than 35 μm, preferably 45 μm to 1500 μm, and more preferably 50 μm to 300 μm. If the wall thickness is 35 μm or less, a satisfactory high-current carrying capacity cannot be obtained, and there is no upper limit, but it is 1500 μ as a normal hybrid integrated circuit.
The limit is about m.

次に第2図(a)及び(b)は、本発明のハイパワー
用混成集積回路を表わす実施例の平面図と断面図であ
り、このハイパワー用混成集積回路として用いる回路基
板は、第1図に示すものである。まづ第2図(a)及び
(b)は金属基板6に絶縁層5を介してアルミニウム箔
と銅箔とを主体とした異種金属箔で構成された複合箔が
積層され、耐電圧性の安定用アルミニウム回路部2、大
電流回路用肉厚銅回路部1及びアルミニウムボンデイン
グポスト3をそれぞれ形成している。
Next, FIGS. 2A and 2B are a plan view and a sectional view of an embodiment showing a high power hybrid integrated circuit of the present invention. The circuit board used as the high power hybrid integrated circuit is This is shown in FIG. First, FIGS. 2 (a) and 2 (b) show that a metal foil 6 is laminated with a composite foil composed of a dissimilar metal foil mainly composed of an aluminum foil and a copper foil with an insulating layer 5 interposed therebetween. A stabilizing aluminum circuit portion 2, a heavy current circuit thick copper circuit portion 1 and an aluminum bonding post 3 are formed respectively.

また肉厚銅回路部1の局所には共晶半田10が設けら
れ、該半田10により半導体例えばパワートランジスター
7やその他発熱素子例えばトランジスター、FET、IC
等、具体的にはダイオード8が搭載されている。さらに
これ等のパワートランジスター7とダイオード8は、ア
ルミニウムワイヤー9によりアルミニウムボンデイング
ポスト3に接続されて回路を形成している。次に第3図
は、第2図回路の外部リード端子半田付部4で外部リー
ド端子11を接続した後、回路の周囲をパツケージ12で覆
い、絶縁層5より上層部をパツケージ12の上端までゲル
状シリコン系樹脂13とエポキシ樹脂組成物14で封止した
回路の断面図である。
Further, a eutectic solder 10 is provided locally in the thick copper circuit portion 1, and the solder 10 allows semiconductors such as power transistors 7 and other heating elements such as transistors, FETs and ICs.
Specifically, the diode 8 is mounted. Further, these power transistors 7 and diodes 8 are connected to the aluminum bonding posts 3 by aluminum wires 9 to form a circuit. Next, in FIG. 3, after connecting the external lead terminals 11 with the external lead terminal soldering portions 4 of the circuit shown in FIG. 2, the periphery of the circuit is covered with the package 12, and the upper layer from the insulating layer 5 to the upper end of the package 12. FIG. 3 is a cross-sectional view of a circuit sealed with a gel-type silicone resin 13 and an epoxy resin composition 14.

次に回路を封止するゲル状シリコン系樹脂13は、例え
ばシリコン樹脂単独または、良熱伝導性を有する充填剤
含有シリコン樹脂のいずれでもよい。さらにエポキシ樹
脂組成物14は、耐湿性、低応力を持つ組成物であれば何
んら限定するものでない。
Next, the gel-like silicone resin 13 that seals the circuit may be, for example, a silicone resin alone or a filler-containing silicone resin having good thermal conductivity. Further, the epoxy resin composition 14 is not limited as long as it is a composition having moisture resistance and low stress.

すなわち本発明の混成集積回路に用いる基板はアルミ
ニウム箔と肉厚銅箔及びアルミニウム箔の3層構造を基
本とし、両方の金属が露出した回路基板であり、アルミ
ニウム箔からなるアルミニウム回路の上に肉厚銅箔から
なる回路が存在するため、電流容量的に充分であり、大
電流が流せられる。また、発熱素子を固着する部分も肉
厚銅箔となつているため、発熱素子を半田付すればヒー
トスプレツダーにもなる。
That is, the substrate used for the hybrid integrated circuit of the present invention is basically a three-layer structure of an aluminum foil, a thick copper foil, and an aluminum foil, and both metals are exposed. Since there is a circuit made of thick copper foil, the current capacity is sufficient and a large current can flow. Further, since the portion to which the heating element is fixed is also made of thick copper foil, soldering the heating element also serves as a heat spreader.

(実施例) 以下実施例により詳細に説明する。(Example) Hereinafter, a detailed description will be given with reference to an example.

実施例1 第1図(a)、(b)に示す回路基板として3mmのア
ルミニウムからなる金属基板の上にシリカを65重量%含
むエポキシ樹脂組成物の絶縁層を150μm塗布した。
Example 1 As a circuit board shown in FIGS. 1 (a) and 1 (b), an insulating layer of an epoxy resin composition containing 65% by weight of silica was applied to a thickness of 150 μm on a metal substrate made of 3 mm of aluminum.

次に絶縁層の上に40μmのアルミニウム箔、85μmの
銅箔及び40μmのアルミニウム箔の層の順になるように
異種金属複合箔を積層して回路基板を作成した。この回
路基板の耐電圧は、試料(n=50)の全てがAC5KV1分間
以上であつた。更に−40℃、30分間と120℃、30分間と
の繰り返しヒートシヨツク100回後の耐電圧も全ての試
料でAC5KV1分間以上であつた。
Next, a different metal composite foil was laminated on the insulating layer in the order of 40 μm aluminum foil, 85 μm copper foil, and 40 μm aluminum foil layer to form a circuit board. The withstand voltage of this circuit board was AC5KV for 1 minute or more for all the samples (n = 50). Furthermore, the withstand voltage after 100 times of repeated heat shock at -40 ° C for 30 minutes and 120 ° C for 30 minutes was AC5KV for 1 minute or more for all the samples.

実施例2 絶縁層を100μmとし、また銅箔を105μmとした以外
は、実施例1と同様の操作を行い回路基板を得た。この
回路基板の耐電圧は、試料(n=50)の全てがAC3KV1分
間以上であつた。更に−40℃、30分間と120℃、30分間
との繰り返しヒートシヨツク100回後の耐電圧も全ての
試料でAC3KV1分間以上であつた。
Example 2 A circuit board was obtained by performing the same operation as in Example 1 except that the insulating layer was 100 μm and the copper foil was 105 μm. The withstand voltage of this circuit board was AC3KV for 1 minute or more for all the samples (n = 50). Furthermore, the withstand voltage after 100 times of repeated heat shock at -40 ° C for 30 minutes and 120 ° C for 30 minutes was AC3KV for 1 minute or more for all the samples.

実施例3 実施例1と同様の回路基板を用いて、まず、この回路
基板で半田付きの必要な部分(端子取付部、パワートラ
ンジスターやダイオードの取付部)にスクリーン印刷に
より半田ペーストを印刷した。次に8×8×0.2mmのパ
ワートランジスタ6ケと1.5×1.5×0.2mmのダイオード
6ケを第2図に示す個所に置き、半田リフロー炉を通し
て半田付けした。
Example 3 Using the same circuit board as in Example 1, first, a solder paste was printed by screen printing on the portions (terminal mounting portions, power transistor and diode mounting portions) where soldering was required on this circuit board. Next, six 8 × 8 × 0.2 mm power transistors and six 1.5 × 1.5 × 0.2 mm diodes were placed at the locations shown in FIG. 2 and soldered through a solder reflow oven.

次に400μmの直径を有するアルミニウム太線を用
い、このパワートワンジスターからアルミニウムボンデ
イングポストに超音波振動法でワイヤーボンデイングし
て配線した。同様パワートランジスターからダイオード
へもワイヤーボンデイングした。
Next, using a thick aluminum wire having a diameter of 400 μm, wire bonding was performed from this power point wanister to an aluminum bonding post by an ultrasonic vibration method. Similarly, wire bonding was done from the power transistor to the diode.

次に14本の外部リード端子を半田付けした後パツケー
ジを回路にかぶせシリコン樹脂を第3図の様にアルミニ
ウムワイヤーやパワートランジスターがかくれるまで注
入し、硬化させゲル状にした。
Next, after soldering the 14 external lead terminals, the package was covered with a circuit, and silicon resin was injected until the aluminum wire and the power transistor could be covered as shown in FIG. 3 and cured to form a gel.

その後エポキシ樹脂組成物をその上から注入し、硬化
させた。
Then, the epoxy resin composition was injected from above and cured.

以上の工程を経ることにより第4図に示す電気回路を
有する、モーター制御用大電力パワーモジユール(イン
バーター)を完成させた。このインバーターはコレクタ
絶縁型のため取付けが簡単で許容電流を30Aにすること
が出来た。
Through the above steps, a high power power module (inverter) for controlling a motor having the electric circuit shown in FIG. 4 was completed. Since this inverter is a collector-insulated type, installation was easy and the allowable current could be set to 30A.

比較例 実施例1と同様の肉厚でアルミニウム基板と絶縁層と
を形成し、該絶縁層に最初に銅箔がくるように実施例1
と同様な肉厚銅箔とアルミニウム箔を重ねた。但しこの
複合箔の銅箔面には接着性を上げるため電解銅メツキに
よる表面処理が行なわれている。この回路基板の耐電圧
は、試料(n=50)の内3ケがAC2KV1分間不良となつ
た。さらに実施例1と同様のヒートシヨツクテストを残
りの良品(n=47)について行つたところ、さらに4ケ
がAC2KV1分間のテストで不良となつた。
Comparative Example An aluminum substrate and an insulating layer were formed with the same thickness as in Example 1, and the copper foil was first placed on the insulating layer.
The same thick copper foil and aluminum foil were overlaid. However, the copper foil surface of this composite foil is subjected to surface treatment by electrolytic copper plating in order to improve the adhesiveness. Regarding the withstand voltage of this circuit board, 3 of the samples (n = 50) were defective at AC2KV for 1 minute. Further, the same heat shock test as in Example 1 was conducted on the remaining non-defective products (n = 47). As a result, four more products became defective in the test for 2 minutes AC2VV.

(発明の効果) 以上のとおり、本発明は回路基板として肉厚銅箔の両
面をアルミニウム箔によつて重ね合せた状態のものを絶
縁層上に積層することにより絶縁層と異種金属複合箔と
の接着性が安定し、しかも耐電圧性も安定し、肉厚銅箔
と金属基板との膨張係数の相違から発生する回路基板絶
縁層のクラツクを防止できる。さらに回路基板の最上層
は、アルミニウム箔で形成されているため、アルミニウ
ム線によるワイヤーボンデイング性が容易に行われる利
点を有している。
(Effects of the Invention) As described above, according to the present invention, a thick copper foil as a circuit board is laminated on the insulating layer on both sides to form an insulating layer and a dissimilar metal composite foil. The adhesiveness is stable and the withstand voltage is also stable, and it is possible to prevent cracking of the circuit board insulating layer caused by the difference in expansion coefficient between the thick copper foil and the metal substrate. Further, since the uppermost layer of the circuit board is formed of aluminum foil, it has an advantage that the wire bonding property of the aluminum wire can be easily performed.

【図面の簡単な説明】[Brief description of drawings]

第1図(a)、(b)は実装前の回路基板を表わす平面
図と断面図である。次に第2図(a)、(b)は本発明
のハイパワー用混成集積回路の平面図および断面図であ
り、第3図は第2図の集積回路を樹脂封止した集積回路
の断面図を表わす。また第4図は電気回路図である。 符号1……肉厚銅回路部、2……アルミニウム回路部、
3……アルミニウムボンデイングポスト、4……外部リ
ード端子半田付部、5……絶縁層、6……金属基板、7
……パワートランジスター、8……ダイオード、9……
アルミニウムワイヤー、10……共晶半田、11……外部リ
ード端子、12……パツケージ、13……ゲル状シリコン系
樹脂、14……エポキシ樹脂組成物
1A and 1B are a plan view and a cross-sectional view showing a circuit board before mounting. Next, FIGS. 2 (a) and 2 (b) are a plan view and a cross-sectional view of a high-power hybrid integrated circuit of the present invention, and FIG. 3 is a cross-section of an integrated circuit in which the integrated circuit of FIG. 2 is resin-sealed. The figure is shown. FIG. 4 is an electric circuit diagram. Reference numeral 1 ... thick-walled copper circuit part, 2 ... aluminum circuit part,
3 ... Aluminum bonding post, 4 ... External lead terminal soldering part, 5 ... Insulating layer, 6 ... Metal board, 7
…… Power transistor, 8 …… Diode, 9 ……
Aluminum wire, 10 …… eutectic solder, 11 …… External lead terminal, 12 …… Package, 13 …… Gel-like silicone resin, 14 …… Epoxy resin composition

Claims (3)

【特許請求の範囲】[Claims] 【請求項1】金属基板上の良熱伝導性絶縁層を介してア
ルミニウム箔、35μmを超えてなる銅箔及びアルミニウ
ム箔の層の順に積層して夫々回路を形成してなるハイパ
ワー用回路基板。
1. A high-power circuit board in which a circuit is formed by laminating an aluminum foil, a copper foil having a thickness of more than 35 μm, and an aluminum foil layer in this order on a metal substrate via a good heat conductive insulating layer. .
【請求項2】金属基板上の良熱伝導性絶縁層を介してア
ルミニウム箔、35μmを超えてなる銅箔及びアルミニウ
ム箔の層の順に積層して夫々回路を形成してなる回路基
板に半導体を配置し、該半導体とアルミニウム回路とを
アルミニウム線で接続したハイパワー用混成集積回路。
2. A semiconductor is placed on a circuit board formed by laminating an aluminum foil, a copper foil having a thickness of more than 35 μm, and an aluminum foil layer in this order through a good heat conductive insulating layer on a metal substrate to form a circuit. A hybrid integrated circuit for high power, which is arranged, and the semiconductor and an aluminum circuit are connected by an aluminum wire.
【請求項3】金属基板上の良熱伝導性絶縁層を介してア
ルミニウム箔、35μmを超えてなる銅箔及びアルミニウ
ム箔の層の順に積層して夫々回路を形成してなる回路基
板に半導体を配置し、該半導体とアルミニウム回路とを
アルミニウム線で接続した回路に外部端子を接続し、前
記回路をゲル状シリコン系樹脂及びエポキシ樹脂組成物
にて封止したハイパワー用混成集積回路。
3. A semiconductor is formed on a circuit board formed by laminating an aluminum foil, a copper foil having a thickness of more than 35 μm, and an aluminum foil layer in this order on a metal substrate via a good heat conductive insulating layer to form a circuit. A hybrid integrated circuit for high power, which is arranged, an external terminal is connected to a circuit in which the semiconductor and an aluminum circuit are connected by an aluminum wire, and the circuit is sealed with a gel silicon resin and an epoxy resin composition.
JP62182877A 1987-07-22 1987-07-22 High power circuit board and hybrid integrated circuit thereof Expired - Fee Related JPH0831546B2 (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP62182877A JPH0831546B2 (en) 1987-07-22 1987-07-22 High power circuit board and hybrid integrated circuit thereof

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP62182877A JPH0831546B2 (en) 1987-07-22 1987-07-22 High power circuit board and hybrid integrated circuit thereof

Publications (2)

Publication Number Publication Date
JPS6425554A JPS6425554A (en) 1989-01-27
JPH0831546B2 true JPH0831546B2 (en) 1996-03-27

Family

ID=16125983

Family Applications (1)

Application Number Title Priority Date Filing Date
JP62182877A Expired - Fee Related JPH0831546B2 (en) 1987-07-22 1987-07-22 High power circuit board and hybrid integrated circuit thereof

Country Status (1)

Country Link
JP (1) JPH0831546B2 (en)

Families Citing this family (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP5034143B2 (en) * 2001-04-27 2012-09-26 パナソニック株式会社 Power converter
JP4595665B2 (en) 2005-05-13 2010-12-08 富士電機システムズ株式会社 Wiring board manufacturing method
JP2010034238A (en) * 2008-07-28 2010-02-12 Shin Kobe Electric Mach Co Ltd Wiring board
JP6192561B2 (en) * 2014-02-17 2017-09-06 三菱電機株式会社 Power semiconductor device
CN116406090B (en) * 2023-05-15 2024-02-02 台山市科伟电子科技有限公司 Production process of aluminum-based copper-clad aluminum foil plate

Also Published As

Publication number Publication date
JPS6425554A (en) 1989-01-27

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