JPH09246959A - 周波数合成装置 - Google Patents

周波数合成装置

Info

Publication number
JPH09246959A
JPH09246959A JP2139097A JP2139097A JPH09246959A JP H09246959 A JPH09246959 A JP H09246959A JP 2139097 A JP2139097 A JP 2139097A JP 2139097 A JP2139097 A JP 2139097A JP H09246959 A JPH09246959 A JP H09246959A
Authority
JP
Japan
Prior art keywords
synthesizer
frequency
phase
output
modifier
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP2139097A
Other languages
English (en)
Japanese (ja)
Other versions
JPH09246959A5 (enExample
Inventor
David C Chu
デイヴィッド・シー・チュー
Jeremy S Sommer
ジェルミイ・エス・ソマー
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
HP Inc
Original Assignee
Hewlett Packard Co
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Hewlett Packard Co filed Critical Hewlett Packard Co
Publication of JPH09246959A publication Critical patent/JPH09246959A/ja
Publication of JPH09246959A5 publication Critical patent/JPH09246959A5/ja
Pending legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L1/00—Arrangements for detecting or preventing errors in the information received
    • H04L1/22—Arrangements for detecting or preventing errors in the information received using redundant apparatus to increase reliability
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03L—AUTOMATIC CONTROL, STARTING, SYNCHRONISATION OR STABILISATION OF GENERATORS OF ELECTRONIC OSCILLATIONS OR PULSES
    • H03L7/00—Automatic control of frequency or phase; Synchronisation
    • H03L7/06—Automatic control of frequency or phase; Synchronisation using a reference signal applied to a frequency- or phase-locked loop
    • H03L7/07—Automatic control of frequency or phase; Synchronisation using a reference signal applied to a frequency- or phase-locked loop using several loops, e.g. for redundant clock signal generation
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L7/00—Arrangements for synchronising receiver with transmitter
    • H04L7/0079—Receiver details
    • H04L7/0083—Receiver details taking measures against momentary loss of synchronisation, e.g. inhibiting the synchronisation, using idle words or using redundant clocks

Landscapes

  • Engineering & Computer Science (AREA)
  • Computer Networks & Wireless Communication (AREA)
  • Signal Processing (AREA)
  • Stabilization Of Oscillater, Synchronisation, Frequency Synthesizers (AREA)
  • Synchronisation In Digital Transmission Systems (AREA)
JP2139097A 1996-02-21 1997-02-04 周波数合成装置 Pending JPH09246959A (ja)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
US08/604,231 US5631933A (en) 1996-02-21 1996-02-21 Phase-locked digital synthesizers
US604,231 1996-02-21

Publications (2)

Publication Number Publication Date
JPH09246959A true JPH09246959A (ja) 1997-09-19
JPH09246959A5 JPH09246959A5 (enExample) 2004-12-16

Family

ID=24418750

Family Applications (1)

Application Number Title Priority Date Filing Date
JP2139097A Pending JPH09246959A (ja) 1996-02-21 1997-02-04 周波数合成装置

Country Status (3)

Country Link
US (1) US5631933A (enExample)
EP (1) EP0792022A1 (enExample)
JP (1) JPH09246959A (enExample)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN100395961C (zh) * 2003-08-27 2008-06-18 华为技术有限公司 主备时钟的相位对齐方法

Families Citing this family (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH11298380A (ja) * 1998-04-08 1999-10-29 Nec Saitama Ltd クロック生成回路
AU2001275880A1 (en) * 2000-07-10 2002-01-21 Silicon Laboratories, Inc. Digitally-synthesized loop filter circuit particularly useful for a phase locked loop
US7276952B2 (en) * 2005-10-28 2007-10-02 Hewlett-Packard Development Company, L.P. Clock signal generation using digital frequency synthesizer
US8570108B2 (en) 2011-08-05 2013-10-29 Qualcomm Incorporated Injection-locking a slave oscillator to a master oscillator with no frequency overshoot
CN107681994B (zh) * 2017-09-23 2020-11-17 深圳大学 一种振荡器电路

Family Cites Families (11)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4030045A (en) * 1976-07-06 1977-06-14 International Telephone And Telegraph Corporation Digital double differential phase-locked loop
DE2907608A1 (de) * 1979-02-27 1980-08-28 Siemens Ag Schaltungsanordnung zur takterzeugung in fernmeldeanlagen, insbesondere zeitmultiplex-digital-vermittlungsanlagen
US4282493A (en) * 1979-07-02 1981-08-04 Motorola, Inc. Redundant clock signal generating circuitry
US4598257A (en) * 1983-05-31 1986-07-01 Siemens Corporate Research & Support, Inc. Clock pulse signal generator system
IT1218072B (it) * 1988-06-13 1990-04-12 Sgs Thomson Microelectronics Circuito per la sintonizzazione ad alta efficienza di frequenze video
JPH0797328B2 (ja) * 1988-10-25 1995-10-18 インターナシヨナル・ビジネス・マシーンズ・コーポレーシヨン フオールト・トレラント同期システム
US4947382A (en) * 1989-04-11 1990-08-07 Vista Labs, Inc. Direct digital locked loop
US5355090A (en) * 1989-10-06 1994-10-11 Rockwell International Corporation Phase corrector for redundant clock systems and method
JPH04313917A (ja) * 1991-03-29 1992-11-05 Mitsubishi Electric Corp ダブルｐｌｌ装置
US5184350A (en) * 1991-04-17 1993-02-02 Raytheon Company Telephone communication system having an enhanced timing circuit
US5391996A (en) * 1993-11-19 1995-02-21 General Instrument Corporation Of Delaware Techniques for generating two high frequency signals with a constant phase difference over a wide frequency band

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN100395961C (zh) * 2003-08-27 2008-06-18 华为技术有限公司 主备时钟的相位对齐方法

Also Published As

Publication number Publication date
US5631933A (en) 1997-05-20
EP0792022A1 (en) 1997-08-27

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