JPH09191082A - 高速バイポーラ/BiCMOS回路のESD保護のための改良されたバイポーラSCRトリガリング - Google Patents

高速バイポーラ/BiCMOS回路のESD保護のための改良されたバイポーラSCRトリガリング

Info

Publication number
JPH09191082A
JPH09191082A JP8293083A JP29308396A JPH09191082A JP H09191082 A JPH09191082 A JP H09191082A JP 8293083 A JP8293083 A JP 8293083A JP 29308396 A JP29308396 A JP 29308396A JP H09191082 A JPH09191082 A JP H09191082A
Authority
JP
Japan
Prior art keywords
bipolar
region
voltage
semiconductor layer
type
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP8293083A
Other languages
English (en)
Japanese (ja)
Inventor
Julian Zhiliang Chen
ジリアング チェン ジュリアン
Ajith Amerasekera
アメラセケラ アジス
Thomas A Vrotsos
エイ.ブロトソス トマス
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Texas Instruments Inc
Original Assignee
Texas Instruments Inc
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Texas Instruments Inc filed Critical Texas Instruments Inc
Publication of JPH09191082A publication Critical patent/JPH09191082A/ja
Pending legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10DINORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D89/00Aspects of integrated devices not covered by groups H10D84/00 - H10D88/00
    • H10D89/60Integrated devices comprising arrangements for electrical or thermal protection, e.g. protection circuits against electrostatic discharge [ESD]
    • H10D89/601Integrated devices comprising arrangements for electrical or thermal protection, e.g. protection circuits against electrostatic discharge [ESD] for devices having insulated gate electrodes, e.g. for IGFETs or IGBTs
    • H10D89/711Integrated devices comprising arrangements for electrical or thermal protection, e.g. protection circuits against electrostatic discharge [ESD] for devices having insulated gate electrodes, e.g. for IGFETs or IGBTs using bipolar transistors as protective elements
    • H10D89/713Integrated devices comprising arrangements for electrical or thermal protection, e.g. protection circuits against electrostatic discharge [ESD] for devices having insulated gate electrodes, e.g. for IGFETs or IGBTs using bipolar transistors as protective elements including a PNP transistor and a NPN transistor, wherein each of said transistors has its base region coupled to the collector region of the other transistor, e.g. silicon controlled rectifier [SCR] devices
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10DINORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D84/00Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers
    • H10D84/01Manufacture or treatment
    • H10D84/0123Integrating together multiple components covered by H10D12/00 or H10D30/00, e.g. integrating multiple IGBTs
    • H10D84/0126Integrating together multiple components covered by H10D12/00 or H10D30/00, e.g. integrating multiple IGBTs the components including insulated gates, e.g. IGFETs
    • H10D84/0165Integrating together multiple components covered by H10D12/00 or H10D30/00, e.g. integrating multiple IGBTs the components including insulated gates, e.g. IGFETs the components including complementary IGFETs, e.g. CMOS devices
    • H10D84/0191Manufacturing their doped wells

Landscapes

  • Semiconductor Integrated Circuits (AREA)
  • Metal-Oxide And Bipolar Metal-Oxide Semiconductor Integrated Circuits (AREA)
  • Bipolar Integrated Circuits (AREA)
JP8293083A 1995-09-29 1996-09-30 高速バイポーラ/BiCMOS回路のESD保護のための改良されたバイポーラSCRトリガリング Pending JPH09191082A (ja)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
US452795P 1995-09-29 1995-09-29
US004527 1995-09-29

Publications (1)

Publication Number Publication Date
JPH09191082A true JPH09191082A (ja) 1997-07-22

Family

ID=21711220

Family Applications (1)

Application Number Title Priority Date Filing Date
JP8293083A Pending JPH09191082A (ja) 1995-09-29 1996-09-30 高速バイポーラ/BiCMOS回路のESD保護のための改良されたバイポーラSCRトリガリング

Country Status (3)

Country Link
JP (1) JPH09191082A (enExample)
KR (1) KR970018516A (enExample)
TW (1) TW316332B (enExample)

Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US6433393B1 (en) 1999-09-09 2002-08-13 Nec Corporation Semiconductor protective device and method for manufacturing same
US7456440B2 (en) 2004-04-23 2008-11-25 Nec Electronics Corporation Electrostatic protection device
US7821029B2 (en) 2008-08-22 2010-10-26 Panasonic Corporation Electrostatic protection element

Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US6433393B1 (en) 1999-09-09 2002-08-13 Nec Corporation Semiconductor protective device and method for manufacturing same
US7456440B2 (en) 2004-04-23 2008-11-25 Nec Electronics Corporation Electrostatic protection device
US7821029B2 (en) 2008-08-22 2010-10-26 Panasonic Corporation Electrostatic protection element

Also Published As

Publication number Publication date
KR970018516A (ko) 1997-04-30
TW316332B (enExample) 1997-09-21

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