JPH0888326A - Electrostatic protection structure of semiconductor device - Google Patents

Electrostatic protection structure of semiconductor device

Info

Publication number
JPH0888326A
JPH0888326A JP6248448A JP24844894A JPH0888326A JP H0888326 A JPH0888326 A JP H0888326A JP 6248448 A JP6248448 A JP 6248448A JP 24844894 A JP24844894 A JP 24844894A JP H0888326 A JPH0888326 A JP H0888326A
Authority
JP
Japan
Prior art keywords
substrate
schottky barrier
diode
semiconductor device
static electricity
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Withdrawn
Application number
JP6248448A
Other languages
Japanese (ja)
Inventor
Hiroshi Hizaki
浩 桧崎
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Nippon Steel Corp
Original Assignee
Nippon Steel Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Nippon Steel Corp filed Critical Nippon Steel Corp
Priority to JP6248448A priority Critical patent/JPH0888326A/en
Publication of JPH0888326A publication Critical patent/JPH0888326A/en
Withdrawn legal-status Critical Current

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  • Metal-Oxide And Bipolar Metal-Oxide Semiconductor Integrated Circuits (AREA)
  • Semiconductor Integrated Circuits (AREA)

Abstract

PURPOSE: To obtain an electrostatic protection structure which can make static electricity escape to the outside with reponsivity and prevent occupied by a substrate good responsivity and an area occupied by a substrate from increasing. CONSTITUTION: A Schottky barrier diode 6 is interposed between an external input/output device and an input/output terminal for a semiconductor circuit. The side of a cathode for the Schottky barrier diode 6 and a grounding conductor are connected in such a way that a p-n junction diode is interposed. Thereby, static electricity from an external circuit is cut off by the Schottky barrier diode 6, it can be by-passed to the grounding conductor by the p-n junction diode 7, and the static electricity can be made to escape to the outside with good responsivity in a small area occupied by a substrate. Especially, when an inpurity-diffused layer which is used for the Schottky barrier diode 6 and an impurity-diffused layer, on one side, which is used for the p-n junction diode 7 are used in common, the area occupied by the substrate can be made smaller.

Description

【発明の詳細な説明】Detailed Description of the Invention

【0001】[0001]

【産業上の利用分野】本発明は、半導体装置の静電気保
護構造に関し、特に外部入出力線からインバータを介し
て内部回路に信号を入出力する半導体装置の静電気保護
構造に関するものである。
BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a semiconductor device static electricity protection structure, and more particularly to a semiconductor device static electricity protection structure for inputting and outputting a signal from an external input / output line to an internal circuit through an inverter.

【0002】[0002]

【従来の技術】従来、例えば外部入出力線からインバー
タを介して内部回路に信号を入出力する半導体装置に於
ける静電気保護回路は、図3に示すように、外部入出力
線とインバータ11との間に抵抗12とトランジスタ
(ダイオードとして使用)13とから構成され、静電気
発生時に抵抗12で電圧の減衰及び時定数の増加を行
い、次にトランジスタ13でGNDにバイパスさせる構
成となっていた。
2. Description of the Related Art Conventionally, as shown in FIG. 3, an electrostatic protection circuit in a semiconductor device for inputting / outputting a signal to / from an internal circuit from an external input / output line via an inverter has an external input / output line and an inverter 11, as shown in FIG. A resistor 12 and a transistor (used as a diode) 13 are provided between the two, and when the static electricity is generated, the resistor 12 attenuates the voltage and increases the time constant, and then the transistor 13 bypasses to the GND.

【0003】[0003]

【発明が解決しようとする課題】しかしながら、静電気
のピーク電圧を下げるための抵抗12自身が破壊しない
ようにその基板占有面積を大きくする必要があり、また
トランジスタ13も応答性を高くして、バイパス性能を
良くすると共にON抵抗を下げるために上記同様基板占
有面積を大きくする必要があることから、結果保護回路
の面積が非常に大きくなり、装置が大型化するという問
題があった。
However, it is necessary to increase the substrate occupying area so that the resistor 12 itself for lowering the peak voltage of static electricity is not destroyed, and the transistor 13 also has a high responsiveness to bypass. Since it is necessary to increase the substrate occupying area in the same manner as described above in order to improve the performance and reduce the ON resistance, there is a problem that the area of the protection circuit becomes very large as a result and the device becomes large.

【0004】本発明は上記したような従来技術の問題点
に鑑みなされたものであり、その主な目的は、静電気を
応答性良く外部に逃がすことができると共に基板占有面
積が増大することのない半導体装置の静電気保護構造を
提供することにある。
The present invention has been made in view of the problems of the prior art as described above, and its main purpose is to allow static electricity to be released to the outside with good responsiveness and not to increase the occupied area of the substrate. It is to provide an electrostatic protection structure for a semiconductor device.

【0005】[0005]

【課題を解決するための手段】上記した目的は本発明に
よれば、外部装置に接続された半導体装置を前記外部装
置側からの静電気から保護するための半導体装置の静電
気保護構造であって、前記外部装置と前記半導体装置の
入出力端子との間にショットキーバリアダイオードを介
在させると共に前記ショットキーバリアダイオードのカ
ソード側と接地線とをpn接合ダイオードを介在させて
接続したことを特徴とする半導体装置の静電気保護構造
を提供することにより達成される。特に、前記半導体装
置の形成された基板を前記接地線として、前記pn接合
ダイオードが、前記基板と該基板に不純物を拡散してな
る不純物拡散層との間に形成され、前記ショットキーバ
リアダイオードが、一端が前記不純物拡散層上に形成さ
れ、他端が前記外部装置に接続された配線層と前記不純
物拡散層との間に形成されていると良い。
According to the present invention, there is provided an electrostatic protection structure of a semiconductor device for protecting a semiconductor device connected to an external device from static electricity from the external device side. A Schottky barrier diode is interposed between the external device and an input / output terminal of the semiconductor device, and a cathode side of the Schottky barrier diode and a ground line are connected via a pn junction diode. This is accomplished by providing an electrostatic protection structure for a semiconductor device. In particular, with the substrate on which the semiconductor device is formed as the ground line, the pn junction diode is formed between the substrate and an impurity diffusion layer formed by diffusing impurities in the substrate, and the Schottky barrier diode is formed. It is preferable that one end is formed on the impurity diffusion layer and the other end is formed between the wiring layer connected to the external device and the impurity diffusion layer.

【0006】[0006]

【作用】ショットキーバリアダイオードは通常のpn接
合ダイオードに比べ飽和電流が1000倍程度大きく、
また電荷蓄積効果がないため、高速応答が可能であり、
また製造が容易である。このショットキーバリアダイオ
ードで外部回路からの静電気を遮断すると共にpn接合
ダイオードで接地線にバイパスすることにより内部回路
に印加される静電気を減少させ、該回路を保護すること
が可能となる。
The Schottky barrier diode has a saturation current about 1000 times larger than that of a normal pn junction diode.
Also, since there is no charge storage effect, high-speed response is possible,
It is also easy to manufacture. The Schottky barrier diode blocks static electricity from an external circuit, and the pn junction diode bypasses the ground line to reduce static electricity applied to the internal circuit and protect the circuit.

【0007】[0007]

【実施例】以下、本発明の好適実施例を添付の図面につ
いて詳しく説明する。図1は、本発明が適用された保護
回路の構造を示す断面図であり、図2はその回路図であ
る。基板1には不純物拡散領域2が形成され、その表面
に於ける図の左側には図示されない外部入出力装置に接
続された外部接続側配線層3がパターン形成されてい
る。また、基板1の不純物拡散領域2表面に於ける外部
接続側配線層3と離間する位置にはインバータ5に接続
された内部接続側配線層4がパターン形成されている。
ここで、メタルからなる外部接続側配線層3が不純物拡
散領域2の表面に接触していることからこの部分にショ
ットキーバリアダイオード6が形成されている。また、
不純物拡散領域2と基板1との間にはpn接合ダイオー
ド7が形成されている。
DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENT A preferred embodiment of the present invention will now be described in detail with reference to the accompanying drawings. FIG. 1 is a sectional view showing a structure of a protection circuit to which the present invention is applied, and FIG. 2 is a circuit diagram thereof. An impurity diffusion region 2 is formed on the substrate 1, and an external connection side wiring layer 3 connected to an external input / output device (not shown) is patterned on the left side of the figure on the surface thereof. Further, on the surface of the impurity diffusion region 2 of the substrate 1, an internal connection side wiring layer 4 connected to the inverter 5 is patterned at a position separated from the external connection side wiring layer 3.
Here, since the external connection side wiring layer 3 made of metal is in contact with the surface of the impurity diffusion region 2, the Schottky barrier diode 6 is formed in this portion. Also,
A pn junction diode 7 is formed between the impurity diffusion region 2 and the substrate 1.

【0008】従って、この回路は図2に良く示すよう
に、外部入出力装置に接続された外部接続側配線3がシ
ョットキーバリアダイオード6を介してインバータ5の
信号入力端子に接続され、基板1、即ち接地線がpn接
合ダイオード7を介してショットキーバリアダイオード
6のカソード側及びインバータ5の信号入力端子に接続
されている。尚、図1中の符号8はLOCOSなどの絶
縁膜であり、符号9は高濃度不純物拡散領域である。
Therefore, in this circuit, as well shown in FIG. 2, the external connection side wiring 3 connected to the external input / output device is connected to the signal input terminal of the inverter 5 via the Schottky barrier diode 6, and the substrate 1 That is, the ground line is connected to the cathode side of the Schottky barrier diode 6 and the signal input terminal of the inverter 5 via the pn junction diode 7. Reference numeral 8 in FIG. 1 is an insulating film such as LOCOS, and reference numeral 9 is a high-concentration impurity diffusion region.

【0009】以下に本実施例の作動要領について説明す
る。まず、通常時にはショットキーバリアダイオード6
が順方向、pn接合ダイオード7が逆方向となっている
ことから、そのままインバータ5の信号が入力される。
The operating procedure of this embodiment will be described below. First, normally, the Schottky barrier diode 6
Is in the forward direction and the pn junction diode 7 is in the reverse direction, so that the signal of the inverter 5 is directly input.

【0010】次に、外部入出力装置に接続された外部接
続側配線3から静電気が入ってきた場合、ショットキー
バリアダイオード6が応答性良くこの静電気を遮断する
と共にpn接合ダイオード7を介して基板1、即ち接地
線にバイパスされる。
Next, when static electricity comes in from the external connection side wiring 3 connected to the external input / output device, the Schottky barrier diode 6 blocks this static electricity with good responsiveness and at the same time through the pn junction diode 7 to the substrate. 1, bypassed to ground.

【0011】[0011]

【発明の効果】上記した説明により明らかなように、本
発明による半導体装置の静電気保護構造によれば、外部
装置と半導体装置との間にショットキーバリアダイオー
ドを介在させると共にこのショットキーバリアダイオー
ドのカソード側と接地線とをpn接合ダイオードを介在
させて接続することにより、ショットキーバリアダイオ
ードで外部回路からの静電気を遮断すると共にpn接合
ダイオードで接地線にバイパスし、少ない基板占有面積
で静電気を応答性良く外部に逃がすことができる。特
に、ショットキーバリアダイオードに用いる不純物拡散
層とpn接合ダイオードに用いる一方の不純物拡散層と
を共通にすることにより、一層基板占有面積を小さくす
ることが可能となる。
As is apparent from the above description, according to the electrostatic protection structure of the semiconductor device of the present invention, the Schottky barrier diode is interposed between the external device and the semiconductor device and the Schottky barrier diode By connecting the cathode side and the ground line with the pn junction diode interposed, the Schottky barrier diode blocks the static electricity from the external circuit, and the pn junction diode bypasses the ground line to eliminate the static electricity in a small board occupation area. It can be released to the outside with good responsiveness. In particular, by making the impurity diffusion layer used for the Schottky barrier diode and the one impurity diffusion layer used for the pn junction diode common, the substrate occupation area can be further reduced.

【図面の簡単な説明】[Brief description of drawings]

【図1】本発明が適用された半導体装置の静電気保護構
造を示す断面図。
FIG. 1 is a sectional view showing an electrostatic protection structure of a semiconductor device to which the present invention is applied.

【図2】図1の等価回路図。FIG. 2 is an equivalent circuit diagram of FIG.

【図3】従来の半導体装置の静電気保護構造の等価回路
図。
FIG. 3 is an equivalent circuit diagram of a conventional semiconductor device electrostatic protection structure.

【符号の説明】[Explanation of symbols]

1 基板 2 不純物拡散領域 3 外部接続側配線層 4 内部接続側配線層 5 インバータ 6 ショットキーバリアダイオード 7 pn接合ダイオード 8 絶縁膜 9 高濃度不純物拡散領域 11 インバータ 12 抵抗 13 トランジスタ 1 substrate 2 impurity diffusion region 3 external connection side wiring layer 4 internal connection side wiring layer 5 inverter 6 Schottky barrier diode 7 pn junction diode 8 insulating film 9 high concentration impurity diffusion region 11 inverter 12 resistor 13 transistor

Claims (2)

【特許請求の範囲】[Claims] 【請求項1】 外部装置に接続された半導体装置を前
記外部装置側からの静電気から保護するための半導体装
置の静電気保護構造であって、 前記外部装置と前記半導体装置との間にショットキーバ
リアダイオードを介在させると共に、前記ショットキー
バリアダイオードのカソード側と接地線とをpn接合ダ
イオードを介在させて接続したことを特徴とする半導体
装置の静電気保護構造。
1. A static electricity protection structure of a semiconductor device for protecting a semiconductor device connected to an external device from static electricity from the external device side, wherein a Schottky barrier is provided between the external device and the semiconductor device. A static electricity protection structure for a semiconductor device, characterized in that a diode is interposed and a cathode side of the Schottky barrier diode and a ground line are connected via a pn junction diode.
【請求項2】 前記半導体装置の形成された基板を前
記接地線として、前記pn接合ダイオードが、前記基板
と該基板に不純物を拡散してなる不純物拡散層との間に
形成され、 前記ショットキーバリアダイオードが、一端が前記不純
物拡散層上に形成され、他端が前記外部装置に接続され
た配線層と前記不純物拡散層との間に形成されているこ
とを特徴とする請求項1に記載の半導体装置の静電気保
護構造。
2. The pn junction diode is formed between the substrate and an impurity diffusion layer formed by diffusing impurities into the substrate, with the substrate on which the semiconductor device is formed as the ground line. The barrier diode has one end formed on the impurity diffusion layer and the other end formed between the wiring layer connected to the external device and the impurity diffusion layer. Electrostatic protection structure for semiconductor devices.
JP6248448A 1994-09-16 1994-09-16 Electrostatic protection structure of semiconductor device Withdrawn JPH0888326A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP6248448A JPH0888326A (en) 1994-09-16 1994-09-16 Electrostatic protection structure of semiconductor device

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP6248448A JPH0888326A (en) 1994-09-16 1994-09-16 Electrostatic protection structure of semiconductor device

Publications (1)

Publication Number Publication Date
JPH0888326A true JPH0888326A (en) 1996-04-02

Family

ID=17178288

Family Applications (1)

Application Number Title Priority Date Filing Date
JP6248448A Withdrawn JPH0888326A (en) 1994-09-16 1994-09-16 Electrostatic protection structure of semiconductor device

Country Status (1)

Country Link
JP (1) JPH0888326A (en)

Cited By (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2002016254A (en) * 2000-06-29 2002-01-18 Mitsubishi Electric Corp Semiconductor device
WO2012057464A2 (en) * 2010-10-28 2012-05-03 숭실대학교산학협력단 Diode for electrostatic protection
JP2013214608A (en) * 2012-04-02 2013-10-17 Fuji Electric Co Ltd Semiconductor device
KR101320516B1 (en) * 2007-07-20 2013-10-22 삼성전자주식회사 Semiconductor device having electrostatic discharge protection circuit and method of manufacturing the same

Cited By (8)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2002016254A (en) * 2000-06-29 2002-01-18 Mitsubishi Electric Corp Semiconductor device
JP4607291B2 (en) * 2000-06-29 2011-01-05 三菱電機株式会社 Semiconductor device
KR101320516B1 (en) * 2007-07-20 2013-10-22 삼성전자주식회사 Semiconductor device having electrostatic discharge protection circuit and method of manufacturing the same
WO2012057464A2 (en) * 2010-10-28 2012-05-03 숭실대학교산학협력단 Diode for electrostatic protection
KR101159468B1 (en) * 2010-10-28 2012-06-25 숭실대학교산학협력단 Electrostatic discharge protection diode
WO2012057464A3 (en) * 2010-10-28 2012-07-05 숭실대학교산학협력단 Diode for electrostatic protection
US8717724B2 (en) 2010-10-28 2014-05-06 Soongsil University Research Consortium Techno-Park Diode for electrostatic protection
JP2013214608A (en) * 2012-04-02 2013-10-17 Fuji Electric Co Ltd Semiconductor device

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Effective date: 20011120