JPH0738054A - Semiconductor device - Google Patents

Abstract

PURPOSE:To prevent the breakage of a circuit by providing a PN junction composed of an electrode in continuity with signal input and a semiconductor substrate, in the region in continuity with the semiconductor substrate at earth potential, and connecting them with each other. CONSTITUTION:A protective circuit B is made by nearly the same process as an input circuit A, and the p<+>-type region 21 provided on the main surface part of a well 3 is connected with an input terminal 13 by an electrode 20. Furthermore, it is electrically isolated from other element-formed regions by an interlayer insulating film 16 and a p-type diffusion layer for isolation. The current from the input terminal 13 usually flows from an electrode 11 to a circuit via a p<+>-type region 7, passing through a resistance 4 via a p<+>-type region 6, starting from an electrode 20. One part flows to an electrode 12 via a p<+>-type region 9, passing through a resistance 5 via a p<+>-type region 8, and gets away to earth potential 14. But, when an excessive current such as a surge current flows into a circuit, it flows from a well 3 to a buried layer 2 via a p<+>-type region 21 from the electrode 20 as shown by a broken line in other than the usual course, and flows to earth potential 15, passing through a semiconductor substrate 1.

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a semiconductor device, and more particularly to a technique effectively applied to a semiconductor device having a resistance input type circuit.

[0002]

2. Description of the Related Art In a semiconductor device, excessive static electricity may flow from an external terminal into a circuit as a surge current during the assembly process due to artificial handling or due to charging of a package or a device. When such a surge current flows, the elements forming the circuit are destroyed by the excessive current. Therefore, an input protection circuit is usually provided at the input stage of the circuit in order to prevent element breakdown due to surge current.

Some of such protection circuits are provided between an external terminal and an input circuit, and a diode is provided between the input terminal and a ground terminal to allow a surge voltage to escape to the ground potential.

[0004]

FIG. 1 is a sectional view of an essential part illustrating an input stage of a semiconductor device having a resistance input circuit.

At the input stage of the circuit, an N + type buried layer 2 is provided on the main surface portion of a P type semiconductor substrate 1 made of single crystal silicon,
An N-type well 3 is provided on the main surface of the N + type buried layer, and P-type diffusion layers 4 and 5 are formed as input resistances on the main surface of the N-type well. Both ends of the P-type diffusion layers 4 and 5 which are the input resistances are provided with electrodes 10, 11 and 12 via P + -type regions 6, 7, 8 and 9 for making ohmic contacts.
Connect to. A conductive material such as aluminum is used for the electrodes 10, 11 and 12, and the electrode 10 is connected to the input terminal 13,
The electrode 11 also serves as an internal wiring for connecting the P type diffusion layers 4 and 5 which are resistors, and is also connected to a subsequent circuit (not shown). The electrode 12 is connected to the ground potential 14. The semiconductor substrate 1 is electrically connected to the ground potential 15 on the back surface.

Each element of the input resistance circuit is provided in an element formation region separated by an element isolation insulating film 16, and after the surface is covered with an insulating film 17, the insulating film 1 is formed by etching or the like.
7 is partially opened, and electrodes 10, 11,
12 is formed.

FIG. 2 is an equivalent circuit diagram showing the input stage of the circuit, to which the corresponding reference numerals of FIG. 1 are attached.

The current from the input terminal 13 is normally passed from the electrode 10 through the P + type region 6, the resistance (P type diffusion layer 4), the P + type region 7 and the electrode 11 to a circuit (not shown).
Partly through the P + type region 8 and through the resistor (P type diffusion layer 5), then through the P + type region 9 to the electrode 12 and escape to the ground potential 14.

When a high voltage signal such as surge noise is applied to the input terminal 13 from the outside, an excessive current from the input terminal 13 to the ground potential through the differential input resistance (P type diffusion layers 4 and 5). Goes out. At this time, the junction surface of the resistors (P-type diffusion layers 4 and 5) is destroyed by the excessive current. Since the surge current that has entered the input terminal 13 consumes energy in the input resistance (P-type diffusion layers 4, 5), the P + -type region for making the input resistance (P-type diffusion layers 4, 5) and ohmic contact. It causes the destruction of the joint surfaces of 6, 7, 8 and 9.

When an excessive current such as a surge current flows into the circuit, a low resistance is provided from the electrode 10 through the P + type region 6 to the N type well 3 as shown by a broken line, in addition to the normal path. May flow to the N + type buried layer 2 and then to pass through the N type well 3 again from the P + type region 9 to the ground potential 14 connected to the electrode 12.

Normally, a PN junction formed on the junction surface between the P + type region 6 and the N type well 3 or the junction surface between the N type well 3 and the P + type region 9 acts as a diode and allows current to flow. However, when an excessive voltage due to a surge current is applied, a reverse current flows in either of the diodes depending on whether the voltage is positive or negative, and the junction surface is destroyed by the excessive reverse current. As a result, when the diode is destroyed at the junction, current always flows easily from the destroyed portion, and the resistance characteristic of the input stage changes.

However, when the protection circuit as described above is provided at the input stage of the resistance input type circuit such as the differential input circuit, the resistance is connected to the input terminal, so that even in the normal state. The current flows to the ground potential through the diode. Therefore, the characteristics change, so that there is a problem in applying the protection circuit as described above in the input resistance type circuit.

An object of the present invention is to provide a technique capable of protecting an input circuit from an excessive current such as a surge current without changing the characteristics.

The above and other objects and novel features of the present invention will be apparent from the description of this specification and the accompanying drawings.

[0015]

Among the inventions disclosed in the present application, a brief description will be given to the outline of typical ones.
It is as follows.

In a semiconductor device having a second conductivity type region of a conductivity type opposite to that of the first conductivity type on the main surface of a semiconductor substrate of the first conductivity type electrically connected to the ground potential, it is electrically isolated from other regions. An electrode that is electrically connected to the signal input is provided in a region that is electrically connected to the semiconductor substrate, and a protection circuit that connects the electrode and the semiconductor substrate via a PN junction is provided.

[0017]

According to the above-mentioned means, when an excessive input such as a surge current is applied, an excessive current flows in the protection circuit, so that the circuit breakdown can be prevented.

Further, since the protection circuit is electrically isolated from other regions, it does not affect other circuits.

Further, even if the above-mentioned protection circuit is provided, since the current flows through the protection circuit only when the input is excessive, the characteristics of the resistance input type circuit are not changed.

The structure of the present invention will be described below together with embodiments.

In all the drawings for explaining the embodiments, parts having the same function are designated by the same reference numerals, and the repeated description thereof will be omitted.

[0022]

DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS FIG. 1 is a sectional view showing the principal part of a resistance input circuit of a semiconductor device according to an embodiment of the present invention. In the figure, A is an input resistance circuit and B is a protection circuit.

The input resistance circuit A is formed as follows.

Reference numeral 1 denotes a P-type semiconductor substrate of the first conductivity type which is made of single crystal silicon. The semiconductor substrate 1 is heated together with an impurity source in a diffusion furnace to provide an N + type buried layer 2 of the second conductivity type on the main surface portion of the semiconductor substrate 1.

Next, heating is performed in a high frequency induction heating device while flowing a reaction gas mixed with a dopant to grow an epitaxial layer on the main surface portion of the N + type buried layer 2 to provide an N type well 3. .

Next, P type diffusion layers 4 and 5 (input resistance) are formed on the main surface of the N type well 3 by thermal diffusion. P + type regions 6, 7, 8 and 9 for making ohmic contact are formed at both ends of the input resistance (P type diffusion layers 4 and 5), and the P + type regions 6, 7, 8 and 9 are interposed therebetween. , Electrode 11,
Input resistors (P-type diffusion layers 4 and 5) are connected to 12 and 20.

A conductive material such as aluminum is used for the electrodes 11, 12 and 20, and the electrode 20 is connected to the input terminal 13,
The electrode 11 connects the resistor (P-type diffusion layer 4) and the resistor (P-type diffusion layer 5) and is connected to the subsequent circuit (not shown). The electrode 12 is connected to the ground potential 14, and the back surface of the semiconductor substrate 1 is connected to the ground potential 15.

Each element of the input resistance circuit A is separated from other element forming regions by the element isolation insulating film 16.
After covering the surface with the insulating film 17, the insulating film 17 is opened by etching or the like, and the electrodes 11, 12,
Form 20.

The protection circuit B is formed by the same process as that of the input circuit A. That is, P made of single crystal silicon
An N + type buried layer 2 is provided on the main surface portion of the type semiconductor substrate 1.
An N-type well 3 is provided on the main surface of the N + -type buried layer 2,
The P + type region 21 provided in the main surface of the well 3 of the mold is connected to the input terminal 13 by the electrode 20. The P + type region 21 is formed to have a larger area (about twice in this embodiment) than the area of the other P + regions 6, 7, 8 and 9 to widen the junction surface with the N type well 3.

The protection circuit B is electrically isolated from other element forming regions by the element isolation insulating film 16 and the P type isolation diffusion layer 22.

FIG. 4 is an equivalent circuit diagram showing the resistance input circuit section, which is designated by the corresponding reference numeral in FIG.

In the present input circuit, the current from the input terminal 13 normally passes from the electrode 20 through the P + type region 6, the resistance (P type diffusion layer 4) and the P + type region 7 to the electrode 11.
To a circuit (not shown), a part of it passes through the P + type region 8, the resistor (P type diffusion layer 5), the P + type region 9 to the electrode 12, and then to the ground potential 14.

However, when an excessive current such as a surge current flows in the circuit, an N-type well 3 is passed from the electrode 20 through the P + type region 21 as shown by a broken line, in addition to the normal path.
To the N + type buried layer 2 and then to the ground potential 15 through the P type semiconductor substrate 1.

P between the P + type region 21 and the N type well 3
Since a diode is formed by the N-junction, this PN
In order to widen the joint surface between the P + region 21 and the N-type diffusion layer 3 in order to prevent the destruction of the joint, the P + region 21 is formed wide to increase the breakdown voltage. It is also possible to adjust the impurity concentration of the P + type region 21 to keep the reverse breakdown voltage low.

The inventions made by the present inventors are as follows.
Although the specific description has been given based on the above-described embodiments, the present invention is not limited to the above-described embodiments, and it goes without saying that various modifications can be made without departing from the scope of the invention.

[0036]

The effects obtained by the typical ones of the inventions disclosed in the present application will be briefly described as follows.

(1) According to the present invention, the protection circuit can prevent the circuit from being destroyed by an excessive input such as a surge current.

(2) According to the present invention, since the protection circuit operates only when the input is excessive, there is an effect that the characteristics of the resistance input type circuit are not changed.

(3) According to the present invention, since the protection circuit is provided in a region electrically separated from other circuits, there is an effect that other circuits are not affected.

[Brief description of drawings]

FIG. 1 is a sectional view of a main part showing a resistance input circuit section of a conventional semiconductor device;

FIG. 2 is an equivalent circuit diagram showing a resistance input circuit section of a conventional semiconductor device,

FIG. 3 is a cross-sectional view of essential parts showing a resistance input circuit section of a semiconductor device according to an embodiment of the present invention;

FIG. 4 is an equivalent circuit diagram showing a resistance input circuit section of a semiconductor device which is an embodiment of the present invention.

[Explanation of symbols]

1 ... P-type (first conductivity type) semiconductor substrate, 2 ... N-type (second conductivity type) buried layer, 3 ... N-type (second conductivity type) well, 4,5
... P-type (first conductivity type) diffusion layer (resistor), 6, 7, 8,
9, 21 ... P + type (second conductivity type) region, 10, 11, 1
2, 20 ... Electrodes, 13 ... Input terminals, 14, 15 ... Ground potential, 16 ... Inter-element isolation insulating film, 17 ... Insulating film, 22 ... Separation diffusion layer.

Claims (2)

[Claims] 1. A semiconductor device having a second conductivity type region of a conductivity type opposite to the first conductivity type on a main surface of a first conductivity type semiconductor substrate which is electrically connected to a ground potential, and is electrically connected to other regions. And a protection circuit for connecting the electrode and the semiconductor substrate via a PN junction is provided. apparatus. 2. The semiconductor device according to claim 1, wherein the signal input is a signal input to a resistance input type circuit.