JPH08512179A - セルスイッチ及びこれを通してセルを経路選択する方法 - Google Patents

セルスイッチ及びこれを通してセルを経路選択する方法

Info

Publication number
JPH08512179A
JPH08512179A JP7502715A JP50271595A JPH08512179A JP H08512179 A JPH08512179 A JP H08512179A JP 7502715 A JP7502715 A JP 7502715A JP 50271595 A JP50271595 A JP 50271595A JP H08512179 A JPH08512179 A JP H08512179A
Authority
JP
Japan
Prior art keywords
cell
switch
cells
tag
core
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Ceased
Application number
JP7502715A
Other languages
English (en)
Japanese (ja)
Inventor
ヴァルデマー サンドクイスト,ペーター
Original Assignee
テレフオンアクチーボラゲツト エル エム エリクソン
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by テレフオンアクチーボラゲツト エル エム エリクソン filed Critical テレフオンアクチーボラゲツト エル エム エリクソン
Publication of JPH08512179A publication Critical patent/JPH08512179A/ja
Ceased legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H04ELECTRIC COMMUNICATION TECHNIQUE
    • H04LTRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L49/00Packet switching elements
    • H04L49/50Overload detection or protection within a single switching element
    • H04L49/505Corrective measures
    • H04L49/508Head of Line Blocking Avoidance
    • HELECTRICITY
    • H04ELECTRIC COMMUNICATION TECHNIQUE
    • H04LTRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L49/00Packet switching elements
    • H04L49/25Routing or path finding in a switch fabric
    • H04L49/253Routing or path finding in a switch fabric using establishment or release of connections between ports
    • HELECTRICITY
    • H04ELECTRIC COMMUNICATION TECHNIQUE
    • H04LTRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L49/00Packet switching elements
    • H04L49/25Routing or path finding in a switch fabric
    • H04L49/256Routing or path finding in ATM switching fabrics
    • HELECTRICITY
    • H04ELECTRIC COMMUNICATION TECHNIQUE
    • H04LTRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L49/00Packet switching elements
    • H04L49/30Peripheral units, e.g. input or output ports
    • H04L49/3009Header conversion, routing tables or routing tags
    • HELECTRICITY
    • H04ELECTRIC COMMUNICATION TECHNIQUE
    • H04LTRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L12/00Data switching networks
    • H04L12/54Store-and-forward switching systems 
    • H04L12/56Packet switching systems
    • H04L12/5601Transfer mode dependent, e.g. ATM
    • H04L2012/5678Traffic aspects, e.g. arbitration, load balancing, smoothing, buffer management
    • H04L2012/5679Arbitration or scheduling
    • HELECTRICITY
    • H04ELECTRIC COMMUNICATION TECHNIQUE
    • H04LTRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L49/00Packet switching elements
    • H04L49/10Packet switching elements characterised by the switching fabric construction
    • H04L49/101Packet switching elements characterised by the switching fabric construction using crossbar or matrix
    • HELECTRICITY
    • H04ELECTRIC COMMUNICATION TECHNIQUE
    • H04LTRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L49/00Packet switching elements
    • H04L49/20Support for services
    • HELECTRICITY
    • H04ELECTRIC COMMUNICATION TECHNIQUE
    • H04LTRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L49/00Packet switching elements
    • H04L49/30Peripheral units, e.g. input or output ports

Landscapes

  • Engineering & Computer Science (AREA)
  • Computer Networks & Wireless Communication (AREA)
  • Signal Processing (AREA)
  • Physics & Mathematics (AREA)
  • Mathematical Physics (AREA)
  • Data Exchanges In Wide-Area Networks (AREA)
  • Measuring Or Testing Involving Enzymes Or Micro-Organisms (AREA)
  • Preparation Of Compounds By Using Micro-Organisms (AREA)
JP7502715A 1993-06-23 1994-06-17 セルスイッチ及びこれを通してセルを経路選択する方法 Ceased JPH08512179A (ja)

Applications Claiming Priority (3)

Application Number Priority Date Filing Date Title
SE9302176-4 1993-06-23
SE9302176A SE515148C2 (sv) 1993-06-23 1993-06-23 Styrning av cellväljare
PCT/SE1994/000599 WO1995001031A1 (en) 1993-06-23 1994-06-17 A cell switch and a method for routing cells therethrough

Publications (1)

Publication Number Publication Date
JPH08512179A true JPH08512179A (ja) 1996-12-17

Family

ID=20390395

Family Applications (1)

Application Number Title Priority Date Filing Date
JP7502715A Ceased JPH08512179A (ja) 1993-06-23 1994-06-17 セルスイッチ及びこれを通してセルを経路選択する方法

Country Status (14)

Country Link
US (1) US5506841A (enExample)
EP (1) EP0705511B1 (enExample)
JP (1) JPH08512179A (enExample)
KR (1) KR100237337B1 (enExample)
CN (1) CN1073316C (enExample)
AU (1) AU676926B2 (enExample)
BR (1) BR9406843A (enExample)
CA (1) CA2163342A1 (enExample)
DE (1) DE69429773T2 (enExample)
FI (1) FI956242A0 (enExample)
NO (1) NO955275L (enExample)
SE (1) SE515148C2 (enExample)
TW (1) TW256980B (enExample)
WO (1) WO1995001031A1 (enExample)

Families Citing this family (36)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5949781A (en) * 1994-08-31 1999-09-07 Brooktree Corporation Controller for ATM segmentation and reassembly
SE504985C2 (sv) * 1995-05-09 1997-06-09 Ericsson Telefon Ab L M ATM-växelkärna
US6185222B1 (en) * 1995-09-28 2001-02-06 Cisco Technology, Inc. Asymmetric switch architecture for use in a network switch node
SE513509C2 (sv) * 1998-10-07 2000-09-25 Net Insight Ab Anordning för routing av datapaket i ett DTM-nät
SE513515C2 (sv) 1998-10-07 2000-09-25 Net Insight Ab Anordning för routing av asynkron trafik i ett kretskopplat nät
US6396811B1 (en) 1998-12-17 2002-05-28 Telefonaktiebolaget Lm Ericsson Segmented performance monitoring of multi-stage ATM node
US6449275B1 (en) 1998-12-17 2002-09-10 Telefonaktiebolaget Lm Ericsson (Publ) Internal routing through multi-staged ATM node
WO2000038383A2 (en) * 1998-12-18 2000-06-29 Telefonaktiebolaget Lm Ericsson (Publ) Internet protocol handler for telecommunications platform with processor cluster
US7139282B1 (en) * 2000-03-24 2006-11-21 Juniper Networks, Inc. Bandwidth division for packet processing
US7164698B1 (en) 2000-03-24 2007-01-16 Juniper Networks, Inc. High-speed line interface for networking devices
US7596139B2 (en) 2000-11-17 2009-09-29 Foundry Networks, Inc. Backplane interface adapter with error control and redundant fabric
US7356030B2 (en) * 2000-11-17 2008-04-08 Foundry Networks, Inc. Network switch cross point
US20030039256A1 (en) * 2001-08-24 2003-02-27 Klas Carlberg Distribution of connection handling in a processor cluster
EP1309133A1 (de) * 2001-10-31 2003-05-07 Siemens Aktiengesellschaft Verfahren, Empfangseinrichtung und Sendeeinrichtung zur Bestimmung des schnellsten Nachrichtenpfades ohne Uhrensynchronisation
CN1366402B (zh) * 2002-02-05 2010-10-13 威盛电子股份有限公司 分组交换的负载平衡装置
US7649885B1 (en) * 2002-05-06 2010-01-19 Foundry Networks, Inc. Network routing system for enhanced efficiency and monitoring capability
US7468975B1 (en) 2002-05-06 2008-12-23 Foundry Networks, Inc. Flexible method for processing data packets in a network routing system for enhanced efficiency and monitoring capability
US7187687B1 (en) 2002-05-06 2007-03-06 Foundry Networks, Inc. Pipeline method and system for switching packets
US20120155466A1 (en) 2002-05-06 2012-06-21 Ian Edward Davis Method and apparatus for efficiently processing data packets in a computer network
US7180894B2 (en) * 2002-05-29 2007-02-20 Intel Corporation Load balancing engine
US6901072B1 (en) 2003-05-15 2005-05-31 Foundry Networks, Inc. System and method for high speed packet transmission implementing dual transmit and receive pipelines
US7817659B2 (en) 2004-03-26 2010-10-19 Foundry Networks, Llc Method and apparatus for aggregating input data streams
US8730961B1 (en) 2004-04-26 2014-05-20 Foundry Networks, Llc System and method for optimizing router lookup
US7657703B1 (en) * 2004-10-29 2010-02-02 Foundry Networks, Inc. Double density content addressable memory (CAM) lookup scheme
US20060165081A1 (en) * 2005-01-24 2006-07-27 International Business Machines Corporation Deflection-routing and scheduling in a crossbar switch
US8448162B2 (en) 2005-12-28 2013-05-21 Foundry Networks, Llc Hitless software upgrades
US8238255B2 (en) 2006-11-22 2012-08-07 Foundry Networks, Llc Recovering from failures without impact on data traffic in a shared bus architecture
US8155011B2 (en) 2007-01-11 2012-04-10 Foundry Networks, Llc Techniques for using dual memory structures for processing failure detection protocol packets
US7929431B2 (en) * 2007-03-19 2011-04-19 Honeywell International Inc. Port rate smoothing in an avionics network
US8271859B2 (en) 2007-07-18 2012-09-18 Foundry Networks Llc Segmented CRC design in high speed networks
US8037399B2 (en) 2007-07-18 2011-10-11 Foundry Networks, Llc Techniques for segmented CRC design in high speed networks
US8149839B1 (en) 2007-09-26 2012-04-03 Foundry Networks, Llc Selection of trunk ports and paths using rotation
US8090901B2 (en) 2009-05-14 2012-01-03 Brocade Communications Systems, Inc. TCAM management approach that minimize movements
US8599850B2 (en) 2009-09-21 2013-12-03 Brocade Communications Systems, Inc. Provisioning single or multistage networks using ethernet service instances (ESIs)
US8776207B2 (en) 2011-02-16 2014-07-08 Fortinet, Inc. Load balancing in a network with session information
CN113472701B (zh) * 2020-03-31 2023-10-10 深圳市中兴微电子技术有限公司 路由信息的处理方法、装置、设备及存储介质

Family Cites Families (10)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4621359A (en) * 1984-10-18 1986-11-04 Hughes Aircraft Company Load balancing for packet switching nodes
US4623996A (en) * 1984-10-18 1986-11-18 Mcmillen Robert J Packet switched multiple queue NXM switch node and processing method
US4630258A (en) * 1984-10-18 1986-12-16 Hughes Aircraft Company Packet switched multiport memory NXM switch node and processing method
US4817084A (en) * 1986-10-16 1989-03-28 Bell Communications Research, Inc. Batcher-Banyan packet switch with output conflict resolution scheme
IT1196791B (it) * 1986-11-18 1988-11-25 Cselt Centro Studi Lab Telecom Elemento di commutazione per reti di interconnessione multistadio autoinstradanti a commutazione di pacchetto
US4899334A (en) * 1987-10-19 1990-02-06 Oki Electric Industry Co., Ltd. Self-routing multistage switching network for fast packet switching system
DE68918275T2 (de) * 1989-06-29 1995-03-30 Ibm Schnelles, digitales Paketvermittlungssystem.
US5166926A (en) * 1990-12-18 1992-11-24 Bell Communications Research, Inc. Packet address look-ahead technique for use in implementing a high speed packet switch
US5255265A (en) * 1992-05-05 1993-10-19 At&T Bell Laboratories Controller for input-queued packet switch
US5291482A (en) * 1992-07-24 1994-03-01 At&T Bell Laboratories High bandwidth packet switch

Also Published As

Publication number Publication date
EP0705511A1 (en) 1996-04-10
CN1126012A (zh) 1996-07-03
CA2163342A1 (en) 1995-01-05
SE515148C2 (sv) 2001-06-18
SE9302176L (sv) 1994-12-24
FI956242A7 (fi) 1995-12-22
KR960703299A (ko) 1996-06-19
DE69429773D1 (de) 2002-03-14
AU7088794A (en) 1995-01-17
BR9406843A (pt) 1996-04-16
NO955275L (no) 1996-02-16
DE69429773T2 (de) 2002-08-14
AU676926B2 (en) 1997-03-27
FI956242A0 (fi) 1995-12-22
CN1073316C (zh) 2001-10-17
KR100237337B1 (ko) 2000-01-15
EP0705511B1 (en) 2002-01-30
NO955275D0 (no) 1995-12-22
SE9302176D0 (sv) 1993-06-23
TW256980B (enExample) 1995-09-11
WO1995001031A1 (en) 1995-01-05
US5506841A (en) 1996-04-09

Similar Documents

Publication Publication Date Title
JPH08512179A (ja) セルスイッチ及びこれを通してセルを経路選択する方法
US5896380A (en) Multi-core ATM switch with cells in the core from an inlet for an outlet being aligned
KR100334922B1 (ko) 효율적인출력요구패킷스위치와방법
RU2138845C1 (ru) Система временного запоминания информации
EP0195589B1 (en) Switching system for transmission of data
US4099233A (en) Electronic data-processing system with data transfer between independently operating miniprocessors
CA1198520A (en) Multiple communication interface between processor and digital transmission means
US4434463A (en) Multiprocessor topology with plural bases for directly and indirectly coupling addresses and relay stations
US5165024A (en) Information transfer and receiving system with a ring interconnect architecture using voucher and ticket signals
JP2001285291A (ja) 調停方式及びそれを用いたアービタ回路
JPH0879271A (ja) セル交換装置及びセル交換システム
EP0376597B1 (en) Packet selection for packet distribution arrangements
JP2820106B2 (ja) トラヒックシェーパ装置
US5165019A (en) Ring interconnect system architecture
US5333267A (en) Ring interconnect system architecture
JPH07183897A (ja) 空間分割交換マトリクスの入力へ接続するための入力待ち行列システム
JP3099325B2 (ja) クロスバスイッチ装置及びその制御方法
JP3149143B2 (ja) アクセス調停方式
JP2971157B2 (ja) パケット交換方式
JPH027146A (ja) ダイレクトメモリアクセス制御装置ならびにダイレクトメモリアクセス制御方法
JP2000183959A (ja) スケジューリング管理装置
US20040078479A1 (en) Traffic generator using a network processor
JPH03183236A (ja) ヘツダ予測方式及び通信制御処理装置
JPH0758762A (ja) データ転送方式
JPH0637791A (ja) 自己ルーチングスイッチ

Legal Events

Date Code Title Description
A045 Written measure of dismissal of application [lapsed due to lack of payment]

Free format text: JAPANESE INTERMEDIATE CODE: A045

Effective date: 20040127