JPH08235240A - Ground solid pattern device and method for genereating - Google Patents

Abstract

PURPOSE: To provide a ground solid pattern generator for surely and efficiently generating a ground solid pattern. CONSTITUTION: This generator is provided with a negative data generation processing part 3 for generating negative data based on pattern design data, clearance formation means 5 and 6 for forming a desired clearance in a negative data part where the negative data is in contact with a specified pattern area based on a preset clearance value and solid pattern generation means 7, 8 and 9 for extracting only valid point data from point data generated at every prescribed interval as through-hole data for the negative data for which the clearance is secured and generating ground solid pattern data based on the negative data for which the clearance is secured and the through-hole data.

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to an apparatus and method for forming a ground solid pattern on the front and back surfaces of a multilayer printed wiring board.

[0002]

2. Description of the Related Art Conventionally, for example, a CAD (Comput
er Aided Design), etc., the empty area is manually searched for on the front and back surfaces of the multilayer printed wiring board after completion of wiring design, and a solid pattern is created in this empty area, and the ground layer between the front and back surfaces and the inner layer surface is also created. Through-holes (through via holes) for connecting to each other
By creating the, a solid pattern was created.

[0003]

However, in the preparation of such a conventional ground solid pattern, there is a work of manually finding an empty area from the front and back surfaces of the multilayer printed wiring board after the wiring design is completed. However, due to the oversight of the empty area that should be the ground solid pattern, the ground solid pattern cannot be created in all the empty areas, which may result in omission of creation of the grand solid pattern. Moreover, if the confirmation work takes time to eliminate the oversight, the efficiency of the work itself deteriorates. Furthermore, after the formation of the ground solid pattern on the multilayer printed wiring board, for example, when the placed parts are moved or added or the wiring pattern is changed, it is necessary to manually create the ground solid pattern again. . In this case, it is necessary to erase the completed ground solid pattern and create the ground solid pattern again. This means that in the recent multilayer printed wiring boards where layout and wiring are frequently changed due to design changes and improvements, in addition to the above-mentioned problem of potential omission of the ground solid pattern, work efficiency is improved. It becomes a very important factor to make it worse.

An object of the present invention is to solve the above problems and to provide a ground solid pattern generation apparatus and a generation method thereof for reliably and efficiently generating a ground solid pattern.

[0005]

The structure of the invention for solving the above problems is, for example, a component mounting pad, a component through hole, a wiring pattern, a via hole, etc. on the front and back surfaces of a multilayer printed wiring board for which a wiring pattern has been designed. Negative data generation processing means for generating negative data by inverting pattern data indicating a specific pattern area including the component placement / wiring area, and a preset clearance value (for example, clearance value between negative data and component mounting pad, negative data And the clearance value between the component through hole, the clearance value between the negative data and the wiring pattern, the clearance value between the negative data and the via hole, etc.), a desired clearance is provided in the negative data portion in contact with the negative data and the specific pattern area. Clearance forming process to be formed Means and a plurality of point data for the negative data whose clearance is secured by the clearance forming processing means at predetermined intervals, and the specific pattern area in the front and back surfaces and the inner layer of the ground at each position of the point data. Data extraction processing means for extracting only point data that is not short-circuited by overlapping as through-hole data for connecting the front and back surfaces and the ground inner layer, and the data extraction processing for negative data whose clearance is secured by the clearance formation processing means. Solid pattern generation processing means for generating ground solid pattern data in which a through hole is formed based on the through hole data extracted by the means.

In the clearance forming processing means, a clearance for clearing a preset clearance value between the component mounting pads on the front and back surfaces of the multilayer printed wiring board, component through holes, wiring patterns, via holes and negative data. It is preferable that the desired clearance is formed by automatically thinning the negative data until the above is ensured, and finally forming the solid pattern of the negative data in which the clearance shortage is eliminated.

[0007]

The design data after completion of the wiring pattern design on the multilayer printed wiring board in which the through holes are formed by the negative data generation processing means is acquired, and the front and back surfaces of the multilayer printed wiring board are acquired based on the acquired design data. Negative data is generated by obtaining an empty area other than the specific pattern area including the component placement / wiring area. Next, the clearance formation processing unit organically combines the negative data and the data after completion of the wiring pattern design, and forms a manufacturing clearance with the specific pattern area of the negative data in the combined data based on a preset clearance value. Finally, the negative data in which the clearance is no longer insufficient is solid-patterned to generate solid-pattern data. Subsequently, the data extraction processing unit generates a plurality of through-hole data for the solid pattern data at predetermined intervals, and the through-hole data positions do not overlap the specific pattern areas in the front and back layers and the ground inner layer. Only the data is extracted as valid through hole data. Then, the solid pattern generation processing means adds the through-hole data for connecting the front and back surfaces and the inner layer of the ground to the solid pattern data to generate the ground solid pattern data.

That is, since the empty area is automatically obtained based on the design data of the multilayer printed wiring board and the ground solid pattern data is generated, overlooking of the empty area does not occur and the ground solid pattern is surely generated. Data is generated. In addition, since the ground pattern data is automatically generated, it is possible to easily deal with design changes and the like.

[0009]

DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS A preferred embodiment of the present invention will be described below with reference to the drawings. FIG. 1 is a block diagram showing a schematic configuration of a grand solid pattern generation device 1 of this embodiment. FIG.
In, the grand solid pattern generation device 1 is roughly classified into a pattern design data storage unit 2, a negative data generation processing unit 3 functioning as a negative data generation processing unit, a design data link unit 4, and a clearance functioning as a clearance formation processing unit. From the check processing unit 5, the clearance data storage unit 6, the ground connection processing unit 7, the ground connection position data storage unit 8 and the ground solid pattern data storage unit 9 which function as a data extraction processing unit and a solid pattern generation processing unit. It is configured.

The pattern design data storage unit 2 stores the pattern design data (see FIG. 2) in the multilayer printed wiring board previously created by CAD or the like.
The negative data generation processing unit 3 generates negative data (see FIG. 3) by inverting the image data on the front and back surfaces of the multilayer printed wiring board based on the pattern design data. As a result, the negative data becomes image data in which a portion having a specific pattern area such as the component mounting pad 10, the component through hole 11, the wiring pattern 12, and the via hole 13 shown in FIG.
In the example shown in (1), the shaded area portion becomes the copper foil portion 14. The design data link unit 4 creates design link data (see FIG. 4) by linking the pattern design data shown in FIG. 2 and the negative data shown in FIG. It should be noted that if the pattern design data and the negative data are simply linked at the time of linking the design link data, the front and back surfaces will be the copper foil portion 14, and therefore, in the present embodiment, the negative data generation processing unit is used. By giving a unique net name that can be discriminated as negative data to the negative data output according to No. 3, the negative data can be discriminated even when linked with the pattern design data.

The clearance check processing unit 5 checks whether or not the clearance between the negative data and each specific pattern data is secured by the clearance data value stored in the clearance data storage unit 6 described later,
It secures manufacturing clearance. When the clearance is not secured, the negative data is shaped by thinning it by a predetermined amount until the clearance is secured.
In addition, the clearance check processing unit 5 has a function of deleting the negative data of the portion when the negative data is partially too thin during shaping. This is because the manufacturable pattern width value is set in the clearance value, and pattern data narrower than this manufacturable pattern width value cannot be manufactured as a ground solid pattern.

The clearance data storage unit 6 stores a preset clearance value, specifically, FIGS. 5 (a) and 5 (b).
, The negative clearance and the manufacturing clearance value a between the component mounting pad 10, the negative clearance and the manufacturing clearance value b between the component through hole 11, the negative data and the wiring pattern 1 are shown in FIG.
2 is a semiconductor memory for storing the manufacturing clearance value c with 2, the negative data, the manufacturing clearance value d with the via hole 13 and the like. The ground connection processing unit 7 serves to make the negative data pattern (see FIG. 6) processed by the clearance check processing unit 5 into a final ground solid pattern, and is stored in the ground connection position data storage unit 8 described later. Based on the stored ground connection position data e, through holes 15 are formed in the negative data at predetermined intervals.
And the through hole 15 is connected to the inner layer of the ground (see FIG. 7). In addition, the through hole 15 for connecting to the ground inner layer
Since the through holes 15 are generated at the same position in all layers of the multilayer printed wiring board, the component mounting pads 10, the component through holes 11, the wiring patterns 12, and the via holes 13 are present in each inner layer and the front and back surfaces. Make sure that there are no through holes 15
I am trying to generate. Then, if the ground connection position data e cannot be observed, the ground pin is directly connected to the ground pin of each component.

The ground connection position data storage unit 8 is a semiconductor memory that stores reference data for generating through holes 15 at predetermined intervals (ground connection position data e) in the ground solid pattern data. The storage unit 9 stores the final ground solid pattern data processed by the ground connection processing unit 7.

Next, the operation of this embodiment will be described. First,
Negative data is generated by the negative data generation processing unit 3 based on the pattern design data after completion of the wiring pattern design in the multilayer printed wiring board stored in the pattern design data storage unit 2. Then, the design data link unit 4 links the negative data and the pattern design data,
The clearance check processing unit 5 obtains solid pattern data in which the clearance in the negative data is secured.

Next, the ground connection processing section 7 generates a plurality of through-hole data for the obtained solid pattern data at a predetermined interval, and the through-hole data position and the specific pattern in the front and back layers and the ground inner layer. The ground solid pattern data is generated and stored in the ground solid pattern storage unit 9 using only the through hole data that does not overlap the area as valid through hole data.

As described above, according to the present embodiment, it is possible to automatically generate the empty area based on the previously created pattern design data and generate the ground solid pattern data without manual operation. It is possible to reliably generate the ground solid pattern data without oversighting the empty area, which was excessive in the conventional example. Further, since the grand pattern data is automatically generated, it is possible to easily deal with design changes and the like.

[0017]

As is apparent from the above description, according to the present invention, the work for finding an empty area in a multilayer printed wiring board, which has conventionally been performed manually, is automatically performed, so that the empty area It is possible to reliably generate the ground solid pattern data without omission of creation of the ground solid pattern due to oversight, etc., and it is possible to generate a highly reliable ground solid pattern.
In addition, by automatically generating the ground solid pattern data, it is possible to easily deal with design changes such as wiring pattern changes and component movements / additions after creating the ground solid pattern, and efficient ground solid patterns. Can be generated.

[Brief description of drawings]

FIG. 1 is a schematic block diagram of a ground solid pattern generation device according to an embodiment of the present invention.

FIG. 2 is a diagram showing an example of pattern design data.

FIG. 3 is a diagram showing an example of negative data.

FIG. 4 is a diagram showing an example of design link data based on FIGS. 2 and 3;

FIG. 5 is an enlarged view of a main part for explaining the content of clearance data.

FIG. 6 is a diagram showing an example of a negative data pattern after a clearance check.

FIG. 7 is a diagram showing an example of a final ground solid pattern.

[Explanation of symbols]

 1 grand solid pattern generation device 2 pattern design data storage unit 3 negative data generation processing unit 4 design data link unit 5 clearance check processing unit 6 clearance data storage unit 7 ground connection processing unit 8 ground connection position data storage unit 9 ground solid pattern data storage Department

Claims (3)

[Claims] 1. Negative data generation processing means for generating negative data by inverting pattern data indicating a specific pattern area including a component placement / wiring area on the front and back surfaces of a multilayer printed wiring board for which wiring pattern design has been completed, and preset. Based on the clearance value, a clearance forming processing means for forming a clearance in the negative data portion where the negative data and the specific pattern area are in contact with each other, and a plurality of points at predetermined intervals for the negative data processed by the clearance forming processing means. Data extraction processing means for generating data and extracting only point data that does not overlap with the specific pattern area in the front and back surfaces and the ground inner layer at each position of the point data as through hole data that connects the front and back surfaces and the ground inner layer, Clearance type A solid pattern generation processing unit configured to combine the negative data processed by the generation processing unit and the through-hole data extracted by the data extraction processing unit to generate ground solid pattern data; apparatus. 2. A step of obtaining design data after completion of a wiring pattern design in a multilayer printed wiring board in which a through hole is formed, and component placement / wiring regions on the front and back surfaces of the multilayer printed wiring board based on the design data. A step of obtaining an empty area other than the specific pattern area including the negative data, and organically combining the negative data and the data after completion of the wiring pattern design, with the specific pattern area of the negative data in the combined data. A step of eliminating the lack of clearance on the basis of a preset clearance value for the manufacturing clearance, a step of finally forming the solid pattern data by solidifying the negative data in which the clearance is sufficient, and a predetermined interval for the solid pattern data. Generate multiple through-hole data for each The step of making only the through hole data where the hole data position does not overlap with the specific pattern area in the front and back layers and the inner ground layer as valid through hole data, and the through hole data connecting the front and back surfaces and the inner ground layer to the solid pattern data. And a step of additionally generating ground solid pattern data, the method further comprising: 3. The ground solid pattern generating method according to claim 2, wherein the specific pattern area is an area for forming a component mounting pad, a component through hole, a wiring pattern, and a via hole.