JP2009151364A - Board design device - Google Patents

Abstract

<P>PROBLEM TO BE SOLVED: To provide a board design device allowing even a user lacking knowledge related to a design of a shield face to easily design the shield face capable of reducing electromagnetic noise. <P>SOLUTION: A CPU 21 of this board design device 1 is materialized: a shield face stabilization part 31 for electrically stabilizing the shield face formed on a printed board so as to prevent electrical resonance of the shield face; a shield face generation part 32 for obtaining a clearance value optimum to form the shield face, and forming the shield face by use of the clearance value; and an impedance change point detection part 33 for detecting a change point wherein a change of impedance of wiring is caused by the shield face. <P>COPYRIGHT: (C)2009,JPO&INPIT

Description

  The present invention relates to a board design apparatus for designing a printed circuit board, and more particularly to a board design apparatus for designing a shield surface that is formed on the front surface or the back surface of a printed circuit board and shields electromagnetic noise.

  In recent years, printed circuit board design including the placement of electronic components and printed circuit board wiring on a printed circuit board has been performed efficiently using a printed circuit board design CAD (Computer Aided Design) board design apparatus. ing. In recent years, EMC (Electro Magnetic Compatibility) countermeasure requirements for printed circuit boards are increasing, and a board design apparatus capable of designing a shield surface on a printed circuit board in order to reduce electromagnetic noise. Has also been proposed.

  In such a board design apparatus, if a user designates a net, a physical layer, and a clearance value for the board design apparatus, a shield surface as designated is created. Here, the net is information indicating the electrical connection relationship of the shield surface to be created, the physical layer is information indicating the layer on which the shield surface is to be formed, and the clearance value is the shield This is information indicating a distance from another wiring or the like in the layer where the surface is formed.

  Further, in the board designing apparatus, when the shield surface is electrically floating (electrically unconnected state), a rats nest is displayed on the shield surface. Here, as is well known, the rats nest is a net in which the terminals to be connected are connected with a straight line, and disappears when the connection between the terminals is completed. For this reason, a user (for example, a board designer) instructs the board design apparatus to connect the shield surface to a predetermined pattern or solid surface while referring to the display of the ratsnest, and the shield surface is placed at the connection position. A pull-out via for connecting to a solid surface etc. is created manually and designed to have the same potential in the net. In addition, since the above content is a publicly known technique, there is no prior art document information to be described.

  By the way, the shield surface formed on the printed circuit board may cause a change in impedance of wirings arranged close to the shield surface, and electromagnetic noise increases due to the reflection of high-frequency current generated at the impedance change point. There is a problem of end up. FIG. 8 is a diagram for explaining the impedance change point of the wiring caused by the shield surface.

  As shown in FIG. 8, when the shield surface SL100 is formed by reducing the clearance value on the surface of the printed board on which the wirings L101 and L102 are arranged, the shield surface SL100 is formed on the portion G100 where the distance between the wirings L101 and L102 is narrow. However, the shield surface SL100 is formed in a state close to the wirings L101 and L102 except for the portion C100. For this reason, the change of the impedance of the wirings L101 and L102 is caused at the part denoted by the reference symbol P100, the high frequency current transmitted through the wirings L101 and L102 is reflected, and the electromagnetic noise increases.

  The above impedance change occurs not only between the wiring formed in the same layer and the shield surface but also between the wiring formed in different layers and the shield surface. For example, when viewed in plan, only a part of the wiring formed on the front surface overlaps the shield surface formed on the back surface. For this reason, in order to reduce electromagnetic noise, it is necessary to design the shield surface in consideration of not only the wiring formed in the same layer but also the wiring formed in other layers.

  Further, depending on the design of the shield surface, the shield surface may electrically resonate, which also causes a problem that electromagnetic noise increases. For example, as described above, the shield surface is connected to a predetermined pattern or a solid surface using a withdrawal via, and the potential is fixed. However, if the number of withdrawal vias is insufficient, The surface resonates electrically. Alternatively, the shield surface also electrically resonates due to a current flowing through the shield surface due to incorrect connection of the shield surface. As a result, electromagnetic noise increases.

  Furthermore, it has been empirically known that electromagnetic noise tends to be reduced when the shield surface is a ground net. It is common knowledge that a knowledgeable and experienced user should make the shield surface a ground net, and naturally the shield surface is made a ground net. However, such a user with poor knowledge may perform a wrong design such as connecting the shield surface to the power supply net. For this reason, from the viewpoint of reducing electromagnetic noise, it is desirable to prevent erroneous design even when a user with poor knowledge designs.

  The present invention has been made in view of the above circumstances, and provides a board design apparatus that can easily design a shield surface that can reduce electromagnetic noise even for a user who lacks knowledge about the design of the shield surface. The purpose is to do.

In order to solve the above-described problem, a board design apparatus according to a first aspect of the present invention is a board design apparatus (1) that designs a shield surface that shields electromagnetic noise using board data that is design information of a printed board. ), From the data relating to the shield surface included in the substrate data, at least the characteristic shape of the shield surface, the connection portion of the shield surface to the electronic component disposed on the printed circuit board, and the surface shape of the shield surface A position determining unit (31a) for determining a position where a connecting portion for extracting one and determining the potential of the shield surface is to be formed is provided.
According to the present invention, at least one of the characteristic shape of the shield surface, the connection portion of the shield surface to the electronic component arranged on the printed circuit board, and the surface shape of the shield surface is extracted from the data regarding the shield surface included in the board data. Thus, a position where a connection portion for determining the potential of the shield surface is to be formed is determined.
In addition, the substrate design apparatus according to the first aspect of the present invention re-uses the position determined by the position determination unit or the pattern arranged around the position so as not to become an obstacle in forming the connection unit. A pattern resetting unit (31b) to be set is provided.
In order to solve the above-described problem, a board design apparatus according to a second aspect of the present invention is a board design apparatus (1) that designs a shield surface that shields electromagnetic noise using board data that is design information of a printed board. ), The minimum of the shield surface for the wiring without causing a change in impedance of the wiring based on physical information of the printed board included in the board data and information on the wiring formed on the printed board. It is characterized by comprising a calculation unit (32b) for calculating the clearance value.
According to this invention, based on the physical information of the printed circuit board included in the circuit board data and the information on the wiring formed on the printed circuit board, the minimum clearance value of the shield surface with respect to the wiring that does not cause a change in wiring impedance is obtained. Calculated.
The board designing apparatus according to the second aspect of the present invention creates a shield surface on the printed circuit board in which a minimum gap with respect to the wiring is maintained at a gap indicated by the clearance value calculated by the calculator. It is characterized by including a shield surface creation part (32c).
In order to solve the above-described problem, a board designing apparatus according to a third aspect of the present invention is a board designing apparatus for designing a shield surface that shields electromagnetic noise using board data that is printed board design information (1). ), The data relating to the shield surface included in the substrate data, and the first wiring formed in the layer in which the shield surface is formed and the second layer formed in a layer different from the layer in which the shield surface is formed. A change point detection unit (33) is provided that detects a change point at which a change in impedance of the wiring is caused by the shield surface using data related to at least one of the wirings.
According to the present invention, the data relating to the shield surface included in the substrate data, the first wiring formed in the layer on which the shield surface is formed, and the second wiring formed in a layer different from the layer on which the shield surface is formed. Using the data regarding at least one of the wirings, a change point at which a change in impedance of the wiring is caused by the shield surface is detected.
Further, in the board designing apparatus according to the third aspect of the present invention, the change point detection unit determines whether or not an interval between the shield surface and the first wiring is smaller than an interval indicated by a predetermined clearance value. Alternatively, the change point is detected by determining whether or not a break in the shield surface with respect to the second wiring is equal to or less than a predetermined allowable width.

  According to the present invention, the position for forming the connection portion for determining the potential of the shield surface is automatically determined, and the minimum clearance value of the shield surface for the wiring that does not cause a change in the impedance of the wiring is calculated. Since the change point at which the impedance change of the wiring is caused by the shield surface is detected, even a user who has little knowledge about the design of the shield surface easily designs a shield surface that can reduce electromagnetic noise. There is an effect that can be.

  Hereinafter, a substrate design apparatus according to an embodiment of the present invention will be described in detail with reference to the drawings. FIG. 1 is a block diagram showing a main configuration of a substrate design apparatus according to an embodiment of the present invention. As shown in FIG. 1, the board design apparatus 1 of the present embodiment includes a design apparatus main body 11, an input device 12, and a display device 13. Designs the printed circuit board and displays the result on the display device 13 as appropriate.

  The design apparatus main body 11 includes a CPU (Central Processing Unit) 21, a RAM 22, and a hard disk 23. The CPU 21 designs a printed circuit board according to a user instruction via the input device 12 according to various programs (not shown) stored in the hard disk 23. Specifically, the CPU 21 reads out various programs stored in the hard disk 23, so that a shield surface stabilization unit 31, a shield surface generation unit 32, and an impedance change point detection unit 33 (change point detection unit) are displayed on the CPU 21. Is realized, and these cooperate to design a printed circuit board.

  The shield surface stabilization unit 31 includes a via generation position determination unit 31a (position determination unit) and a pattern resetting unit 31b, and is formed on the printed circuit board to prevent electrical resonance of the shield surface. Electrically stabilize the shield surface. The via generation position determination unit 31a reads the board data D1 recorded on the hard disk 23, and determines the characteristic shape of the shield surface (for example, the protrusion amount from the shield surface is a predetermined amount from the data related to the shield surface included in the board data D1). The above convex portions), the connection part of the shield surface to other electronic components, the surface shape of the shield surface, and the like are extracted.

  In addition, the via generation position determination unit 31a determines the position where the characteristic shape of the shield surface is formed and the position of the connection part of the shield surface with respect to other electronic components as the formation position of the via (drawing via: connection part). The position where vias can be arranged at predetermined intervals is determined from the extracted surface shape of the shield surface. Here, the withdrawal via is a connection terminal for connecting the shield surface to a predetermined pattern or a solid surface, and is used to determine the potential of the shield surface.

  FIG. 2 is a diagram illustrating processing performed by the via occurrence position determination unit 31a. As shown in FIG. 2A, a large number of wirings 41 such as signal wirings, vias 42 that connect the wirings 41 to other wirings formed in the printed circuit board or on the back surface, and electrodes of electronic components are connected on the printed circuit board. In addition to the land 43 and the like, a shield surface SL1 is formed. For example, in FIG. 2A, the via generation position determination unit 31a extracts a convex portion indicated by reference numeral P1 as a characteristic shape of the shield surface SL1, and forms the via V1 at the position of the convex portion P1. Decide where it should be. The positions of other vias V1 shown in FIG. 2A are determined in the same procedure.

  The via generation position determination unit 31a determines a position where vias can be arranged at predetermined intervals from the surface shape of the shield surface SL1. Specifically, the position of the via V2 shown in FIG. Referring to FIG. 2 (a), the via V1 determined based on the characteristic shape is unevenly distributed in the peripheral portion of the shield surface SL1, but the via V2 determined based on the surface shape of the shield surface SL1. It can be seen that are located between the spaced apart vias V1. Thereby, the position which determines the electric potential of shield surface SL1 is made substantially uniform in shield surface SL1.

  As shown in FIG. 2B, shield surfaces SL2 and SL3 are formed on the printed circuit board together with lands 44 and 45 to which electrodes of electronic components are connected. For example, in FIG. 2B, the via generation position determination unit 31a includes a connection portion P1 of the shield surface SL2 to the land 44 to which the electronic component is connected and a connection portion P2 of the shield surface SL3 to the land 45 to which the electronic component is connected. The position is extracted, and the position is determined as the position where vias V3 and V4 are to be formed.

  The pattern resetting unit 31b resets the position determined by the via generation position determining unit 31a or the pattern arranged around the position so as not to become an obstacle in forming the via. For example, when the printed circuit board is viewed in a plan view, if the wiring is formed so that the via should be formed in a layer different from the layer where the shield surface is formed, the via is formed. Reset the position to be bypassed by the wiring. Note that if it is not possible to deal with by simple detouring, the wiring may be peeled off and a new wiring may be provided.

  The shield surface generation unit 32 includes an attribute check unit 32a, an optimum clearance calculation unit 32b (calculation unit), and a shield surface creation unit 32c. The shield surface generation unit 32 obtains an optimum clearance value for creating the shield surface, and this clearance value. Use to create a shield surface. The attribute check unit 32a checks whether the attribute of the shield surface to be created, specifically, the attribute of the shield surface is a ground attribute. This is to prevent the shield surface from being connected to the power supply wiring and the signal wiring and causing current to flow through the shield surface to generate electromagnetic noise from the shield surface.

  The optimum clearance calculation unit 32b reads the physical information of the printed circuit board included in the circuit board data D1 recorded on the hard disk 23 and the information related to the wiring formed on the printed circuit board, and changes the impedance of the wiring based on the information. Calculate the minimum clearance value of the shield surface for the wiring that does not cause. FIG. 3 is a diagram illustrating an example of processing performed by the optimum clearance calculation unit 32b.

  As shown in FIG. 3A, consider a printed circuit board SB in which a signal wiring 46 and a shield surface SL4 are formed on the front surface side, and a solid surface B1 is formed on the back surface side. It is assumed that the thickness of the substrate SB is h, the width of the signal wiring 46 is S, and the interval (pattern interval) between the signal wiring 46 and the shield surface SL4 is W. In the printed board SB having such a configuration, the characteristic impedance when the thickness h of the printed board SB and the pattern interval W are changed without changing the width S of the signal wiring 46 changes as shown in FIG.

  Referring to FIG. 3B, it can be seen that when the thickness h of the printed circuit board SB is changed while the pattern interval W is constant, the characteristic impedance increases as the thickness h increases. It can also be seen that if the pattern interval W is changed while the thickness h of the printed circuit board SB is kept constant, the characteristic impedance increases as the pattern interval W increases. Here, when the pattern interval W is changed, if the pattern interval W is 0.3 [mm] or less, the characteristic impedance changes greatly when the pattern interval W is changed, but the pattern interval W is about 0.5 [mm]. Then, even if the pattern interval W is changed, the characteristic impedance hardly changes.

  For this reason, in the example shown in FIG. 3, if the clearance value of the shield surface SL4 is set to about 0.5 [mm], it can be said that the characteristic impedance does not change or the characteristic impedance changes very little. The optimum clearance calculation unit 32b reads the thickness of the printed circuit board and the relative dielectric constant as physical information of the printed circuit board included in the circuit board data D1, and reads the width of the wiring as information about the wiring formed on the printed circuit board. The relationship between the pattern interval W shown in 3 (b) and the characteristic impedance is obtained, and the minimum clearance value of the shield surface for the wiring that does not cause the change in the impedance of the wiring is calculated. Since the method for calculating the characteristic impedance differs depending on the structure of the printed circuit board, the optimum clearance calculating unit 32b needs to obtain the characteristic impedance by a method suitable for the structure of the printed circuit board.

  The shield surface creation unit 32c uses the minimum clearance value calculated by the optimum clearance calculation unit 32 to create a shield surface on the printed circuit board that does not fall below the minimum clearance value with respect to the wiring. Here, the interval between the shield surface created by the shield surface creation unit 32c and the wiring may be wider than the interval indicated by the minimum clearance value. However, if the distance between the shield surface and the wiring is excessively widened, electromagnetic noise through the gap increases, and therefore it is desirable to make it the same as the minimum clearance value calculated by the optimum clearance calculation unit 32.

  The impedance change point detection unit 33 includes an in-layer impedance change point detection unit 33a and an adjacent layer impedance change point detection unit 33b, and detects a change point at which a change in the impedance of the wiring is caused by the shield surface. The same-layer impedance change point detection unit 33a includes a calculation unit (not shown) similar to the optimum clearance calculation unit 32b, and is formed in a layer in which the data related to the shield surface and the shield surface are formed from the substrate data D1. The minimum clearance value that does not cause a change in impedance is obtained by reading out data related to the wiring (first wiring). An impedance change point is detected based on whether or not the interval between the shield surface and the wiring is smaller than the interval indicated by the minimum clearance value.

  The adjacent layer impedance change point detection unit 33b reads the data related to the shield surface and the data related to the wiring (second wiring) formed in a layer different from the layer where the shield surface is formed from the substrate data D1, and shields the wiring. An impedance change point is detected by determining whether or not the surface break is equal to or less than a predetermined allowable width. Here, the adjacent layer impedance change point detection unit 33b uses the determination data D2 recorded in the hard disk 23 to determine whether or not the break of the shield surface is equal to or less than a predetermined allowable width. The predetermined allowable width is set by the user in consideration of the structure of the printed circuit board (wiring structure, material, thickness, etc.).

  FIG. 4 is a diagram for explaining the detection process performed by the adjacent layer impedance change point detection unit 33b. First, as shown in FIG. 4A, consider a printed circuit board having a layer L11 partially formed with a shield surface SL11, a layer L12 formed with a wiring 51, and a layer L13 formed with a solid surface B11. When the printed circuit board is viewed in plan view, only a part of the wiring 51 (first part 51a) is covered with the shield surface SL11, and the other part (second part 51b) is not covered with the shield surface SL11. For this reason, a change in impedance may be caused at the boundary between the first portion 51 a and the second portion 51 b of the wiring 51.

  The adjacent layer impedance change point detection unit 33b obtains the boundary between the first portion 51a and the second portion 51b of the wiring 51, and the length of the second portion 51b not covered by the shield surface SL11 is defined by the determination data D2. It is determined whether or not it is equal to or less than a predetermined allowable width. In the example illustrated in FIG. 4A, the adjacent layer impedance change point detection unit 33 b determines that the length of the second portion 51 b of the wiring 51 is greater than the predetermined allowable width, and the wiring 51 The boundary between the first portion 51a and the second portion 52b is detected as an impedance change point.

  Next, as shown in FIG. 4B, the layer L21 with the shield surfaces SL21 and SL22 formed at a predetermined interval W1 (predetermined break), the layer L22 with the wiring 52 formed, and the solid surface B12. Consider a printed circuit board having a layer L23 in which is formed. When the printed circuit board is viewed in a plan view, the portion of the wiring 52 not covered with the shield surface (the first portion 52a and the second portion 52b) between the portions of the wiring 52 covered with the shield surfaces SL21 and SL22 (first portion 52a, second portion 52b). There is a third portion 52c).

  The adjacent layer impedance change point detection unit 33b performs the same process as described above, first, the boundary between the first portion 52a of the wiring 52 covered with the shield surface SL21 and the third portion 52c of the wiring 52 not covered with the shield surface. And the boundary between the second portion 52b of the wiring 52 covered with the shield surface SL22 and the third portion 52c of the wiring 52 not covered with the shield surface. Then, it is determined whether or not the length of the third portion 52c of the wiring 52 that is not covered by the shield surfaces SL21 and SL22 is equal to or less than a predetermined allowable width defined by the determination data D2. In the example shown in FIG. 4B, the adjacent layer impedance change point detection unit 33b determines that the length of the third portion 52c of the wiring 52 is equal to or less than the predetermined allowable width, and determines the impedance change point. No detection is performed.

  The RAM 22 is a volatile memory, and temporarily stores values of various variables used in processing performed by the CPU 21, data in the middle of designing the printed circuit board, and the like. The hard disk 23 stores the substrate data D1 created by the user and the determination data D2 used by the adjacent layer impedance change point detection unit 33b, and also includes the shield surface stabilization unit 31 to the impedance change point detection unit in FIG. Various programs (not shown) for realizing 33 are stored.

  The input device 12 includes a keyboard, a mouse, and the like, and outputs operation information corresponding to a user operation to the design apparatus main body 11. The display device 13 includes a CRT (Cathode Ray Tube), a liquid crystal display device, or the like, and displays a result designed by the design device main body 11. Specifically, the generated shield surface is displayed on the printed circuit board, or vias connected to the shield surface, impedance change points, and the like are displayed.

  Next, a printed circuit board design procedure using the circuit board design apparatus 1 having the above-described configuration will be described. The board designing apparatus 1 according to the present embodiment can be broadly classified as follows: stabilization of a shield surface that electrically stabilizes the shield surface, generation of a shield surface that generates a shield surface having an optimum clearance, and impedance change that detects an impedance change point Point detection is possible. Hereinafter, these processes will be described in order.

[Shield surface stabilization]
FIG. 5 is a flowchart showing a processing procedure for shielding surface stabilization. When the shield surface stabilization process is started, the via generation position determination unit 31a of the shield surface stabilization unit 31 reads the substrate data D1 recorded on the hard disk 23 and specifies the shield surface included in the substrate data D1. Processing is performed (step S11). Specifically, it is specified whether or not it is a shield surface with reference to the attribute data of the substrate data D1. Note that when the board data D1 includes a plurality of shield surfaces, the plurality of shield surfaces are specified.

  Next, the via generation position determination unit 31a selects one shield surface from the shield surfaces specified in step S11, the characteristic shape of the selected shield surface, the connection portion of the shield surface with respect to another electronic component, and the shield The surface shape and the like of the surfaces are extracted in order (steps S12 to S14). Specifically, as described with reference to FIG. 2A, the protrusions P1 and the like whose protrusion amount from the shield surface SL1 is a predetermined amount or more are extracted, and the position of the protrusion P1 forms the via V1. Decide where it should be. Further, as shown in FIG. 2B, the positions of the connection portion P1 of the shield surface SL2 with respect to the land 44 to which the electronic component is connected and the connection portion P2 of the shield surface SL3 with respect to the land 45 to which the electronic component is connected are extracted. The position is determined as a position where the vias V3 and V4 are to be formed. Further, as shown in FIG. 2A, the position of the via V2 arranged at a predetermined interval is determined from the surface shape of the shield surface.

  When the above processing ends, the shield surface stabilization unit 31 determines whether or not a via is already arranged at the extraction position extracted and determined in steps S12 to S14 (step S15). When this determination result is “NO”, the pattern resetting unit 31b has trouble in forming a via in the position determined by the via occurrence position determining unit 31a or the pattern arranged around the position. It resets so that it may not become (Step S16). For example, when the printed circuit board is viewed in a plan view, if the wiring is formed so that the via should be formed in a layer different from the layer where the shield surface is formed, the via is formed. Reset the position to be bypassed by the wiring.

  Next, the pattern resetting unit 31b determines whether or not the above pattern resetting is successful (step S17). If it is determined that it has succeeded (when the determination result is “YES”), the pattern resetting unit 31b creates a via at that position (step S18). On the other hand, when it is determined that the pattern resetting has failed (when the determination result is “NO”), a process of attaching a predetermined mark to the position where the via arrangement is required is performed (step S19). By attaching such a mark, it is necessary to place a via at that position, but the user can later recognize that automatic placement has failed due to other patterns.

  When the above processing is completed or when the determination result in step S15 is “YES”, the shield surface stabilization unit 31 has the remaining extraction positions among the extraction positions extracted in steps S12 to S14. It is determined whether or not (step S20). When it is determined that there are remaining extraction positions (when the determination result is “YES”), the process returns to step S15, and when it is determined that there are no remaining extraction positions (when the determination result is “NO”). In step S21, it is determined whether or not there is a remaining shield surface among the shield surfaces identified in step S11.

  When it is determined that there is a remaining shield surface (when the determination result of step S21 is “YES”), the process returns to step S12. On the other hand, when it is determined that there is no remaining shield surface (when the determination result of step S21 is “NO”), the shield surface stabilization unit 31 adds the information about the via created in step S18 or in step S19. Information about the mark is displayed on the display device 13 and is written and added to the substrate data D1 of the hard disk 23 (step S22). With the above processing, a series of processing for stabilizing the shield surface is completed. The created vias are displayed as, for example, vias V1 and V2 in FIG. 2A and vias V3 and V4 in FIG.

  In the shield surface stabilization described above, at least one of the characteristic shape of the shield surface, the connection part of the shield surface to the electronic component, and the surface shape of the shield surface is extracted from the data regarding the shield surface included in the board data D1. The positions where vias are to be formed are automatically determined and vias are automatically arranged. For this reason, even a user who lacks knowledge regarding the design of the shield surface can easily design a shield surface that can reduce electromagnetic noise. In addition, the position of the automatically arranged via or the pattern arranged around the position is reset so as not to become an obstacle in forming the via, so that the shield surface can be efficiently designed. .

[Shield surface generation]
FIG. 6 is a flowchart showing a processing procedure for generating a shield surface. When the shield surface generation process is started, first, various data for creating the shield surface is input by a user operation. Specifically, first, the user operates the input device 12 while referring to the display content of the display device 13 to input a net for creating a shield surface (step S31).

  Then, the attribute check unit 32a of the shield surface generation unit 32 checks whether or not the input net attribute is a ground attribute (step S32). If it is determined that the input net does not have the ground attribute (when the determination result is “NO”), the attribute check unit 32a displays an error on the display device 13 (step S13). Note that when such an error display is made, the series of processing shown in FIG. 6 ends.

  On the other hand, when the attribute check unit 32a determines that the input net has the ground attribute (when the determination result is “YES”), the process proceeds to input of the next data. Specifically, the user operates the input device 12 while referring to the display content of the display device 13 to input the layer of the printed circuit board for creating the shield surface (step S34), and then the region for creating the shield surface ( A region in a plane parallel to the surface of the printed circuit board is input (step S35).

  When the above input is completed, the optimum clearance calculation unit 32b reads the substrate data D1 recorded on the hard disk 23, and searches for the width of the signal pattern arranged in the area input in step S35 (step S36). Here, when there are a plurality of signal patterns having different widths, the width of each signal pattern is searched. The optimum clearance calculation unit 32b also reads physical information (thickness, relative dielectric constant, etc.) of the printed circuit board included in the substrate data D1 recorded on the hard disk 23. Then, an optimum clearance value is calculated from the obtained physical information, information indicating the layer on which the shield surface is created, and the width of the signal pattern, using the method described with reference to FIG. 3 (step S37).

  Next, the shield surface creation unit 32c uses the minimum clearance value calculated by the optimum clearance calculation unit 32 to create a shield surface on the printed circuit board that does not fall below the minimum clearance value with the signal pattern (step) S38). If the electromagnetic noise is not increased, the distance between the shield surface created by the shield surface creation unit 32c and the wiring may be wider than the distance indicated by the minimum clearance value. When the above processing is completed, the shield surface generation unit 32 displays the shield surface created by the shield surface creation unit 32 on the display device 13 and writes and adds it to the substrate data D1 of the hard disk 23 (step S39). With the above processing, a series of processing for generating the shield surface is completed.

  In the shield surface generation described above, based on the physical information of the printed circuit board included in the substrate data D1 and the information on the wiring formed on the printed circuit board, the shield surface for the wiring that does not cause a change in the impedance of the wiring. A minimum clearance value is calculated, and a shield surface is created on the printed circuit board in which the minimum interval with respect to the wiring is maintained at the interval indicated by the clearance value. For this reason, even a user who lacks knowledge about the design of the shield surface can easily design a shield surface that can reduce electromagnetic noise without causing a change in the impedance of the wiring. In addition, since the attribute of the shield surface to be created is checked, it is possible to prevent a situation in which electromagnetic noise is generated from the shield surface due to the current flowing through the shield surface due to the shield surface being accidentally connected to the power supply wiring or signal wiring. be able to.

[Impedance change point detection]
FIG. 7 is a flowchart showing a processing procedure for impedance change point detection. When the impedance change point detection process is started, a detection condition for detecting an impedance change point is first input by a user operation (step S41). For example, the allowable width of the interruption of the shield surface (interval W1 between the shield surfaces SL21 and SL22 shown in FIG. 4) is input by the user. Next, the user operates the input device 12 while referring to the display content of the display device 13 to input a region for detecting the impedance change point (a region in a plane parallel to the surface of the printed circuit board) (step S42). .

  When the above input is completed, the impedance change point detector 33 of the impedance change point detector 33 reads the substrate data D1 recorded on the hard disk 23, and a shield surface is formed in the region input in step S42. A wiring string formed in the same layer as the other layer is extracted (step S43). Here, the wiring string refers to a continuous portion of wiring that connects between any two connection portions (terminals, vias) formed in the layer in any one layer of the printed circuit board. If the wiring is branched, a plurality of wiring strings may be extracted for the wiring.

  When the extraction of the wiring string is completed, the impedance change point detection unit 33a in the same layer determines whether or not the wiring string extracted in step S43 is a wiring string that needs to detect the impedance changing point (step). S44). Specifically, the same-layer impedance change point detection unit 33a uses an extracted wiring string such as a wiring with a limited wiring length, a wiring with an equal length wiring, or a differential pair signal wiring. It is determined whether or not the wiring string needs to detect the impedance change point depending on whether or not the wiring is restricted.

  Here, a case will be described in which it is determined whether or not the wiring string needs to detect the impedance change point due to the restriction imposed on the wiring. However, list information indicating whether or not the wiring change string needs to be detected in advance for each wiring formed on the printed circuit board is created, and the determination in step S44 is performed based on the list information. May be performed.

  In step S44, when it is determined that the wiring string needs to detect the impedance change point (when the determination result is “YES”), the adjacent layer impedance change point detection unit 33b performs the target wiring. Surface data of other layers covering the string is collected (step S45). For example, in the example shown in FIG. 4B, when the target wiring string is applied to the wiring 52, the shield surfaces SL21 and SL22 formed on the layer L21 and the solid surface B12 formed on the layer L23. Collect aspect data on. In this example, surface data for two adjacent layers is collected as an example, but surface data for all layers formed on the printed circuit board may be collected.

  Next, the adjacent layer impedance change point detector 33b uses the surface data collected in step S45 to define the interruption of the shield surface (the interval W1 between the shield surfaces SL21 and SL22 shown in FIG. 4) by the determination data D2. It is determined whether or not the width is less than the allowable width (step S46). When it is determined that the interruption of the shield surface is larger than the allowable value (when the determination result of step S46 is “NO”), the impedance change point is accumulated in the RAM 22 or the like (step S47). For example, in the example shown in FIG. 4A, the boundary between the first portion 51a and the second portion 52b of the wiring 51 is detected and accumulated as an impedance change point.

  On the other hand, when it is determined that the shield surface break is less than or equal to the allowable value (when the determination result of step S46 is “YES”), or when the process of step S47 is completed, the same-layer impedance change point detection is performed. The part 33a identifies a surface that is formed in the same layer as the layer on which the target wiring string is formed and that is near the wiring string (step S48). Then, the minimum clearance value (optimum clearance value) that does not cause the impedance of the target wiring to be changed by the surface specified in step S48 is calculated (step S49).

  Next, the same-layer impedance change point detection unit 33a determines whether or not the distance between the surface specified in step S48 and the target wiring string is equal to or larger than the optimum clearance value calculated in step S49 ( Step S50). When it is determined that the distance between the surface specified in step S48 and the target wiring string is smaller than the optimum clearance value (when the determination result is “NO”), the impedance change point is set to the RAM 22 or the like. (Step S51).

  On the other hand, when the determination result of step S50 is “YES”, the determination result of step S44 is “NO”, or when the process of step S51 is completed, the impedance change point detection unit 33 performs step S43. It is determined whether or not there is a remaining wiring string extracted in step S52. If the determination result is “YES”, the process returns to step S44. If the determination result is “NO”, the impedance change point detection unit 33 displays the result on the display device 13 (step S53). Specifically, when there is an impedance change point accumulated in the processes of steps S47 and S51, the position of the change point on the substrate is displayed on the display device 13.

  In the impedance change point detection described above, the data related to the shield surface included in the substrate data D1 is different from the wiring (first wiring) formed on the layer on which the shield surface is formed and the layer on which the shield surface is formed. Using the data related to at least one of the wirings (second wirings) formed in the layer, a change point at which a change in the impedance of the wiring is caused by the shield surface is detected. For this reason, electromagnetic noise can be reduced by taking measures (for example, redesigning the shield surface) that can eliminate the impedance change point that is automatically detected, even for users with limited knowledge about the shield surface design. Can be made.

  As described above, in this embodiment, vias are automatically arranged for the shield surface in the shield surface stabilization, the shield surface having the optimum clearance is automatically created in the shield surface generation, and the impedance change point in the impedance change point detection. Therefore, even a user who lacks knowledge about the design of the shield surface can easily design a shield surface that can reduce electromagnetic noise.

  Further, in the present embodiment, it is possible to reduce the time required for the design, and it is possible to prevent a situation in which noise radiated from the printed circuit board is greatly influenced by the skill of the user (board designer). Furthermore, since the designed shield surface can be displayed on the display device 13, an educational effect for the designer can be obtained.

  As described above, the substrate design apparatus according to the embodiment of the present invention has been described, but the present invention is not limited to the above embodiment, and can be freely changed within the scope of the present invention. For example, in the above-described embodiment, the shield surface stabilization, shield surface generation, and impedance change point detection are individually described for the sake of simplicity. However, first, a shield surface is created by generating the shield surface shown in FIG. 6, and a via is created by stabilizing the shield surface shown in FIG. 5 in order to stabilize the created shield surface. It is desirable to detect the change point of the impedance of the wiring due to the surface by the impedance change point detection shown in FIG.

It is a block diagram which shows the principal part structure of the board | substrate design apparatus by one Embodiment of this invention. It is a figure explaining the process performed by the via generation position determination part 31a. It is a figure explaining an example of the process performed in the optimal clearance calculation part 32b. It is a figure for demonstrating the detection process performed in the adjacent layer impedance change point detection part 33b. It is a flowchart which shows the process sequence of shield surface stabilization. It is a flowchart which shows the process sequence of a shield surface production | generation. It is a flowchart which shows the process sequence of an impedance change point detection. It is a figure explaining the impedance change point of the wiring caused by the shield surface.

Explanation of symbols

DESCRIPTION OF SYMBOLS 1 Board | substrate design apparatus 31 Shield surface stabilization part 31a Via generation | occurrence | production position determination part 31b Pattern reset part 32 Shield surface production | generation part 32b Optimum clearance calculation part 32c Shield surface preparation part 33 Impedance change point detection part 33a Same layer impedance change point detection part 33b Adjacent layer impedance change point detector

Claims (6)

In a board design device that designs a shield surface that shields electromagnetic noise using board data that is design information of a printed circuit board,
From the data regarding the shield surface included in the substrate data, at least one of a characteristic shape of the shield surface, a connection portion of the shield surface with respect to an electronic component disposed on the printed circuit board, and a surface shape of the shield surface is obtained. A substrate design apparatus comprising: a position determining unit that determines a position where a connection part for extracting and determining a potential of the shield surface is to be formed.   A pattern resetting unit that resets the position determined by the position determination unit or a pattern arranged around the position so as not to be an obstacle in forming the connection unit. 1. The board design apparatus according to 1. In a board design device that designs a shield surface that shields electromagnetic noise using board data that is design information of a printed circuit board,
Based on physical information of the printed circuit board included in the circuit board data and information on the wiring formed on the printed circuit board, the minimum clearance value of the shield surface with respect to the wiring without causing a change in impedance of the wiring A board design apparatus comprising a calculation unit for calculating   4. A shield surface creation unit that creates a shield surface on the printed circuit board, the shield surface having a minimum interval with respect to the wiring maintained at an interval indicated by the clearance value calculated by the calculation unit. Board design equipment. In a board design device that designs a shield surface that shields electromagnetic noise using board data that is design information of a printed circuit board,
At least the data related to the shield surface included in the substrate data, the first wiring formed in the layer where the shield surface is formed, and the second wiring formed in a layer different from the layer where the shield surface is formed A board design apparatus comprising: a change point detection unit that detects a change point at which a change in impedance of the wiring is caused by the shield surface using data related to one wiring.   The change point detection unit determines whether or not the interval between the shield surface and the first wiring is smaller than the interval indicated by a predetermined clearance value, or the interruption of the shield surface with respect to the second wiring is predetermined. 6. The substrate design apparatus according to claim 5, wherein the change point is detected by determining whether or not the allowable width is equal to or less than the allowable range.

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