JPH0758753B2 - Lead frame - Google Patents
Lead frameInfo
- Publication number
- JPH0758753B2 JPH0758753B2 JP61036997A JP3699786A JPH0758753B2 JP H0758753 B2 JPH0758753 B2 JP H0758753B2 JP 61036997 A JP61036997 A JP 61036997A JP 3699786 A JP3699786 A JP 3699786A JP H0758753 B2 JPH0758753 B2 JP H0758753B2
- Authority
- JP
- Japan
- Prior art keywords
- lead frame
- lead
- conductive paste
- bonding
- resin
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired - Lifetime
Links
- 239000004065 semiconductor Substances 0.000 claims description 15
- 239000011347 resin Substances 0.000 claims description 9
- 229920005989 resin Polymers 0.000 claims description 9
- 238000007789 sealing Methods 0.000 claims description 6
- 229920001187 thermosetting polymer Polymers 0.000 claims description 6
- BQCADISMDOOEFD-UHFFFAOYSA-N Silver Chemical compound [Ag] BQCADISMDOOEFD-UHFFFAOYSA-N 0.000 description 19
- 229910052709 silver Inorganic materials 0.000 description 19
- 239000004332 silver Substances 0.000 description 19
- 238000007747 plating Methods 0.000 description 12
- 239000000463 material Substances 0.000 description 3
- 238000000034 method Methods 0.000 description 3
- 230000000694 effects Effects 0.000 description 2
- 238000009713 electroplating Methods 0.000 description 2
- PCHJSUWPFVWCPO-UHFFFAOYSA-N gold Chemical compound [Au] PCHJSUWPFVWCPO-UHFFFAOYSA-N 0.000 description 2
- 229910052737 gold Inorganic materials 0.000 description 2
- 239000010931 gold Substances 0.000 description 2
- 229910052751 metal Inorganic materials 0.000 description 2
- 239000002184 metal Substances 0.000 description 2
- 238000000576 coating method Methods 0.000 description 1
- 238000005538 encapsulation Methods 0.000 description 1
- 238000005516 engineering process Methods 0.000 description 1
- 230000000873 masking effect Effects 0.000 description 1
- 238000005507 spraying Methods 0.000 description 1
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
- H01L21/48—Manufacture or treatment of parts, e.g. containers, prior to assembly of the devices, using processes not provided for in a single one of the subgroups H01L21/06 - H01L21/326
- H01L21/4814—Conductive parts
- H01L21/4821—Flat leads, e.g. lead frames with or without insulating supports
- H01L21/4825—Connection or disconnection of other leads to or from flat leads, e.g. wires, bumps, other flat leads
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
- H01L2224/481—Disposition
- H01L2224/48151—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
- H01L2224/48221—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
- H01L2224/48245—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic
- H01L2224/48247—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic connecting the wire to a bond pad of the item
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/01—Chemical elements
- H01L2924/01078—Platinum [Pt]
Landscapes
- Engineering & Computer Science (AREA)
- Physics & Mathematics (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- General Physics & Mathematics (AREA)
- Manufacturing & Machinery (AREA)
- Computer Hardware Design (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Power Engineering (AREA)
- Wire Bonding (AREA)
- Lead Frames For Integrated Circuits (AREA)
Description
【発明の詳細な説明】 〔産業上の利用分野〕 本発明はリードフレームに関し、特に半導体装置に使用
されるリードフレームの構造に関する。The present invention relates to a lead frame, and more particularly to the structure of a lead frame used in a semiconductor device.
第3図(a)は従来のリードフレームを樹脂封止型半導
体装置に使用した一例を示す断面図、同図(b)は同図
(a)におけるリードフレームをフォーミングした一例
を示す断面図である。FIG. 3A is a sectional view showing an example in which a conventional lead frame is used in a resin-sealed semiconductor device, and FIG. 3B is a sectional view showing an example of forming the lead frame in FIG. 3A. is there.
従来、この種のリードフレームは、ワイヤーボンディン
グされる内部リード部に電解めっきによって金,銀等の
金属めっきが施されていた。Conventionally, in this type of lead frame, metal plating such as gold or silver is applied to the inner lead portion to be wire-bonded by electrolytic plating.
第3図(a)に示すように、リードフレーム11に銀めっ
き12が施され、同じく銀めっき12が施されたダイパッド
51上に半導体チップ61とボンディングワイヤ31によって
接続され、全体が封止用樹脂20によって封止されてい
る。この従来例では、封止用樹脂20の外部のリードフレ
ーム11の部分11aまで銀めっき12が施されている。As shown in FIG. 3A, the lead frame 11 is plated with silver 12, and the die pad is also plated with silver 12.
The semiconductor chip 61 and the bonding wire 31 are connected to each other on the 51, and the whole is sealed with the sealing resin 20. In this conventional example, silver plating 12 is applied to a portion 11a of the lead frame 11 outside the sealing resin 20.
また第3図(b)に示すように、同図(a)における従
来例のリードフレーム11をフォーミングしてリード13を
形成したとき、銀めっき12の端部12aが剥離してしまっ
ている。In addition, as shown in FIG. 3 (b), when forming the leads 13 by forming the lead frame 11 in the conventional example in FIG. (A), the end portion 12 a of the silver plating 12 is accidentally peeled .
上述した従来のリードフレームは、費用低減の面から、
ワイヤーボンディングに必要な内部リードの先端部及び
ダイパッドのみにめっきを施すようにするために、リー
ドフレームのリード先端部以外及びダイパッド以外の部
分をゴム板等で覆い(以下マスキングと呼ぶ)、マスキ
ングされないダイパッド及び内部リード先端部にめっき
液を吹付けてめっきをするが、このめっきを施そうとす
る部分以外にもマスキングできない部分にめっき液が流
れ込んでめっきされてしまう。たとえば、リード側面な
どにもめっきされてしまうので、めっきに使用する材料
費がかえって高くなってしまうという欠点がある。The above-mentioned conventional lead frame is
In order to apply plating only to the tips of the internal leads and the die pad required for wire bonding, cover the areas other than the lead tips of the lead frame and the die pad with a rubber plate, etc. (hereinafter referred to as masking), and are not masked. Plating is performed by spraying a plating solution onto the die pad and the tip of the internal lead, but the plating solution flows into a portion that cannot be masked other than the portion to be plated and plating is performed. For example, since the lead side surface is also plated, there is a drawback that the cost of the material used for plating is rather high.
また樹脂封止型半導体装置の場合、樹脂封止外部のリー
ドの側面にもめっきが施された時には、リードフォーミ
ング時にリード側面のめっきが、リードが曲げられるに
従ってリード側面から剥離し、外部リードが互いに短絡
するなどの不具合を生じるという欠点がある。Further, in the case of a resin-encapsulated semiconductor device, when the side surface of the lead outside the resin encapsulation is also plated, the plating on the side surface of the lead during lead forming is separated from the side surface of the lead as the lead is bent, and the external lead is separated. There is a drawback that problems such as short-circuiting with each other occur.
本発明は樹脂封止型半導体装置における半導体チップと
ボンディングワイヤによって接続する半導体装置用のリ
ードフレームにおいて、前記ボンディングワイヤと接続
する部分に塗布した導電性ペーストを備え、前記導電性
ペーストの塗布領域が樹脂封止領域の内部に設けられ、
ワイヤーボンディングする以前に前記導電性ペーストが
熱硬化され、前記ボンディングワイヤと熱硬化された前
記導電性ペーストを熱圧着することによりワイヤーボン
ディングを行なうように構成したものである。The present invention, in a lead frame for a semiconductor device, which is connected to a semiconductor chip in a resin-sealed semiconductor device by a bonding wire, comprises a conductive paste applied to a portion connected to the bonding wire, and the application area of the conductive paste is Provided inside the resin sealing area,
Before the wire bonding, the conductive paste is thermoset, and the bonding wire and the thermoset conductive paste are thermocompression bonded to perform wire bonding.
次に、本発明について図面を参照して説明する。 Next, the present invention will be described with reference to the drawings.
第1図は本発明の一実施例を樹脂封止型半導体装置に使
用した場合の断面図、第2図は本実施例に導電性ペース
トを塗布する状況を示す説明図である。FIG. 1 is a cross-sectional view when one embodiment of the present invention is used in a resin-sealed semiconductor device, and FIG. 2 is an explanatory view showing a situation where a conductive paste is applied to this embodiment.
本実施例はリードフレーム1及び導電性ペーストの一例
である銀ペースト2を有する。ワイヤーボンディングを
可能にするために、本実施例では、熱硬化性の銀ペース
ト2をリードフレーム1に塗布し、リードフレーム1を
加熱することにより銀ペースト2をリードフレーム1に
固着させ、封止用樹脂10によって樹脂封止している。This embodiment has a lead frame 1 and a silver paste 2 which is an example of a conductive paste. In order to enable wire bonding, in the present embodiment, a thermosetting silver paste 2 is applied to the lead frame 1 and the lead frame 1 is heated to fix the silver paste 2 to the lead frame 1 and to seal it. The resin 10 is used for resin sealing.
銀ペースト2の塗布方法としては、第2図に示すように
ゴム板8に予め銀ペースト2を塗布しておき、可動部9
を矢印A方向に上下させてゴム板8をリードフレーム1
に接触させ、銀ペースト2をゴム板8からリードフレー
ム1に転写することにより、銀ペースト2をリードフレ
ーム1に塗布するようになっている。塗布面積及び形状
は、ゴム板8の面積及び形状を調整することにより自由
に変えることができる。As a method for applying the silver paste 2, as shown in FIG.
Up and down in the direction of arrow A to attach the rubber plate 8 to the lead frame 1
And the silver paste 2 is transferred from the rubber plate 8 to the lead frame 1 so that the silver paste 2 is applied to the lead frame 1. The application area and shape can be freely changed by adjusting the area and shape of the rubber plate 8.
この塗布方法によって、第1図に示すように、内部リー
ド4の側面には銀ペースト2が付かず、また封止用樹脂
10の外部のリードフレーム1に銀ペースト2が塗布され
ることも容易に防止することができる。By this coating method, as shown in FIG. 1, the silver paste 2 is not attached to the side surface of the inner lead 4, and the sealing resin is used.
It is also possible to easily prevent the silver paste 2 from being applied to the lead frame 1 outside of 10.
なお、第1図に示すワイヤーボンディングに使用するボ
ンディングワイヤ3の材質は、金とした。内部リード4
の銀ペースト2の表面にボンディングワイヤ3を連結す
る方法は、熱圧着法を用いた。The material of the bonding wire 3 used for wire bonding shown in FIG. 1 was gold. Internal lead 4
As a method of connecting the bonding wire 3 to the surface of the silver paste 2, the thermocompression bonding method was used.
また、ダイパッド5と半導体チップ6の接合は、内部リ
ード4に銀ペースト2を固着させた後、同様な熱硬化性
の銀ペースト7によって実施した。Further, the die pad 5 and the semiconductor chip 6 were joined by fixing the silver paste 2 to the inner lead 4 and then using the same thermosetting silver paste 7.
なお、本実施例においては、導電性ペーストとして銀ペ
ーストを例示したが、これに限らず導電性を有する他の
材質のペーストを使用してもよい。In the present embodiment, the silver paste is illustrated as the conductive paste, but the conductive paste is not limited to this, and a paste of another material having conductivity may be used.
以上説明したように本発明は、リードフレームに導電性
ペーストを塗布することにより、内部リードに電解めっ
きを施さないでよいので、リード側面に漏れためっき金
属がリードフォーミング時に剥離するという不具合等を
防止することができ、また費用の低減ができるという効
果がある。As described above, according to the present invention, by applying the conductive paste to the lead frame, it is not necessary to perform electrolytic plating on the internal leads, so that the plating metal leaked to the side surface of the lead may be peeled off during lead forming. There is an effect that it can be prevented and the cost can be reduced.
第1図は本発明の一実施例を樹脂封止型半導体装置に使
用した場合の断面図、第2図は本実施例に導電性ペース
トを塗布する状況を示す説明図、第3図(a)は従来の
リードフレームを樹脂封止型半導体装置に使用した一例
を示す断面図、同図(b)は同図(a)におけるリード
フレームをフォーミングした一例を示す断面図である。 1,11…リードフレーム、2,7…銀ペースト、3,31…ボン
ディングワイヤ、4…内部リード、5,51…ダイパッド、
6,61…半導体チップ、8…ゴム板、9…可動部、10,20
…封止用樹脂、12…銀めっき、13…リード。FIG. 1 is a cross-sectional view when one embodiment of the present invention is used in a resin-sealed semiconductor device, FIG. 2 is an explanatory view showing a situation in which a conductive paste is applied to this embodiment, and FIG. 8B is a cross-sectional view showing an example in which a conventional lead frame is used in a resin-sealed semiconductor device, and FIG. 18B is a cross-sectional view showing an example of forming the lead frame in FIG. 1,11… lead frame, 2,7… silver paste, 3,31… bonding wire, 4… internal lead, 5,51… die pad,
6,61 ... Semiconductor chip, 8 ... Rubber plate, 9 ... Movable part, 10,20
… Encapsulating resin, 12… Silver plating, 13… Lead.
Claims (1)
プとボンディングワイヤによって接続する半導体装置用
のリードフレームにおいて、前記ボンディングワイヤと
接続する部分に塗布した導電性ペーストを備え、前記導
電性ペーストの塗布領域が樹脂封止領域の内部に設けら
れ、ワイヤーボンディングする以前に前記導電性ペース
トが熱硬化され、前記ボンディングワイヤと熱硬化され
た前記導電性ペーストを熱圧着することによりワイヤー
ボンディングを行なうように構成したことを特徴とする
リードフレーム。1. A lead frame for a semiconductor device, which is connected to a semiconductor chip in a resin-sealed semiconductor device by a bonding wire, is provided with a conductive paste applied to a portion connected to the bonding wire, and the conductive paste is applied. A region is provided inside the resin sealing region, the conductive paste is thermoset before wire bonding, and wire bonding is performed by thermocompression bonding the bonding wire and the thermoset conductive paste. A lead frame characterized by being configured.
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP61036997A JPH0758753B2 (en) | 1986-02-20 | 1986-02-20 | Lead frame |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP61036997A JPH0758753B2 (en) | 1986-02-20 | 1986-02-20 | Lead frame |
Publications (2)
Publication Number | Publication Date |
---|---|
JPS62194654A JPS62194654A (en) | 1987-08-27 |
JPH0758753B2 true JPH0758753B2 (en) | 1995-06-21 |
Family
ID=12485371
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP61036997A Expired - Lifetime JPH0758753B2 (en) | 1986-02-20 | 1986-02-20 | Lead frame |
Country Status (1)
Country | Link |
---|---|
JP (1) | JPH0758753B2 (en) |
Families Citing this family (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
KR0144164B1 (en) * | 1995-05-12 | 1998-07-01 | 문정환 | How to package ELC semiconductor package and semiconductor device |
Family Cites Families (5)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS49119144A (en) * | 1973-03-22 | 1974-11-14 | ||
JPS5373361A (en) * | 1976-12-10 | 1978-06-29 | Mitsubishi Electric Corp | Method of producing hyb ic |
JPS59114849A (en) * | 1982-12-22 | 1984-07-03 | Toshiba Corp | Manufacture of hybrid integrated circuit |
JPS59204265A (en) * | 1983-05-06 | 1984-11-19 | Nec Corp | Manufacture of hybrid integrated circuit |
JPS6025292A (en) * | 1983-07-21 | 1985-02-08 | ティーディーケイ株式会社 | Method of soldering electronic part |
-
1986
- 1986-02-20 JP JP61036997A patent/JPH0758753B2/en not_active Expired - Lifetime
Also Published As
Publication number | Publication date |
---|---|
JPS62194654A (en) | 1987-08-27 |
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