JPS63133537A - Mamufacture of semiconductor device - Google Patents
Mamufacture of semiconductor deviceInfo
- Publication number
- JPS63133537A JPS63133537A JP61281212A JP28121286A JPS63133537A JP S63133537 A JPS63133537 A JP S63133537A JP 61281212 A JP61281212 A JP 61281212A JP 28121286 A JP28121286 A JP 28121286A JP S63133537 A JPS63133537 A JP S63133537A
- Authority
- JP
- Japan
- Prior art keywords
- lead frame
- semiconductor chip
- copper
- molding resin
- lead
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
- 239000004065 semiconductor Substances 0.000 title claims abstract description 33
- 239000011347 resin Substances 0.000 claims abstract description 16
- 229920005989 resin Polymers 0.000 claims abstract description 16
- RYGMFSIKBFXOCR-UHFFFAOYSA-N Copper Chemical compound [Cu] RYGMFSIKBFXOCR-UHFFFAOYSA-N 0.000 claims abstract description 14
- 229910052802 copper Inorganic materials 0.000 claims abstract description 14
- 239000010949 copper Substances 0.000 claims abstract description 14
- 238000000034 method Methods 0.000 claims abstract description 14
- 238000004519 manufacturing process Methods 0.000 claims abstract description 8
- 230000001590 oxidative effect Effects 0.000 claims description 3
- 238000007789 sealing Methods 0.000 claims 1
- 238000000465 moulding Methods 0.000 abstract description 9
- 239000002184 metal Substances 0.000 abstract description 4
- 229910052751 metal Inorganic materials 0.000 abstract description 4
- QPLDLSVMHZLSFG-UHFFFAOYSA-N Copper oxide Chemical compound [Cu]=O QPLDLSVMHZLSFG-UHFFFAOYSA-N 0.000 abstract description 2
- 239000005751 Copper oxide Substances 0.000 abstract description 2
- 239000000853 adhesive Substances 0.000 abstract description 2
- 230000001070 adhesive effect Effects 0.000 abstract description 2
- 229910000431 copper oxide Inorganic materials 0.000 abstract description 2
- 238000005260 corrosion Methods 0.000 abstract description 2
- 230000007797 corrosion Effects 0.000 abstract description 2
- 230000003647 oxidation Effects 0.000 abstract 1
- 238000007254 oxidation reaction Methods 0.000 abstract 1
- 230000000694 effects Effects 0.000 description 1
- 238000005538 encapsulation Methods 0.000 description 1
- 238000005516 engineering process Methods 0.000 description 1
- 230000003628 erosive effect Effects 0.000 description 1
- WABPQHHGFIMREM-UHFFFAOYSA-N lead(0) Chemical compound [Pb] WABPQHHGFIMREM-UHFFFAOYSA-N 0.000 description 1
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L23/00—Details of semiconductor or other solid state devices
- H01L23/48—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor
- H01L23/488—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor consisting of soldered or bonded constructions
- H01L23/495—Lead-frames or other flat leads
- H01L23/49579—Lead-frames or other flat leads characterised by the materials of the lead frames or layers thereon
- H01L23/49582—Metallic layers on lead frames
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/02—Bonding areas; Manufacturing methods related thereto
- H01L2224/04—Structure, shape, material or disposition of the bonding areas prior to the connecting process
- H01L2224/05—Structure, shape, material or disposition of the bonding areas prior to the connecting process of an individual bonding area
- H01L2224/0554—External layer
- H01L2224/05599—Material
- H01L2224/056—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof
- H01L2224/05617—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof the principal constituent melting at a temperature of greater than or equal to 400°C and less than 950°C
- H01L2224/05624—Aluminium [Al] as principal constituent
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
- H01L2224/4805—Shape
- H01L2224/4809—Loop shape
- H01L2224/48091—Arched
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
- H01L2224/481—Disposition
- H01L2224/48151—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
- H01L2224/48221—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
- H01L2224/48245—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic
- H01L2224/48247—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic connecting the wire to a bond pad of the item
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
- H01L2224/484—Connecting portions
- H01L2224/48463—Connecting portions the connecting portion on the bonding area of the semiconductor or solid-state body being a ball bond
- H01L2224/48465—Connecting portions the connecting portion on the bonding area of the semiconductor or solid-state body being a ball bond the other connecting portion not on the bonding area being a wedge bond, i.e. ball-to-wedge, regular stitch
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/01—Chemical elements
- H01L2924/01013—Aluminum [Al]
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/01—Chemical elements
- H01L2924/01029—Copper [Cu]
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/01—Chemical elements
- H01L2924/01082—Lead [Pb]
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/013—Alloys
- H01L2924/014—Solder alloys
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/15—Details of package parts other than the semiconductor or other solid state devices to be connected
- H01L2924/181—Encapsulation
Abstract
Description
【発明の詳細な説明】
〔産業上の利用分野〕
本発明は、銅系フレームを使用した半導体装置の製造方
法に関するものである。DETAILED DESCRIPTION OF THE INVENTION [Field of Industrial Application] The present invention relates to a method of manufacturing a semiconductor device using a copper frame.
第２図は従来の半導体装置の断面図である。図においで
（１）はモールド樹脂、（２）は酸化されていない銅系
リードフレーム、（３）はリード線、（４）は表面にＡ
／＠極を有した半導体チップである。FIG. 2 is a sectional view of a conventional semiconductor device. In the figure, (1) is the mold resin, (2) is the unoxidized copper lead frame, (3) is the lead wire, and (4) is the A on the surface.
It is a semiconductor chip with a /@ pole.
上記のように構成された半導体装置の製造方法は以下の
通りである。A method for manufacturing the semiconductor device configured as described above is as follows.
まず、半導体チップ（４）を製造後、この半導体チップ
（４）を、酸化されていない銅系のリードフレーム（２
）のリード（２ｂ）部分を電気的に接続するためのワイ
ヤボーディングを行う。そして、最後に金属細線（３）
、リードフレーム（２）のグイバット（２ａ） 、リー
ド（２ｂ）の一部、及び半導体テップ（４）をモールド
樹脂（１）で封止し、第２図に示すような半導体装置を
得る。 ・
〔発明が解決しようとする問題点〕
従来の半導体装置の製造方法は以上のように、銅系リー
ドフレーム（２）には何の処理を施すことなく、そのま
ま樹脂封止しているので、銅系フレーム（２）とモール
ド樹脂（１）との密着性が悪く、その界画より水分の侵
食を受けるから半導体チップ（４ンのＡ／ｗｔ極が腐蝕
する等の問題点が有った。First, after manufacturing a semiconductor chip (4), this semiconductor chip (4) is attached to an unoxidized copper lead frame (2).
Wire boarding is performed to electrically connect the lead (2b) portion of ). And finally, thin metal wire (3)
The lead frame (2), part of the lead (2b), and the semiconductor tip (4) are sealed with the molding resin (1) to obtain a semiconductor device as shown in FIG. - [Problems to be solved by the invention] As described above, in the conventional manufacturing method of semiconductor devices, the copper-based lead frame (2) is sealed with resin as it is without any treatment. The adhesion between the copper frame (2) and the molding resin (1) was poor, and the area was subject to moisture erosion, causing problems such as corrosion of the A/wt electrode of the semiconductor chip (4). .
この発明は上記のような問題点を解決するためになされ
たもので、銅系リードフレームとモールド樹脂との密着
性を大巾に向上させ、耐湿性に優れた半導体装置を得る
ことを目的とする。This invention was made to solve the above-mentioned problems, and its purpose is to greatly improve the adhesion between the copper lead frame and the molding resin, and to obtain a semiconductor device with excellent moisture resistance. do.
以下、この発明の一実施例を図について説明する。第１
図において、（１）乃至（４）は従来と同一のものであ
り、（５）は表面が酸化されたリードフレームである。An embodiment of the present invention will be described below with reference to the drawings. 1st
In the figure, (1) to (4) are the same as the conventional lead frame, and (5) is a lead frame whose surface is oxidized.
次に上記のように構成された半導体装置の製造方法を説
明する。Next, a method for manufacturing the semiconductor device configured as described above will be explained.
まず、半導体チップ（４）を製造後、この半導体チップ
（４）を、酸化されていない銅系のり−ドフレー（２）
のリード（２ｂ）部分を電気的に接続するためのワイヤ
ボンディングを行う。〔第１図（ａ）〕その後、第１図
（ｂ）に示すように大気中でリードフレーム（２）を加
熱し、表面が酸化されたリードフレーム（５）を得る。First, after manufacturing a semiconductor chip (4), this semiconductor chip (4) is coated with an unoxidized copper adhesive (2).
Wire bonding is performed to electrically connect the lead (2b) portion of the lead (2b). [FIG. 1(a)] Thereafter, as shown in FIG. 1(b), the lead frame (2) is heated in the atmosphere to obtain a lead frame (5) whose surface is oxidized.
そして、最後に第１図（Ｃ）に示すように金属指（１）
で封止し、第１図（ｃ）に示すような半導体装置を得る
。Finally, as shown in Figure 1 (C), the metal finger (1)
to obtain a semiconductor device as shown in FIG. 1(c).
このようにして得られた半導体装置においては銅系のリ
ードフレームを酸化して形成されたリードフレーム表面
の銅酸化物がモールド樹脂中に含まれるレジンとの密着
性に優れているからモールド樹脂とリードフレームとの
密着性が高まりリードフレーム（５）と樹脂（１）との
界面より水分が侵入することを防止する。従って半導体
チップ（４）表面のＡｌ電極が腐食されることはない。In the semiconductor device obtained in this way, the copper oxide on the surface of the lead frame, which is formed by oxidizing the copper lead frame, has excellent adhesion to the resin contained in the mold resin. Adhesion with the lead frame is increased and moisture is prevented from entering through the interface between the lead frame (5) and the resin (1). Therefore, the Al electrode on the surface of the semiconductor chip (4) will not be corroded.
以下のように、この発明によれば、ワイヤボンディング
後銅系のリードフレームを酸化させ、しかる後に樹脂封
止を行うよう（こしたので、封止樹脂とリードフレーム
の密着性が向上するとともにリードフレームと半導体チ
ップとの付着及びワイヤボンディングの工程を何ら支障
なく行えるという効果がある。As described below, according to the present invention, the copper-based lead frame is oxidized after wire bonding, and then resin encapsulation is performed. This has the advantage that the process of attaching the frame and the semiconductor chip and the wire bonding process can be carried out without any problem.
第１図はこの発明の一実施例による半導体装置を示す断
面図、第２図は従来の半導体装置を示す断面図である。
図において、（１）はモールド樹脂、（３）は金属細線
、（４）は半導体チップ、（５）はワイヤボンディング
後に酸化させた銅系フレームである。
なお、各図中同一符号は同一、又は相当部分を示す。FIG. 1 is a sectional view showing a semiconductor device according to an embodiment of the present invention, and FIG. 2 is a sectional view showing a conventional semiconductor device. In the figure, (1) is a molding resin, (3) is a thin metal wire, (4) is a semiconductor chip, and (5) is a copper-based frame that is oxidized after wire bonding. Note that the same reference numerals in each figure indicate the same or equivalent parts.
Claims (2)
工程、この半導体チップと上記リードフレームとをワイ
ヤボンディングする工程、このワイヤボンディング後上
記リードフレームを酸化する工程、この酸化されたリー
ドフレームの一部及び上記半導体チップをモールド樹脂
で封止する工程を備えたことを特徴とする半導体装置の
製造方法。(1) A process of fixing a semiconductor chip to a copper-based lead frame, a process of wire bonding this semiconductor chip and the above lead frame, a process of oxidizing the above lead frame after this wire bonding, a process of oxidizing the above lead frame, and a process of bonding the semiconductor chip to the above lead frame. 1. A method for manufacturing a semiconductor device, comprising the step of sealing a part and the semiconductor chip with a mold resin.
を特徴とする特許請求の範囲第１項記載の半導体装置。(2) The semiconductor device according to claim 1, wherein the semiconductor chip has an Al electrode on its surface.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP61281212A JPS63133537A (en) | 1986-11-25 | 1986-11-25 | Mamufacture of semiconductor device |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP61281212A JPS63133537A (en) | 1986-11-25 | 1986-11-25 | Mamufacture of semiconductor device |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| JPS63133537A true JPS63133537A (en) | 1988-06-06 |
Family
ID=17635918
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP61281212A Pending JPS63133537A (en) | 1986-11-25 | 1986-11-25 | Mamufacture of semiconductor device |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPS63133537A (en) |
Cited By (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| EP0414852A1 (en) * | 1989-03-14 | 1991-03-06 | Motorola, Inc. | Method for improving the adhesion of a plastic encapsulant to copper containing leadframes |
| EP2257140A1 (en) * | 2009-04-20 | 2010-12-01 | Moser Baer India Limited | Enhancing adhesion of molding materials with substates |
-
1986
- 1986-11-25 JP JP61281212A patent/JPS63133537A/en active Pending
Cited By (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| EP0414852A1 (en) * | 1989-03-14 | 1991-03-06 | Motorola, Inc. | Method for improving the adhesion of a plastic encapsulant to copper containing leadframes |
| EP0414852A4 (en) * | 1989-03-14 | 1993-01-20 | Motorola, Inc. | Method for improving the adhesion of a plastic encapsulant to copper containing leadframes |
| EP2257140A1 (en) * | 2009-04-20 | 2010-12-01 | Moser Baer India Limited | Enhancing adhesion of molding materials with substates |
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