JPH0755014Y2 - 実装構造 - Google Patents

実装構造

Info

Publication number
JPH0755014Y2
JPH0755014Y2 JP1990067245U JP6724590U JPH0755014Y2 JP H0755014 Y2 JPH0755014 Y2 JP H0755014Y2 JP 1990067245 U JP1990067245 U JP 1990067245U JP 6724590 U JP6724590 U JP 6724590U JP H0755014 Y2 JPH0755014 Y2 JP H0755014Y2
Authority
JP
Japan
Prior art keywords
board
sub
liquid crystal
film carrier
mounting structure
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Lifetime
Application number
JP1990067245U
Other languages
English (en)
Japanese (ja)
Other versions
JPH0426565U (en:Method
Inventor
満 村
栄一 原田
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Toshiba Corp
Original Assignee
Toshiba Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Toshiba Corp filed Critical Toshiba Corp
Priority to JP1990067245U priority Critical patent/JPH0755014Y2/ja
Publication of JPH0426565U publication Critical patent/JPH0426565U/ja
Application granted granted Critical
Publication of JPH0755014Y2 publication Critical patent/JPH0755014Y2/ja
Anticipated expiration legal-status Critical
Expired - Lifetime legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/50—Tape automated bonding [TAB] connectors, i.e. film carriers; Manufacturing methods related thereto

Landscapes

  • Structures For Mounting Electric Components On Printed Circuit Boards (AREA)
  • Combinations Of Printed Boards (AREA)
  • Wire Bonding (AREA)
JP1990067245U 1990-06-27 1990-06-27 実装構造 Expired - Lifetime JPH0755014Y2 (ja)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP1990067245U JPH0755014Y2 (ja) 1990-06-27 1990-06-27 実装構造

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP1990067245U JPH0755014Y2 (ja) 1990-06-27 1990-06-27 実装構造

Publications (2)

Publication Number Publication Date
JPH0426565U JPH0426565U (en:Method) 1992-03-03
JPH0755014Y2 true JPH0755014Y2 (ja) 1995-12-18

Family

ID=31600654

Family Applications (1)

Application Number Title Priority Date Filing Date
JP1990067245U Expired - Lifetime JPH0755014Y2 (ja) 1990-06-27 1990-06-27 実装構造

Country Status (1)

Country Link
JP (1) JPH0755014Y2 (en:Method)

Families Citing this family (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP5605758B2 (ja) * 2010-11-15 2014-10-15 富士ゼロックス株式会社 基板の取付方法

Also Published As

Publication number Publication date
JPH0426565U (en:Method) 1992-03-03

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