JPH0740605B2 - Method for manufacturing semiconductor device - Google Patents

Method for manufacturing semiconductor device

Info

Publication number
JPH0740605B2
JPH0740605B2 JP60283333A JP28333385A JPH0740605B2 JP H0740605 B2 JPH0740605 B2 JP H0740605B2 JP 60283333 A JP60283333 A JP 60283333A JP 28333385 A JP28333385 A JP 28333385A JP H0740605 B2 JPH0740605 B2 JP H0740605B2
Authority
JP
Japan
Prior art keywords
gaas
semiconductor device
ammonia plasma
plasma treatment
insulating film
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Lifetime
Application number
JP60283333A
Other languages
Japanese (ja)
Other versions
JPS62141741A (en
Inventor
敏治 反保
毅 小沼
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Panasonic Holdings Corp
Original Assignee
Matsushita Electric Industrial Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Matsushita Electric Industrial Co Ltd filed Critical Matsushita Electric Industrial Co Ltd
Priority to JP60283333A priority Critical patent/JPH0740605B2/en
Publication of JPS62141741A publication Critical patent/JPS62141741A/en
Publication of JPH0740605B2 publication Critical patent/JPH0740605B2/en
Anticipated expiration legal-status Critical
Expired - Lifetime legal-status Critical Current

Links

Description

【発明の詳細な説明】 産業上の利用分野 本発明は、GaAs化合物半導体表面に絶縁膜を形成する工
程を含む半導体装置の製造方法に関するものである。
BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a method for manufacturing a semiconductor device including a step of forming an insulating film on the surface of a GaAs compound semiconductor.

従来の技術 従来,GaAs基板上を直接処理することにより絶縁膜を形
成する方法は、ガス雰囲気中,高温で熱処理する方法が
主である。
2. Description of the Related Art Conventionally, as a method for forming an insulating film by directly processing a GaAs substrate, a heat treatment at a high temperature in a gas atmosphere has been a main method.

発明が解決しようとする問題点 従来の方法では、GaAs基板を600℃以上の高温で熱処理
するためAsが蒸発し、表面準位が増加するため、基板の
リーク電流増加の原因となり半導体装置の絶縁膜の形成
方法としては不適当である。
Problems to be Solved by the Invention In the conventional method, since the GaAs substrate is heat-treated at a high temperature of 600 ° C. or higher, As evaporates and the surface level increases, which causes an increase in the leakage current of the substrate. It is unsuitable as a film forming method.

問題点を解決するための手段 本発明はかかる問題の解決を目的とし、GaAs基板表面を
洗浄した後、アンモニアプラズマ中で望ましくは500℃
以下の低温で処理することにより、GaAs基板を直接窒化
し、絶縁膜を形成するものである。
Means for Solving the Problems The present invention aims to solve the above problems, and after cleaning the surface of a GaAs substrate, the temperature is preferably 500 ° C. in ammonia plasma.
By treating at the following low temperature, the GaAs substrate is directly nitrided to form an insulating film.

作用 本発明の半導体装置の製造方法により、GaAs表面からの
Asの蒸発を抑制し、GaAs表面と絶縁膜の間の表面空乏層
を減少し、半導体装置の製造プロセスでの歩留りが向上
できる。
By the method of manufacturing a semiconductor device of the present invention,
The evaporation of As can be suppressed, the surface depletion layer between the GaAs surface and the insulating film can be reduced, and the yield in the semiconductor device manufacturing process can be improved.

実施例 以下、本発明の半導体装置の製造方法の実施例を説明す
る。第1図に、アンモニアプラズマ処理によるGaAs表面
の絶縁膜のXPS分析の結果を示す。アンモニアプラズマ
の条件はアンモニア流量15cc/min,反応室圧力0.3torr,R
F周波数13.56MHz,パワー100Wの条件である。
Example An example of the method for manufacturing a semiconductor device of the present invention will be described below. Fig. 1 shows the result of XPS analysis of the insulating film on the GaAs surface by the ammonia plasma treatment. Ammonia plasma conditions are: ammonia flow rate 15cc / min, reaction chamber pressure 0.3torr, R
F frequency is 13.56MHz and power is 100W.

第1図において、アンモニアプラズマ処理した基板(第
1図中a線と未処理の基板(第1図中b線)とを比較す
ると未処理の場合には自然酸化膜であるAs2O3膜が主で
あるのに対し、アンモニアプラズマ処理を行なうとGaN
のピークが現われ、GaAs表面が窒化され化学的に安定な
膜であるGaNが形成されている。
In FIG. 1, the ammonia plasma-treated substrate (line a in FIG. 1 and untreated substrate (line b in FIG. 1) are compared. As a result, an As 2 O 3 film which is a natural oxide film when untreated is compared. However, when ammonia plasma treatment is performed, GaN
Appears, and the GaAs surface is nitrided to form GaN which is a chemically stable film.

第2図は、GaAs基板温度を変化した場合のアンモニアプ
ラズマ処理によるGaAs表面上の絶縁膜のGa,As,O,Nの濃
度の変化を示したグラフである。
FIG. 2 is a graph showing changes in the concentrations of Ga, As, O, and N in the insulating film on the GaAs surface by the ammonia plasma treatment when the GaAs substrate temperature is changed.

第3図は、GaAs基板のアンモニアプラズマ処理による反
応時間を変化した場合のGaAs表面上の絶縁膜Ga,As,O,N
の濃度の変化を示したグラフである。
Figure 3 shows the insulating films Ga, As, O, N on the GaAs surface when the reaction time of ammonia plasma treatment on the GaAs substrate was changed.
5 is a graph showing the change in the concentration of.

第2図において、基板温度が500℃以下でGaAs基板表面
にGaNの窒化膜が形成されている。
In FIG. 2, a GaN nitride film is formed on the GaAs substrate surface at a substrate temperature of 500 ° C. or lower.

また、GaAs基板温度が300℃附近でAs濃度とN濃が飽和
していることから、250℃以下でアンモニアプラズマ処
理することによりGaAsとGaNの共存したAs蒸発を抑制し
た安定な絶縁膜が得られ、その後250℃以上で連続的に
アンモニアプラズマ処理を行なうことによりGaAs/GaAs
−GaNGaNのAs蒸発を抑制し、化学的に安定な窒化膜であ
るGaAs/絶縁膜が得られる。
In addition, since the As concentration and N concentration are saturated when the GaAs substrate temperature is around 300 ° C, a stable insulating film that suppresses As vaporization in which GaAs and GaN coexist is obtained by ammonia plasma treatment at 250 ° C or less. GaAs / GaAs by continuous ammonia plasma treatment at 250 ° C or higher.
-GaN As vaporization of GaN is suppressed and a chemically stable nitride film, GaAs / insulating film, is obtained.

第3図において、アンモニアプラズマ処理の反応時間が
3時間以上でAsとNの濃度が飽和している。
In FIG. 3, the concentrations of As and N are saturated when the reaction time of the ammonia plasma treatment is 3 hours or more.

また反応時間が1hr以下の短時間でGaAs基板表面に窒化
物が形成されている。このことにより、短時間でGaAs基
板表面に化学的に安定な窒化膜を形成できることがわか
る。
In addition, nitride is formed on the surface of the GaAs substrate in a short reaction time of 1 hour or less. This shows that a chemically stable nitride film can be formed on the GaAs substrate surface in a short time.

第2図,第3図より、GaAs基板表面を1000Åの絶縁膜を
形成する場合,As蒸発抑制のため250℃との基板温度で短
時間アンモニアプラズマ処理を行なうことにより、GaAs
表面に化学的に安定な絶縁膜を形成できる。
From Fig. 2 and Fig. 3, when forming an insulating film of 1000 Å on the surface of GaAs substrate, GaAs was treated by ammonia plasma treatment for a short time at a substrate temperature of 250 ° C to suppress As evaporation.
A chemically stable insulating film can be formed on the surface.

第4図はアンモニアプラズマ処理によるGaAs窒化物とGa
As基板表面の表面準位密度をターマン法により測定する
ため試料作製プロセスである。
Figure 4 shows GaAs nitride and Ga by ammonia plasma treatment.
This is a sample preparation process for measuring the surface level density of the As substrate surface by the Turman method.

第4図(a)において、n型(n2×1017cm-3)GaAs
基板1にプラズマCVDシリコン窒化膜2を3000Å堆積
し、選択エッチングにより窓3を開口する。第4図
(b)において平行平板型のプラズマCVD装置内に設置
し基板温度250℃,RFパワー100W,NH3流量15cc/minで3時
間アンモニアプラズマ処理し、開口部3のGaAs表面上に
GaAs窒化物4を生成する。その後プラズマCVDシリコン
窒化膜2をエッチング除去する。第4図(c)におい
て、レジスト5によるホトエッチング技術によりオーミ
ック電極用窓6を形成しオーミック電極7のAuGe/Ni/Au
(1500/500/1500Å)をリフトオフ法により形成する。
第4図(d)において、レジスト8によるホトエッチン
グ技術によりゲート電極用窓9を形成しゲート電極10の
Ti/Au(1000/1500Å)をリフトオフ法により形成する。
第4図eにおいて、ターマン法の試料が完成する。
In FIG. 4 (a), n-type (n2 × 10 17 cm −3 ) GaAs
A plasma CVD silicon nitride film 2 is deposited on the substrate 1 for 3000 liters, and a window 3 is opened by selective etching. As shown in FIG. 4 (b), it was installed in a parallel plate type plasma CVD apparatus, and was subjected to ammonia plasma treatment for 3 hours at a substrate temperature of 250 ° C., RF power of 100 W, and NH 3 flow rate of 15 cc / min, and the GaAs surface of the opening 3
GaAs nitride 4 is produced. After that, the plasma CVD silicon nitride film 2 is removed by etching. In FIG. 4C, the AuGe / Ni / Au of the ohmic electrode 7 is formed by forming the ohmic electrode window 6 by the photo-etching technique using the resist 5.
(1500/500 / 1500Å) is formed by lift-off method.
In FIG. 4D, the gate electrode window 9 is formed by the photo-etching technique using the resist 8 and the gate electrode 10 is formed.
Ti / Au (1000 / 1500Å) is formed by lift-off method.
In FIG. 4e, the Turman method sample is completed.

第4図(e)においてオーミック電極7とゲート電極10
にバイアスをかけターマン法によりGaAs1/GaAs窒化物4
間の表面準位密度を測定すると8×1010cm-2で、従来の
方法では1.5×1012cm-2と1ケタ程度低く、表面準位に
よるリーク電流などの低減が改善される。
In FIG. 4 (e), the ohmic electrode 7 and the gate electrode 10
Biased to GaAs1 / GaAs nitride 4 by the Turman method
The surface state density between at to the 8 × 10 10 cm -2 measurement, in the conventional manner with 1.5 × 10 12 cm -2 1 digit order of low, reducing such leakage current due to surface states is improved.

発明の効果 本発明の半導体装置の製造方法により、GaAs表面からの
Asの蒸発を抑制し、GaAs表面と絶縁膜の表面空乏層を減
少し、半導体装置の製造プロセスでの歩留りが向上でき
た。
According to the method of manufacturing the semiconductor device of the present invention,
The evaporation of As was suppressed, the surface depletion layer of the GaAs surface and the insulating film was reduced, and the yield in the semiconductor device manufacturing process was improved.

【図面の簡単な説明】[Brief description of drawings]

第1図はアンモニアプラズマ処理によるGaAs表面上の絶
縁膜のXPS分析の結果を示す特性図、第2図はGaAs基板
温度を変化した場合のアンモニアプラズマ処理によるGa
As表面上の絶縁膜のGa,As,O,Nの濃度の変化を示す特性
図、第3図はGaAs基板のアンモニアプラズマ処理による
反応時間を変化した場合のGaAs表面上の絶縁膜のGa,As,
O,Nの濃度の変化を示す特性図、第4図は本発明のアン
モニアプラズマ処理によるGaAs窒化物とGaAs基板表面の
表面準位密度をターマン法により測定するための試料作
製プロセスを示す工程図である。 1′……アンモニアプラズマ処理した場合のXPS線、
2′……未処理の場合のXPS線、1……n型GaAs基板、
2……プラズマCVDシリコン窒化膜、3……開口部、4
……GaAs窒化物、5,8……レジスト、6,9……電極用窓、
7……オーミック電極、10……ゲート電極。
Fig. 1 is a characteristic diagram showing the result of XPS analysis of the insulating film on the GaAs surface by the ammonia plasma treatment, and Fig. 2 is the Ga by the ammonia plasma treatment when the GaAs substrate temperature is changed.
Fig. 3 is a characteristic diagram showing changes in the concentrations of Ga, As, O, and N in the insulating film on the As surface. Fig. 3 shows Ga of the insulating film on the GaAs surface when the reaction time due to ammonia plasma treatment of the GaAs substrate was changed. As,
FIG. 4 is a characteristic diagram showing changes in O and N concentrations, and FIG. 4 is a process diagram showing a sample preparation process for measuring the surface state densities of GaAs nitride and GaAs substrate surfaces by the ammonia plasma treatment of the present invention by the Tarman method. Is. 1 '... XPS line when treated with ammonia plasma,
2 '... XPS line when untreated, 1 ... n-type GaAs substrate,
2 ... Plasma CVD silicon nitride film, 3 ... Opening, 4
...... GaAs nitride, 5,8 ...... resist, 6,9 ...... electrode window,
7 ... Ohmic electrode, 10 ... Gate electrode.

Claims (4)

【特許請求の範囲】[Claims] 【請求項1】GaAs基板の一表面に絶縁膜を形成するに際
し、前記GaAs基板の一表面をアンモニアプラズマ中の処
理のみで前記GaAs基板の一表面を直接窒化することによ
り絶縁膜を形成するようにした半導体装置の製造方法。
1. When forming an insulating film on one surface of a GaAs substrate, the insulating film is formed by directly nitriding one surface of the GaAs substrate only by treatment in ammonia plasma. Of manufacturing a semiconductor device according to claim 1.
【請求項2】アンモニアプラズマ処理において、GaAs基
板温度を500℃以下とする特許請求の範囲第1項記載の
半導体装置の製造方法。
2. The method of manufacturing a semiconductor device according to claim 1, wherein the GaAs substrate temperature is 500 ° C. or lower in the ammonia plasma treatment.
【請求項3】アンモニアプラズマ処理において、GaAs基
板温度を低温から高温へ連続的に変化させプラズマ処理
を行なう特許請求の範囲第1項または第2項記載の半導
体装置の製造方法。
3. The method of manufacturing a semiconductor device according to claim 1, wherein in the ammonia plasma treatment, the GaAs substrate temperature is continuously changed from a low temperature to a high temperature to perform the plasma treatment.
【請求項4】アンモニアプラズマ処理によりGaAs基板上
に形成する絶縁膜の膜厚が1000Å以下の時、GaAs基板温
度を250℃以下とする特許請求の範囲第1項記載の半導
体装置の製造方法。
4. The method of manufacturing a semiconductor device according to claim 1, wherein the temperature of the GaAs substrate is 250 ° C. or less when the thickness of the insulating film formed on the GaAs substrate by the ammonia plasma treatment is 1000 Å or less.
JP60283333A 1985-12-16 1985-12-16 Method for manufacturing semiconductor device Expired - Lifetime JPH0740605B2 (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP60283333A JPH0740605B2 (en) 1985-12-16 1985-12-16 Method for manufacturing semiconductor device

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP60283333A JPH0740605B2 (en) 1985-12-16 1985-12-16 Method for manufacturing semiconductor device

Publications (2)

Publication Number Publication Date
JPS62141741A JPS62141741A (en) 1987-06-25
JPH0740605B2 true JPH0740605B2 (en) 1995-05-01

Family

ID=17664113

Family Applications (1)

Application Number Title Priority Date Filing Date
JP60283333A Expired - Lifetime JPH0740605B2 (en) 1985-12-16 1985-12-16 Method for manufacturing semiconductor device

Country Status (1)

Country Link
JP (1) JPH0740605B2 (en)

Families Citing this family (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US6281691B1 (en) 1998-06-09 2001-08-28 Nec Corporation Tip portion structure of high-frequency probe and method for fabrication probe tip portion composed by coaxial cable

Family Cites Families (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5428072B2 (en) * 1972-07-20 1979-09-13
JPS5161265A (en) * 1974-11-25 1976-05-27 Handotai Kenkyu Shinkokai 335 zokukagobutsuhandotaisoshi

Also Published As

Publication number Publication date
JPS62141741A (en) 1987-06-25

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