JP2563455B2 - Method for manufacturing semiconductor device - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION INDUSTRIAL APPLICABILITY The present invention relates to a GaAs IC used for UHFTV, satellite communication and the like.
And a method for manufacturing a semiconductor device such as a GaAs logic IC.

2. Description of the Related Art In recent years, GaAs ICs have come to be used in a wide range of applications such as satellite communication and high-speed logic by taking advantage of their excellent high frequency characteristics and high speed.

Fig. 4 shows the outline of the manufacturing process of the field effect transistor (FET) which is the basic component of GaAs IC. First, the photoresist 1 is selectively formed on the surface of the semi-insulating GaAs substrate 3, and Si ions are implanted into the entire surface to form two n ⁺ regions 2 in a portion not covered with the photoresist 1 (fourth). Figure (a)). Next, a photoresist is formed again except on the two n ⁺ regions 2 and a portion between them, and Si ions are implanted to form an n layer 4 serving as an active layer (see FIG. 4 (b). )). Next, heat treatment (annealing) is performed to activate these ion-implanted regions 2 and 4. Next, an ohmic electrode 5 serving as a source electrode and a drain electrode is formed on the n ⁺ region 2 (FIG. 4 (c)),
Further, a Schottky electrode (gate electrode) 6 is formed on the n layer 4.
Are formed (FIG. 4 (d)).

As a method of activating heat treatment for the ion-implanted layer, a method of performing heat treatment by sandwiching the implanted substrate with a dummy substrate (called capless annealing) has been widely used until now. There was a problem of poor uniformity within. Therefore, as an alternative annealing method, a method of covering the implantation substrate with a protective film and then performing heat treatment (called cap annealing) has been attempted.

A silicon nitride film is promising as a protective film for this annealing because it can be densely deposited.

Problems to be Solved by the Invention A silicon nitride film is usually formed by a plasma CVD method while keeping the substrate temperature at about 300 ° C. Substrate temperature about 3
The reason why the temperature is kept at a high temperature of 00 ° C. is to improve the denseness of the silicon nitride film. However, in the plasma silicon nitride film thus produced, when the film thickness exceeds a certain value, internal stress increases due to heat during annealing and film damage occurs due to thermal contraction of the film. On the other hand, if the film thickness is thin enough not to cause film damage, it is not possible to prevent As from coming off from the GaAs substrate surface during annealing, and as a result, the activation rate of implanted ions is extremely reduced. Was. As described above, the cap annealing using the plasma silicon nitride film has hitherto been unsatisfactory.

In view of the above drawbacks, the present invention is directed to GaAs during annealing.
Provided is a method for manufacturing a semiconductor device, which can perform annealing without causing As removal from the substrate and without causing damage to the silicon nitride film.

Means for Solving the Problems In order to solve the above problems, the semiconductor device manufacturing method of the present invention is a substrate in which impurity ions are implanted, 100 ° C. or higher, 200
A silicon nitride film is deposited on the surface of the substrate by plasma CVD to a thickness of 1200 Å to 2200 Å while maintaining the temperature at ℃ or less, and then heat treatment for activation of ion-implanted impurities is performed.

Action With this configuration, the internal stress of the film is relaxed, and even if the silicon nitride film is deposited thick enough to prevent As removal, it is possible to prevent the occurrence of film damage due to annealing. Cap annealing with good reproducibility is possible.

Practical example The detailed deposition conditions are listed below.

Gas used and flow rate: 5% SiH ₄ / N ₂ 500SCCM (50 per minute
0cc) (SCCM: standard cubic centimeter per minute)
NH ₃ 5 SCCM during deposition gas pressure: 0.5 Torr during deposition substrate temperature: was changed in a range of 100 ° C. to 310 ° C..

Power density: 0.104 W / cm ² (13.56 MHz) Electrode spacing: 30 mm The following is the data when the silicon nitride film was deposited on the GaAs substrate under the above conditions. Figure 1 shows the relationship between the internal stress at room temperature of a silicon nitride film deposited to a thickness of 5000Å and the substrate temperature during deposition.
It was found that the internal stress of the film at 0 ° C. was a very small value of 1 × 10 ⁹ dyn / cm ² or less. 800 ℃ in nitrogen atmosphere,
The film deposited at a substrate temperature of 200 ° C after heat treatment for 40 minutes has film damage after annealing when the film thickness exceeds 2200Å, and the film deposited at 250 ° C has film damage after annealing at a film thickness of 1500Å. It was It was also found that if the film thickness is 1200 Å or more, As can be prevented from coming off the GaAs substrate surface. In this way, when the film is deposited under the low temperature condition of 200 ° C. or less, the film damage does not occur if the film thickness is 2200 Å or less because the ratio of Si—H bond in the film can be increased. As a result, the internal stress of the film is ± 0.5 × 10 ¹⁰ d as shown in Fig. 1.
Because it can be suppressed to a low value of yn / cm ² or less. When the substrate temperature was 100 ° C or lower, the silicon nitride film was not uniformly deposited.

FIG. 2 is a diagram showing the relationship between the film thickness d and the average activation rate within the substrate surface when cap annealing is performed using a film deposited at a substrate temperature of 150 ° C., and FIG. It is a figure which shows the relationship between the standard deviation (sigma) in the board | substrate surface of the activation rate, and film thickness. As shown in Fig. 2, in the film thickness range of 1200Å to 2500Å, the average in-plane activation rate is 45% to 60%.
It is a degree. Further, as shown in FIG. 3, the standard deviation σ of the activation rate within the above film thickness range is 3 of the average value of the activation rate.
It is a small value around%.

The above results are mainly due to the substrate temperature during film deposition, and other deposition conditions are not limited to the above values.

As described above, the manufacturing method of the semiconductor device of the present invention is 200
After the silicon nitride film is deposited by the plasma CVD method at the substrate temperature of ℃ or less, by performing the activation heat treatment,
The activation of the ion-implanted impurities can be performed with good uniformity and reproducibility, and its practical effect is great.

[Brief description of drawings]

FIG. 1 is a diagram showing the relationship between the internal stress of a silicon nitride film produced in an embodiment of the method for manufacturing a semiconductor device of the present invention and the substrate temperature, and FIG. 2 is a diagram of the silicon nitride film in an embodiment of the present invention. The figure which shows the relationship between film thickness and the average activation rate in a board surface, FIG. 3 is a figure which shows the standard deviation of the activation rate in a board surface, and FIG. 4 is the conventional manufacturing process of a field effect transistor. It is a figure which shows the outline of. 1 ... Photoresist, 2 ... n ⁺ region, 3 ... Semi-insulating property
GaAs substrate, 4 ... N layer, 5 ... Ohmic electrode (source electrode, drain electrode), 6 ... Schottky electrode (gate electrode).

Claims (1)

(57) [Claims] 1. A substrate in which impurity ions are implanted is maintained at a temperature of 100 ° C. or higher and 200 ° C. or lower, a silicon nitride film is deposited on the surface of the substrate by plasma CVD to a thickness of 1200Å to 2200Å, and then ion implantation is performed. A method for manufacturing a semiconductor device, which comprises performing heat treatment for activation of impurities.