JPH0727667Y2 - 混成集積回路 - Google Patents

混成集積回路

Info

Publication number
JPH0727667Y2
JPH0727667Y2 JP14669188U JP14669188U JPH0727667Y2 JP H0727667 Y2 JPH0727667 Y2 JP H0727667Y2 JP 14669188 U JP14669188 U JP 14669188U JP 14669188 U JP14669188 U JP 14669188U JP H0727667 Y2 JPH0727667 Y2 JP H0727667Y2
Authority
JP
Japan
Prior art keywords
case
external lead
circuit board
hybrid integrated
lead
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Fee Related
Application number
JP14669188U
Other languages
English (en)
Japanese (ja)
Other versions
JPH0267682U (enExample
Inventor
徳保 寺沢
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Fuji Electric Co Ltd
Original Assignee
Fuji Electric Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Fuji Electric Co Ltd filed Critical Fuji Electric Co Ltd
Priority to JP14669188U priority Critical patent/JPH0727667Y2/ja
Publication of JPH0267682U publication Critical patent/JPH0267682U/ja
Application granted granted Critical
Publication of JPH0727667Y2 publication Critical patent/JPH0727667Y2/ja
Anticipated expiration legal-status Critical
Expired - Fee Related legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W90/00—Package configurations
    • H10W90/701—Package configurations characterised by the relative positions of pads or connectors relative to package parts
    • H10W90/751—Package configurations characterised by the relative positions of pads or connectors relative to package parts of bond wires
    • H10W90/754—Package configurations characterised by the relative positions of pads or connectors relative to package parts of bond wires between a chip and a stacked insulating package substrate, interposer or RDL

Landscapes

  • Casings For Electric Apparatus (AREA)
  • Mounting Of Printed Circuit Boards And The Like (AREA)
JP14669188U 1988-11-10 1988-11-10 混成集積回路 Expired - Fee Related JPH0727667Y2 (ja)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP14669188U JPH0727667Y2 (ja) 1988-11-10 1988-11-10 混成集積回路

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP14669188U JPH0727667Y2 (ja) 1988-11-10 1988-11-10 混成集積回路

Publications (2)

Publication Number Publication Date
JPH0267682U JPH0267682U (enExample) 1990-05-22
JPH0727667Y2 true JPH0727667Y2 (ja) 1995-06-21

Family

ID=31416418

Family Applications (1)

Application Number Title Priority Date Filing Date
JP14669188U Expired - Fee Related JPH0727667Y2 (ja) 1988-11-10 1988-11-10 混成集積回路

Country Status (1)

Country Link
JP (1) JPH0727667Y2 (enExample)

Family Cites Families (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH0132297Y2 (enExample) * 1980-10-07 1989-10-03
JPS6057194U (ja) * 1983-09-28 1985-04-20 日本インター株式会社 金属ケ−ス封止型電子機器

Also Published As

Publication number Publication date
JPH0267682U (enExample) 1990-05-22

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Legal Events

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