JPH0723961Y2 - 半導体素子収納用パッケージ - Google Patents
半導体素子収納用パッケージInfo
- Publication number
- JPH0723961Y2 JPH0723961Y2 JP1988134797U JP13479788U JPH0723961Y2 JP H0723961 Y2 JPH0723961 Y2 JP H0723961Y2 JP 1988134797 U JP1988134797 U JP 1988134797U JP 13479788 U JP13479788 U JP 13479788U JP H0723961 Y2 JPH0723961 Y2 JP H0723961Y2
- Authority
- JP
- Japan
- Prior art keywords
- external lead
- semiconductor element
- lead terminal
- glass
- hole
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired - Fee Related
Links
Classifications
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
- H10W72/00—Interconnections or connectors in packages
- H10W72/50—Bond wires
- H10W72/541—Dispositions of bond wires
- H10W72/5449—Dispositions of bond wires not being orthogonal to a side surface of the chip, e.g. fan-out arrangements
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
- H10W90/00—Package configurations
- H10W90/701—Package configurations characterised by the relative positions of pads or connectors relative to package parts
- H10W90/751—Package configurations characterised by the relative positions of pads or connectors relative to package parts of bond wires
- H10W90/756—Package configurations characterised by the relative positions of pads or connectors relative to package parts of bond wires between a chip and a stacked lead frame, conducting package substrate or heat sink
Landscapes
- Wire Bonding (AREA)
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP1988134797U JPH0723961Y2 (ja) | 1988-10-14 | 1988-10-14 | 半導体素子収納用パッケージ |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP1988134797U JPH0723961Y2 (ja) | 1988-10-14 | 1988-10-14 | 半導体素子収納用パッケージ |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| JPH0256446U JPH0256446U (enExample) | 1990-04-24 |
| JPH0723961Y2 true JPH0723961Y2 (ja) | 1995-05-31 |
Family
ID=31393870
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP1988134797U Expired - Fee Related JPH0723961Y2 (ja) | 1988-10-14 | 1988-10-14 | 半導体素子収納用パッケージ |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPH0723961Y2 (enExample) |
Families Citing this family (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN100392835C (zh) * | 1999-09-28 | 2008-06-04 | 松下电器产业株式会社 | 电子部件及其制造方法 |
Family Cites Families (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPH0713232Y2 (ja) * | 1988-07-30 | 1995-03-29 | 日本電気株式会社 | サーディップ型半導体装置 |
-
1988
- 1988-10-14 JP JP1988134797U patent/JPH0723961Y2/ja not_active Expired - Fee Related
Also Published As
| Publication number | Publication date |
|---|---|
| JPH0256446U (enExample) | 1990-04-24 |
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Legal Events
| Date | Code | Title | Description |
|---|---|---|---|
| LAPS | Cancellation because of no payment of annual fees |