JPH07183308A - Manufacture of vertical bipolar transistor - Google Patents

Abstract

PURPOSE:To relax the concentration gradient in the depth direction in an N-type base region by diffusing P-type impurities and N-type impurities to the surface of an N-type epitaxial layer and forming a P-type diffusion region having impurity concentration lower than that of the collector between the base and the collector. CONSTITUTION:A collector for a P-N-P transistor is composed of a P-type diffusion region 8 and a P-type buried layer 4 and an oxide film 9 in a base forming region is removed selectively, and the ions of boron and phosphorus are implanted to the exposed surface of the P-type diffusion region 8 respectively while a thermal diffusion is conducted. Consequently, boron is diffused to a deeper position than phosphorus by the thermal diffusion by the relationship between the range of ion implanlation and the concentration, and a P-type diffusion region 19 having concentration lower than the impurity concentration of the P-type diffusion region 8 is formed in the P-type diffusion region 8. Accordingly, relative impurity concentration in a base region is increased, an extension to the base side of a depletion layer between the connector and a base is inhibited, the change of effective base width is reduced, and the drop of Early voltage is prevented.

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a method of manufacturing a high breakdown voltage vertical bipolar transistor in a bipolar integrated circuit.

[0002]

2. Description of the Related Art FIG. 3 shows a typical manufacturing method of a conventional vertical bipolar transistor. An N-type buried layer 2, a P-type isolation layer 3, and a P-type buried layer 4 serving as a collector of a PNP transistor are formed on a P-type silicon substrate 1 by a well-known diffusion technique, and an N-type epitaxial layer 5 is formed, for example. .5
It is grown to a thickness of about 3.0 microns with a resistivity of Ω · cm (Fig. 3a). Next, after forming an oxide film on the surface of the N-type epitaxial layer, it is selectively removed by a well-known photoetching method. Impurities are ion-implanted into the exposed surface of the epitaxial layer 5 using the oxide film 6 as a mask, and thermal diffusion is performed to simultaneously form a P-type isolation layer 7 and a P-type diffusion region 8 forming a part of the collector of the PNP transistor. It is connected to the P-type separation layer 3 and the P-type burying layer 4 respectively formed previously (FIG. 3b). With the P-type diffusion region 8 and the P-type buried layer 4,
It constitutes the collector of the PNP transistor. After the oxide film 6 is removed and a new oxide film is formed, the oxide film in the base formation region is selectively removed, and impurities are ion-implanted into the exposed surface of the P-type diffusion region 8 using the oxide film 9 as a mask. Then, the N-type diffusion region 10 forming the base of the PNP transistor is formed (FIG. 3C). After that, the oxide film 9 is removed, a new oxide film is formed, and the oxide film 1 is selectively removed.
Impurities are ion-implanted into the exposed surface of the N-type diffusion region 10 using 1 as a mask to form a P-type diffusion region 12 which constitutes the emitter of the PNP transistor. At the same time, the P-type diffusion region 8 forming the collector of the PNP transistor is exposed and the P-type diffusion region is formed. This constitutes the collector contact region 13 of the PNP transistor (FIG. 3).
d). Then, the oxide film 11 is removed, a new oxide film is formed, and the oxide film is selectively removed. Using this oxide film as a mask, impurities are ion-implanted into the exposed surface of the N-type diffusion region 10.
The N type diffusion region 14 is formed. This constitutes the base contact of the PNP transistor. Next, the oxide film of the mask is removed, a new oxide film 15 is formed, and the oxide film 15 is selectively removed to open the contact windows of the collector, base and emitter of the PNP transistor to form electrodes 16, 18 and 17, respectively. Complete the PNP transistor (Fig. 3e).

As described above, in the conventional PNP transistor manufacturing method, the P-type diffusion region 8 forming a part of the collector is used.
Was formed by thermal diffusion after ion implantation. When the epitaxial layer 5 has a relatively thin thickness of about 3.0 μm, this thermal diffusion needs to be completed in a short time. Therefore, the impurity concentration profile in the depth direction of the P-type diffusion region 8 has a concentration gradient in which the impurity concentration decreases as the depth increases. When the N-type diffusion region 10 serving as the base of the PNP transistor is formed on the P-type diffusion region 8 having such a concentration gradient, the concentration of the P-type diffusion region 8 affects the concentration of the N-type diffusion region 10, Change. FIG. 2A shows a profile of the impurity concentration in the depth direction of the base portion of the PNP transistor formed by the conventional manufacturing method. The concentration of the P-type diffusion region 8 forming the collector of the PNP transistor becomes higher on the side of the N-type diffusion region 10 forming the base. With such a concentration profile, the impurity concentration of the N-type diffusion region 10 forming the base becomes relatively low, the spread of the collector-base depletion layer to the base side cannot be suppressed, and the effective base width changes. However, there is a problem that the early voltage is lowered. Further, there is a problem that the impurity concentration of the P-type diffusion region 10 forming the collector is relatively increased and the breakdown voltage between the base and the collector is lowered.

[0004]

In the conventional method for manufacturing a PNP transistor, since the impurity concentration of the P-type diffusion region forming the collector is relatively high, the early voltage and the breakdown voltage between the base and collector are reduced. There was a problem. The present invention has been made to solve the above problems, and an object thereof is to obtain a vertical bipolar transistor having a high breakdown voltage.

[0005]

In order to achieve the above object, the present invention forms a reverse conductivity type epitaxial layer on a semiconductor substrate of one conductivity type, and reverse conductivity between the epitaxial layer and the semiconductor substrate. -Type vertical bipolar transistor forming a buried layer of a conductivity type and forming a collector of one conductivity type, a base of a reverse conductivity type, and an emitter of one conductivity type at a predetermined position of the epitaxial layer on the buried layer. In the manufacturing method, the one conductivity type impurity and the opposite conductivity type impurity are diffused on the surface of the epitaxial layer in the base formation region, and the impurity concentration between the base and the collector is lower than that of the collector. The method is characterized by including a step of forming a diffusion region of one conductivity type.

[0006]

FIG. 1 shows a method for manufacturing a vertical PNP transistor according to the present invention. An N-type buried layer 2 on a P-type silicon substrate 1,
The P-type isolation layer 3 and the P-type buried layer 4 which serves as the collector of the PNP transistor are formed by a well-known diffusion technique, and the N-type epitaxial layer 5 is formed to have a specific resistance of, for example, 1.5 Ωcm and a thickness of about 3.0 μm. Grow in thickness. next,
Impurities are ion-implanted from the surface of the N-type epitaxial layer 5 using the oxide film as a mask and thermally diffused to form the P-type separation layer 7
Also, a P-type diffusion region 8 which becomes a part of the collector of the PNP transistor is formed at the same time, and is connected to the P-type isolation layer 3 and the P-type buried layer 4 which have been formed in advance. The P-type diffusion region 8 and the P-type buried layer 4 form the collector of the PNP transistor. An oxide film is newly formed, and PNP
The oxide film 9 in the base formation region of the transistor is selectively removed (FIG. 1a). The steps up to this point are the same as in the conventional manufacturing method.

Impurities are ion-implanted into the exposed surface of the P-type diffusion region 8. Conventionally, the implantation of the impurity has only been performed once to implant the boron in order to form the N-type diffusion region 10. However, in the present invention, the following ion implantation is performed before the implantation of the boron. It is characterized by the addition of a heat diffusion step. That is, boron and phosphorus are ion-implanted into the exposed surface of the P-type diffusion region 8 and, at the same time, thermal diffusion is performed. As an example, boron is implanted at a dose amount of 1.5E12 and an acceleration voltage of 200 KeV, and then phosphorus is immediately implanted at a dose amount of 1.3E12 and an acceleration voltage of 200 KeV. Then, thermal diffusion is performed at 1100 ° C. for 120 minutes. Due to the relationship between the range and concentration of ion implantation, boron diffuses deeper than phosphorus by thermal diffusion. As a result, from the surface, in the P-type diffusion region 8 having a depth of 1.0 to 1.3 microns, P- having a concentration lower than the impurity concentration of the P-type diffusion region 8
The mold diffusion region 19 is formed. The subsequent steps are the same as in the conventional method, and impurities are ion-implanted using the oxide film 9 as a mask to form an N-type diffusion region 10 which constitutes the base of the PNP transistor (FIG. 1B). After that, the oxide film 9 is removed, a new oxide film is formed, and after selective removal, ions are implanted into the exposed surface of the N-type diffusion region 10 using the oxide film 11 as a mask to form a P-type transistor that constitutes the emitter of the PNP transistor. The diffusion region 12 is formed. At the same time, the P-type diffusion region 8 forming the collector of the PNP transistor is exposed and the P-type diffusion region is formed. This constitutes the collector contact region 13 of the PNP transistor (FIG. 1).
c). Further, the oxide film 11 is removed, a new oxide film is formed, and the oxide film is selectively removed. Using this oxide film as a mask, impurities are ion-implanted into the exposed surface of the N-type diffusion region 10 to form the N-type diffusion region 14. Form. This constitutes the contact at the base of the PNP transistor. Next, the oxide film is removed, a new oxide film 15 is formed, and the PNP is selectively removed.
The collector, base, and emitter contact windows of the transistor are opened, and electrodes 16, 18, and 17 are formed, respectively, to complete the PNP transistor (FIG. 1d).

The impurity concentration profile in the depth direction of the base portion of the PNP transistor formed by the above manufacturing method is shown in FIG. 2 (b) (solid line). It can be seen that there is a large difference in the concentration profile of the P-type diffusion region, that is, the collector portion, as compared with the PNP transistor (shown by the dotted line) formed by the conventional manufacturing method. In the PNP transistor of the present invention, since the P-diffusion region exists in the collector portion, the impurity concentration in the collector portion is low, and the concentration gradient becomes high on the N-type diffusion region (base) side as has been conventionally seen. Has not occurred. In addition, it can be seen that the shortening of the width of the N-type diffusion region (base), which was thought to be caused by this concentration gradient in the past, is alleviated. According to the present invention, by realizing such a concentration profile, the impurity concentration of the N-type diffusion region becomes relatively high,
The expansion of the collector-base depletion layer to the base side was suppressed, the effective change in the base width was eliminated, and the problem of reduced Early voltage could be solved. In addition, the impurity concentration of the P-type diffusion region (collector) was relatively low, and sufficient base-collector breakdown voltage could be obtained.

The description has been made by taking the case of implanting boron and phosphorus as an example when forming the P-diffusion region 18.
The combination is not limited to this combination, and in the combination of P-type and N-type impurities with respect to the semiconductor substrate, as long as P-type impurities are diffused to a position deeper than N-type impurities as a result of thermal diffusion. Good. In order to realize such diffusion, the concentration of the epitaxial layer, P-type impurity and N-type impurity implantation conditions, thermal diffusion conditions, etc. are set appropriately.

The present invention is particularly effective when forming an integrated circuit having a vertical bipolar transistor on the same semiconductor substrate as a CMOSFET. For example, normally, the P-type diffusion region 8 forming the collector of the vertical PNP transistor is formed at the same time as the P-well of the nMOS transistor, but according to the present invention, the P-type diffusion region 8 immediately below the base is formed regardless of the impurity concentration of the P-well. The impurity concentration can be determined.
Therefore, a high voltage vertical bipolar transistor is
It can be formed on the same substrate as the MOSFET.

[0011]

As described above, in the vertical bipolar transistor according to the manufacturing method of the present invention, the P-diffusion region having a low impurity concentration is formed in the collector region immediately below the base region, so that the relative base region is formed. The impurity concentration was increased, the expansion of the collector-base depletion layer to the base side was suppressed, the effective change in the base width was reduced, and the early voltage was prevented from decreasing. Further, the impurity concentration of the collector was relatively low, and a sufficient base / collector withstand voltage could be obtained. Furthermore, a high concentration emitter is formed,
As a result, the base can be made to have a high concentration, the base resistance is small, and the current amplification factor is high. Therefore, even if the base width is made small, a sufficient punch-through voltage can be obtained. Since the gap can be formed shallowly, high frequency operation becomes possible.

[Brief description of drawings]

FIG. 1 is an explanatory diagram showing a manufacturing method according to an embodiment of the present invention.

FIG. 2 is an explanatory diagram comparing the impurity concentration profiles of the present invention and a conventional example.

FIG. 3 is an explanatory view showing a conventional method for manufacturing a vertical bipolar transistor.

[Explanation of sign]

 1 P-type silicon substrate 2 N-type burying layer 3 P-type separating layer 4 P-type burying layer 5 N-type epitaxial layer 6 Oxide film 7 P-type separating layer 8 P-type diffusion region 9 Oxide film 10 N-type diffusion region 11 Oxidation Film 12 P-type diffusion region 13 Collector contact region 14 N-type diffusion region 15 Oxide film 16 Collector electrode 17 Emitter electrode 18 Base electrode 19 P- type diffusion region

Claims (1)

[Claims] 1. An epitaxial layer of opposite conductivity type is formed on a semiconductor substrate of one conductivity type, a buried layer of opposite conductivity type is formed between the epitaxial layer and the semiconductor substrate, and the buried layer. A method for manufacturing a vertical bipolar transistor, wherein a collector of one conductivity type, a base of opposite conductivity type, and an emitter of one conductivity type are formed at predetermined positions in the epitaxial layer above, wherein the epitaxial layer in the base formation region is formed. On the surface, impurities of one conductivity type and impurities of the opposite conductivity type are diffused,
A method of manufacturing a vertical bipolar transistor, comprising the step of forming a diffusion region of one conductivity type having an impurity concentration lower than that of the collector, between the base and the collector.