JPH0715113A - Formation of printed wiring pattern - Google Patents

Abstract

PURPOSE:To achieve the improvement of electric property and prevention of exfoliation by bringing the shape of the cross section of a copper wiring pattern close to a rectangle. CONSTITUTION:The shape of the cross section of a plated resist pattern 5, which is made on the surface of a laminate lined with copper, lying on an insulating substrate 1 is put in the shape of an over hang such as that the top juts out in an opening 6. Next, copper plating is performed in the opening, and etching resists 9 are formed on the head, where the copper plating is exposed, and the side face, and then the plating resist is exfoliated, and the base copper foil is etched off so as to form a copper wiring pattern 10 rectangular in cross section.

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a printed wiring board manufacturing method, and more particularly to a printed wiring pattern forming method suitable for manufacturing a high density printed wiring board used in a computer or the like.

[0002]

2. Description of the Related Art A conventional printed wiring board manufacturing method is
There are the following three methods, roughly classified.

(A) A method of protecting the conductor pattern portion with an etching resist and etching unnecessary copper of the same thickness as the pattern conductor thickness, which is called "subtractive method". This method has a problem regarding the shape of the obtained pattern conductor portion. That is, the width of the skirt portion is wider than that of the head portion of the pattern conductor portion, and this width difference increases as the thickness of the pattern conductor portion increases.

(B) A plating resist pattern having an opening in a wiring pattern portion is formed on the surface of the thin copper clad laminate, and thick copper plating and etching resist formation are sequentially performed in the opening portion. After that, the plating resist is peeled off, the underlying copper foil is removed by etching using the etching resist as a mask,
A method of forming a printed wiring pattern on the surface of a laminated board by removing the etching resist is called "semi-additive method". This method also has a problem regarding the shape of the pattern conductor portion. That is, since the side surface of the thick copper plating is not completely covered with the etching resist, the side surface of the thick copper is also eroded by the etching when the base copper foil is etched, and as a result, the bottom of the pattern becomes small.

(C) A method of forming a printed resist pattern on the surface of a base material by forming a plating resist pattern having an opening of a wiring pattern portion on the surface of an insulating base material and plating thick copper on the opening. Full-additive method ". The pattern formed by this method has good accuracy,
When forming an inner layer substrate of a multilayer printed wiring board, there is a problem in the performance (glass transition temperature) of the current plating resist material. That is, in the state where the plating resist is attached, when the inner layer substrate is laminated in multiple layers, when drilling with a drill,
Also, there is a problem in heat resistance during soldering. Further, when the plating resist is peeled off to produce a multilayer substrate, it is difficult to peel off the plating resist. Due to these problems, it is difficult to manufacture the inner layer substrate of the multilayer substrate by the full-additive method.

With the recent increase in the speed of computers, there has been a demand for higher density of printed wiring boards, and in order to meet these demands, a pattern spacing and pattern width are narrow, and a pattern cross-sectional area is large. That is, a rectangular pattern conductor having a large thickness is required. On the other hand, two methods other than the full-additive method, which is difficult to form the inner layer substrate of the multilayer substrate due to the problem of the performance of the current dry film material, will be considered.

First, the subtractive method will be described. As described above, comparing the head and the hem of the pattern conductor portion formed by this method, the latter is wider than the former, and the difference becomes larger as the conductor thickness of the pattern increases. For this reason, the width of the pattern to be formed and the conductor thickness are limited in terms of undercut and hem width, and it is not possible to cope with the recent increase in density of printed wiring boards.

Next, the semi-additive method will be described. As described above, when a pattern is formed using this method, since the etching resist does not completely cover the side surface of the thick copper plating, this etching resist is not covered when the underlying copper foil is etched. In order to erode the thick copper part, the width of the hem of the pattern or the boundary surface between the base metal and the plated copper becomes narrower than the pattern head, and as the pattern width becomes smaller, it peels from the pattern insulating substrate or base copper. The problem arises. For this reason, a rectangular pattern cannot be obtained due to the side surface erosion during etching, which cannot cope with the recent increase in density of printed wiring boards.

In order to solve the above-mentioned problems in the semi-additive method, the following method is known.

First, as described in Japanese Patent Laid-Open No. 62-262489, dry pattern photoresist development is performed again after performing thick copper plating on the open wiring pattern portion by dry film photoresist development. In this method, a gap is formed between the thick copper plating and the dry film photoresist to deposit the solder plating film on the side surface of the thick copper plating pattern.

The other is, as described in JP-A-63-69290, after forming a plating resist pattern in which a copper wiring pattern portion is opened by a first resist, a second resist is formed in the opening. Filling and patterning to form an opening slightly smaller than the opening formed by the first resist, performing thick copper plating on the opening, then removing the second resist pattern, and performing thick copper plating And a first resist, and a solder plating film is deposited on the side wall of the thick copper pattern.

Third, as described in JP-A-3-222392, after forming a plating resist pattern having a wiring pattern portion opened by a dry film photoresist, the opening is placed in a high temperature copper plating bath. Pattern plating is performed, and then solder plating is performed by alternately repeating appropriate current and low current in an electric solder plating bath at room temperature, and a solder plating film is also deposited on the side wall of the thick copper pattern. is there.

[0013]

However, the above-mentioned three conventional methods have some restrictions or problems as described below.

First, the method of Japanese Patent Laid-Open No. 62-262489 is a step of performing thick copper plating by the semi-additive method.
In the copper plating solution, the plating reaction alienated substance elutes from the incompletely exposed area of the photoresist.To prevent this, the photoresist after development is reexposed or baked to completely remove the incompletely exposed area. It is not appropriate because it often hardens.

The method of JP-A-63-69290 is the first
A method of using a solvent-soluble type for the resist and an alkali-soluble type for the second resist seems appropriate, but in this case, it is necessary to use a non-alkali plating bath for the thick copper plating. However, the non-alkali plating bath is unsuitable in terms of the distribution of the flat surface and the variation of the plating thickness due to the density of the pattern, and this method is limited.

Further, the method disclosed in Japanese Patent Laid-Open No. 3-222392 utilizes shrinkage of the dry film resist caused by the temperature difference between the copper plating bath and the solder plating bath, and solder is applied to the gap between the dry film resist and the thick copper pattern. The plating is permeated and the appropriate current and low current are alternately applied in the electric solder plating bath. However, in this case, it is difficult to constantly supply a new solution of the solder plating solution to the gap, and the solder plating solution does not penetrate in the depth direction of the gap, or variation occurs. However, there is a problem in that the working time is more than twice as long as when only the appropriate current is supplied.

As described above, none of the conventional solutions can be a decisive means for solving the phenomenon that the copper wiring pattern is peeled off from the insulating substrate and the phenomenon that the width and cross-sectional area of the pattern are reduced. .

It is an object of the present invention to eliminate the restrictions or problems of the above-mentioned conventional method in forming a printed wiring pattern on the surface of a laminated substrate by the semi-additive method, and to provide a pattern having a minimum width, a minimum conductor thickness and a maximum cross-sectional area. To provide a method of obtaining.

[0019]

In order to achieve the above object, the present invention forms a plating resist pattern in which a wiring pattern portion is opened on the surface of a thin copper foil-clad laminate, and a thick copper layer is formed in the opening. Plating and etching resist formation are performed sequentially, then the plating resist is peeled off, the underlying copper foil is removed by etching using the etching resist as a mask, and the etching resist is removed to form a printed wiring pattern on the surface of the laminate. In the method, the cross-sectional shape of the plating resist pattern remaining after development is created so that the part (hem) that is in contact with the copper clad laminate has a wider overhang than the head. And

It should be noted that, although it is clearly different from the present invention relating to the method for forming a pattern on a printed circuit board in terms of the purpose, the manufacturing method and the effect, a semiconductor similar to the overhang-shaped plating resist shape according to the present invention There is a reverse taper type resist for lift-off in the field. Regarding this, "C. Li and J. Richards, IEDMTech
nical Digest, 1980, 412 to 413 ”,“ M.
Hatzakis, J.M. Vac. Sci. Technol., 16 (6) 1
984 (1979) ”,“ M. Hatzakis, B.A. J. Ca
narello and J. M. Shaw., IBM J. Res. Deve
lop., 24 (4) 452 (1980) "," S. P. L
yman, J.M. L. Jackel and P.M. L. Lin, J .; Vac.
Sci. Technol., 19 (4) 1325 (198
1) ”,“ S. P. Beaumont, et al., Appl. Phys.
Lett., 38 (6) 436 (1981) "," Single
-Step Lift-off Process, R.P. J. Bergeron, C.
J. Hamel and C. J. Matthewa ”,“ Lift-off T
echniques for Fine Line Metal Patterning, J.
M. Frary and P.F. Seese, Motorola Semiconductor
Research and Development Labs., Phoenix, Ari
There are many references such as zona.

[0021]

In the semi-additive method, it is impossible to completely prevent the side etching of the wiring pattern during the etching of the underlying thin copper foil because it is difficult for the etching resist to completely cover the conductor portion. Therefore, in the present invention, as described above, the side etching amount is estimated in advance, and the cross-sectional shape of the plating resist pattern remaining after development is compared with the head in the portion in contact with the copper-clad laminate (hem portion). After creating a wide overhang shape, thick copper plating is performed to form a pattern, which intentionally causes side etching on the side surface of the wiring pattern when the underlying thin copper foil is etched. As a result, a pattern conductor having a desired cross-sectional shape and excellent in DC resistance value, pattern strength, peeling, etc. is obtained. Therefore, according to the method of the present invention, it is possible to manufacture a high-density printed wiring board, and it is possible to satisfy the recent demand for high-speed computers.

[0022]

DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS The present invention will be specifically described below with reference to the accompanying drawings.

(Embodiment 1) FIG. 1 is a diagram showing a partial shape of a substrate cross section in each step of forming a wiring pattern according to this embodiment.

FIG. 1A is a part of a sectional view of a thin copper clad laminate, in which a thin copper foil 2 having a thickness of about 12 μm is provided on an insulating substrate 1. Using this thin copper clad laminate as the starting material,
A wiring pattern for the inner layer substrate is formed.

As shown in FIG. 1 (b), a dry film resist (A) 3 having a thickness of about 30 μm is laminated on the surface of the thin copper clad laminate, exposed through a photomask, and developed. Pattern. A dry film resist (B) 4 having a thickness of about 20 μm is laminated on the surface of the plating resist pattern formed by the dry film resist 3, exposed through a photomask, and developed for patterning. In this way, the plating resist pattern 5 composed of the two layers of dry film resists 3 and 4 is formed. The cross-sectional shape of the plating resist pattern 5 has a shape in which the upper layer projects more inward than the lower layer (overhang) in the opening 6, in other words, the hem portion in contact with the thin copper foil 2 of the thin film copper-clad laminate. Is wider than the head.

The compositions of the dry film resist (A) and the dry film resist (B) are shown in Table 1.

[0027]

[Table 1]

As can be seen from Table 1, the dry films (A) and (B) have the same contents of polymer and monomer, but different contents of Michler's ketone as a photoinitiator, and dry film resists (A). By lowering the sensitivity, a plating resist pattern 5 having an overhang cross-sectional shape as shown in FIG. 1B can be obtained by using the same photomask at the time of exposure.

Next, as shown in FIG. 1C, a copper plating pattern 7 is formed in the opening 6 of the plating resist pattern 5 by electroplating or chemical plating. After the copper plating pattern 7 is formed, there is a difference in the coefficient of thermal expansion between the copper clad laminate and the plating resist (5) (the plating resist has a higher coefficient of thermal expansion). A gap 8 of 0.5 to 2 μm in the width direction and about 20 μm in the depth direction is formed at the interface with and.

Next, as shown in FIG. 1 (d), solder plating 9 of etching resist is applied to the exposed portions of the copper plating pattern 7 and the side walls. Then, as shown in FIG. 1E, the dry film resist (5) is peeled and removed.

Next, the base copper foil 2 is wet-removed with an etching solution. At this time, since the exposed side surface of the copper plating pattern 7 and the underlying copper foil 2 are simultaneously etched, the cross-sectional shape after etching is as shown in FIG. Finally, the solder plating 9 as the solder resist of the etching resist is removed. As a result, an independent copper wiring pattern 10 is formed on the substrate as shown in FIG.

FIG. 2 shows details of the dimension and shape of the finally formed copper wiring pattern. In FIG. 2, the width W of the pattern head, the height H, the ratio of the hem width B to the head width W, the ratio of the pattern width C to the head width W at the boundary between the underlying copper foil and the pattern copper, and the pattern cross-sectional area S. The ratio of the rectangular pattern cross-sectional relationship (W × H) was as follows when 100 copper wiring patterns of the actually formed printed wiring board were sampled and measured.

W≈60 μm, H≈60 μm B / W = 0.96 ± 0.03 C / W = 0.92 ± 0.03 S / (W × H) = 0.98 ± 0.02 Table 2 shows the average value of the measured values and the average value of the same measured values for each of the Examples and Comparative Examples described later.

[0034]

[Table 2]

(Embodiment 2) This embodiment will be described with reference to FIG. This example is different from Example 1 in the method of forming the plating resist pattern 5 shown in FIG. That is, on the surface of the thin copper clad laminate shown in FIG. 1A, a dry film resist (A) having a composition shown in Table 1 and a thickness of about 30 μm and a dry film resist (B) having a thickness of about 20 μm were formed. Laminate in order. After that, exposure and development are performed, and the two layers of dry film resist are collectively patterned to obtain a plating resist pattern 5 shown in FIG. 1 (b).

Thereafter, similarly to the first embodiment, copper plating, solder plating, plating resist peeling removal, underlying copper foil etching, and solder film removal are carried out to perform the steps shown in FIG.
A copper wiring pattern having a cross-sectional shape shown in is obtained. The measured values of the copper wiring pattern are shown in Table 2.

(Embodiment 3) This embodiment will be described with reference to FIG. In this embodiment, a two-layer dry film resist is prepared by previously laminating a dry film resist (A) having a composition shown in Table 1 and a thickness of about 30 μm and a dry film resist (B) having a thickness of about 20 μm. . And
This two-layer dry film resist is laminated on the surface of the thin copper clad laminate shown in FIG. 1A with the dry film resist (B) side facing down. Then, by performing exposure and development, the plating resist pattern 5 having the cross-sectional shape shown in FIG. 1B is obtained.

Thereafter, as in the first embodiment, the steps of copper plating, solder plating, removal of plating resist, removal of the underlying copper foil, and removal of the solder film are performed, and the cross-sectional shape shown in FIG. Get the conductor pattern. The measured values of the conductor pattern are as shown in Table 2.

(Embodiment 4) This embodiment will be described with reference to FIG. After laminating a dry film 11 having a thickness of about 50 μm on the surface of the thin copper clad laminate shown in FIG. 3A (similar to that of the first embodiment), it is exposed through a photomask and developed. By doing so, a plating resist pattern is obtained. In this exposure step, the exposure amount is reduced from the usual amount to obtain a plating resist pattern with an opening having a cross-sectional shape that is overhanging as shown in FIG.

More specifically, when the number of steps of the step tablet (ST) is set to 0 (when the exposure amount is minimized)
When the optical density is increased to 0.05 and the number of ST steps is increased by 1, the exposure amount is increased by the optical density of 0.15. When the number of ST steps is set to 7 and the dry film resist 11 is exposed, It is assumed that an exposure apparatus that can obtain a plating resist pattern having a rectangular cross section as shown in FIG. In this case, if the number of ST steps is set to 4.5 to 5.0, the exposure amount is narrowed down for exposure, and development is performed, a plating resist pattern having a sectional shape as shown in FIG. 3C can be obtained.

After forming this plating resist pattern, as in the first embodiment, the steps of copper plating, solder plating, plating resist peeling removal, underlying copper foil etching, and solder film removal are performed. A copper wiring pattern 10 having a sectional shape shown in FIG.

(Embodiment 5) This embodiment will be described with reference to FIG. A dry film 11 having a thickness of about 50 μm is laminated on the surface of the thin copper clad laminate shown in FIG. 4A (similar to that of the first embodiment), and exposed and developed. After that, plasma etching (ashing) is performed for 40 minutes at a power of 2.2 kW using a gas composed of carbon tetrafluoride (CF ₄ ), nitrogen (N ₂ ) and oxygen (O ₂ ). An overhang-shaped plating resist pattern shown in (b) is obtained.

Thereafter, similarly to the first embodiment, the steps of copper plating, solder plating, plating resist peeling removal, etching of the underlying copper foil, and removal of the solder film are carried out.
A copper wiring pattern 10 having a cross-sectional shape shown in (c) is obtained.

(Embodiment 6) This embodiment will be described with reference to FIG. As shown in FIG. 5B, on the surface of the thin copper clad laminate shown in FIG. 5A (the same as that of the first embodiment),
P-aminoazobenzene 3, which is a dye having an optical absorption coefficient ε of 1000 or less at a wavelength of 400 nm or less, is applied. next,
The dry film resist 11 is laminated, exposed and developed to form a plating resist pattern.

At the time of this exposure, the reflection of electromagnetic waves from the thin copper clad laminate is absorbed by the coating film of p-aminoazobenzene 3, so if this absorption is not achieved, the plating resist pattern after development is shown in FIG. 5), a plating resist pattern having an overhang cross-sectional shape as shown in FIG. 5D is obtained.

After this, copper plating, as in the first embodiment,
By performing the steps of solder plating, removal of plating resist removal, etching of the underlying copper foil, and removal of the solder film, the process shown in FIG.
A copper wiring pattern 10 having a cross-sectional shape shown in (e) is obtained.

(Comparative Example) Here, as a comparative example with respect to Example 6, a case in which a thin copper clad laminate was treated without applying p-aminoazobenzene for absorbing electromagnetic waves will be described with reference to FIG. .

As shown in FIG. 6B, a dry film resist 11 having a thickness of about 50 μm is laminated on the surface of the thin copper clad laminate shown in FIG. 6A (the same as that of the first embodiment). Then, it is exposed to light through a photomask and developed to form a plating resist pattern. The exposure conditions were the same as in Example 6, but due to the action of the electromagnetic waves reflected by the thin copper foil 2 during exposure, the plating resist pattern had a cross-section with a tail tailed as shown in FIG. 6 (b). It becomes the shape. As a result, the substrate cross-sectional shape was changed as shown in FIGS. 6 (c) to 6 (f) by the subsequent steps of copper plating, solder plating, plating resist peeling removal, and etching of the underlying copper foil, which were the same as those in Example 1. Finally, by the step of removing the solder film, a copper wiring pattern 12 having a sectional shape as shown in FIG. 6G is obtained.

As shown in FIG. 6G, the cross-sectional shape of the copper wiring pattern 12 is inferior to that obtained by each of the above-described embodiments by several steps. When 100 copper wiring patterns of the actually formed printed wiring board were sampled and the dimensions were measured, they were as follows (for the symbols, refer to Example 1 above).
The average value is shown in Table 2.

W≈60 μm, H≈60 μm B / W = 0.76 ± 0.03 C / W = 0.52 ± 0.04 S / (W × H) = 0.72 ± 0.03 Numerical conditions of the printed wiring board, which are generally considered to be suitable and which can be realized by the present invention described in the above, are shown below.

(1) It has a conductor pattern composed of a first copper layer in contact with an insulating base material and a second copper layer laminated thereon, and the width W and height H of the head of the conductor pattern are 2 ≧. H / W ≧ 0.9
And the width W of the head and the width B of the bottom of the conductor pattern are 1.2 ≧ B / W ≧ 0.8.

(2) It has a conductor pattern composed of a first copper layer in contact with an insulating base material and a second copper layer laminated thereon, and the width W and height H of the head of the conductor pattern are 2 ≧. H / W ≧ 0.9
In addition, the conductor pattern width C at the boundary between the first copper layer and the second copper layer and the width W of the conductor pattern head are 1.2 ≧ C.
A printed wiring board having a relationship of /W≧0.8.

(3) It has a conductor pattern composed of a first copper layer in contact with an insulating base material and a second copper layer laminated thereon, and the width W of the head of the conductor pattern is 30 μm ≦ W ≦ 100 μm. And the height H of the conductor pattern is 50 μm ≦ H ≦
Printed wiring board in the range of 150 μm.

[0054]

As is apparent from the above description, according to the present invention, since the cross-sectional shape of the conductor pattern can be made close to a rectangle, a high-density printed wiring having a wiring pattern having a small DC resistance value and being hard to peel off. It becomes possible to manufacture a plate.

[Brief description of drawings]

FIG. 1 is an explanatory diagram of a wiring pattern forming process in Examples 1, 2, and 3.

FIG. 2 is an explanatory diagram of a cross-sectional shape of a copper wiring pattern.

FIG. 3 is an explanatory diagram of a wiring pattern forming process according to a fourth embodiment.

FIG. 4 is an explanatory diagram of a wiring pattern forming process according to a fifth embodiment.

FIG. 5 is an explanatory diagram of a wiring pattern forming process according to a sixth embodiment.

FIG. 6 is an explanatory diagram of a wiring pattern forming process in a comparative example.

[Explanation of symbols]

 1 Insulating substrate of thin copper clad laminate 2 Thin copper foil of thin copper clad laminate 3 Dry film resist (A) 4 Dry film resist (B) 5 Plating resist pattern 6 Plating resist pattern opening 7 Copper plating pattern 8 Plating Gap between resist and copper plating pattern 9 Solder plating 10 Copper wiring pattern 11 Dry film resist

Claims (7)

[Claims] 1. A first step of laminating a plating resist on the surface of a copper clad laminate, exposing and developing the same to form a plating resist pattern having an opening in a wiring pattern portion, and the first step.
A second step of performing thick copper plating on the wiring pattern portion opened by the step, and a third step of forming an etching resist on the gap between the plating resist and the thick copper pattern and the head of the thick copper pattern generated after the second step A first step of removing the plating resist pattern, a fifth step of removing the underlying copper foil by etching using the etching resist as a mask, and a sixth step of removing the etching resist. A method for forming a printed wiring pattern, characterized in that, in the step, the cross-sectional shape of the plating resist pattern is formed in an overhang shape in which the hem portion in contact with the copper clad laminate is wider than the head portion. 2. The print according to claim 1, wherein, in the first step, the exposure for forming the plating resist pattern is performed with an exposure amount smaller than an exposure amount for forming a rectangular sectional shape of the plating resist pattern. Wiring pattern forming method. 3. The printed wiring pattern forming method according to claim 1, wherein in the first step, plasma ashing is performed after exposure and development of the plating resist. 4. The method for forming a printed wiring pattern according to claim 1, wherein in the first step, the copper clad laminate is coated with a dye that absorbs electromagnetic waves, and then a plating resist is laminated. 5. The printed wiring pattern forming method according to claim 1, wherein in the first step, a plating resist added with a component that tends to narrow the bottom of the plating resist pattern is used. 6. The process according to claim 1, wherein in the first step, two or more kinds of plating resists having different sensitivities are laminated one by one in order of insensitivity and exposure and development are repeated. Method for forming printed wiring pattern. 7. The print according to claim 1, wherein in the first step, a multi-layered plating resist in which two or more kinds of plating resists having different sensitivities are stacked in order from the one having poor sensitivity is laminated, exposed and developed. Wiring pattern formation.