JPH0713232Y2 - サーディップ型半導体装置 - Google Patents
サーディップ型半導体装置Info
- Publication number
- JPH0713232Y2 JPH0713232Y2 JP1988101226U JP10122688U JPH0713232Y2 JP H0713232 Y2 JPH0713232 Y2 JP H0713232Y2 JP 1988101226 U JP1988101226 U JP 1988101226U JP 10122688 U JP10122688 U JP 10122688U JP H0713232 Y2 JPH0713232 Y2 JP H0713232Y2
- Authority
- JP
- Japan
- Prior art keywords
- recognition
- lead
- melting point
- point glass
- semiconductor device
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired - Lifetime
Links
Classifications
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
- H10W72/00—Interconnections or connectors in packages
- H10W72/50—Bond wires
- H10W72/541—Dispositions of bond wires
- H10W72/5449—Dispositions of bond wires not being orthogonal to a side surface of the chip, e.g. fan-out arrangements
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
- H10W90/00—Package configurations
- H10W90/701—Package configurations characterised by the relative positions of pads or connectors relative to package parts
- H10W90/751—Package configurations characterised by the relative positions of pads or connectors relative to package parts of bond wires
- H10W90/756—Package configurations characterised by the relative positions of pads or connectors relative to package parts of bond wires between a chip and a stacked lead frame, conducting package substrate or heat sink
Landscapes
- Wire Bonding (AREA)
- Lead Frames For Integrated Circuits (AREA)
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP1988101226U JPH0713232Y2 (ja) | 1988-07-30 | 1988-07-30 | サーディップ型半導体装置 |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP1988101226U JPH0713232Y2 (ja) | 1988-07-30 | 1988-07-30 | サーディップ型半導体装置 |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| JPH0224556U JPH0224556U (enExample) | 1990-02-19 |
| JPH0713232Y2 true JPH0713232Y2 (ja) | 1995-03-29 |
Family
ID=31330028
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP1988101226U Expired - Lifetime JPH0713232Y2 (ja) | 1988-07-30 | 1988-07-30 | サーディップ型半導体装置 |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPH0713232Y2 (enExample) |
Families Citing this family (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPH0723961Y2 (ja) * | 1988-10-14 | 1995-05-31 | 京セラ株式会社 | 半導体素子収納用パッケージ |
| JP2572461Y2 (ja) * | 1991-03-15 | 1998-05-25 | ソニー株式会社 | サーディップタイプ固体撮像素子のインナーリード形状 |
-
1988
- 1988-07-30 JP JP1988101226U patent/JPH0713232Y2/ja not_active Expired - Lifetime
Also Published As
| Publication number | Publication date |
|---|---|
| JPH0224556U (enExample) | 1990-02-19 |
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