JPH06326111A - 半導体素子のバンプ形成方法 - Google Patents
半導体素子のバンプ形成方法Info
- Publication number
- JPH06326111A JPH06326111A JP6043497A JP4349794A JPH06326111A JP H06326111 A JPH06326111 A JP H06326111A JP 6043497 A JP6043497 A JP 6043497A JP 4349794 A JP4349794 A JP 4349794A JP H06326111 A JPH06326111 A JP H06326111A
- Authority
- JP
- Japan
- Prior art keywords
- forming
- semiconductor device
- pad
- bump
- pads
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Granted
Links
- 239000004065 semiconductor Substances 0.000 title claims abstract description 50
- 238000000034 method Methods 0.000 title claims abstract description 27
- 230000015572 biosynthetic process Effects 0.000 title abstract description 4
- 229910000679 solder Inorganic materials 0.000 claims abstract description 33
- VYZAMTAEIAYCRO-UHFFFAOYSA-N Chromium Chemical compound [Cr] VYZAMTAEIAYCRO-UHFFFAOYSA-N 0.000 claims abstract description 20
- 238000010438 heat treatment Methods 0.000 claims abstract description 20
- 239000000919 ceramic Substances 0.000 claims abstract description 18
- 229910052782 aluminium Inorganic materials 0.000 claims abstract description 16
- XAGFODPZIPBFFR-UHFFFAOYSA-N aluminium Chemical compound [Al] XAGFODPZIPBFFR-UHFFFAOYSA-N 0.000 claims abstract description 16
- 229920002120 photoresistant polymer Polymers 0.000 claims description 13
- 239000011651 chromium Substances 0.000 claims description 11
- 229910052804 chromium Inorganic materials 0.000 claims description 9
- 238000005530 etching Methods 0.000 claims description 8
- 238000007747 plating Methods 0.000 claims description 8
- 238000002844 melting Methods 0.000 claims description 4
- 230000008018 melting Effects 0.000 claims description 4
- 238000007650 screen-printing Methods 0.000 claims description 2
- 230000013011 mating Effects 0.000 claims 1
- 230000002708 enhancing effect Effects 0.000 abstract 1
- 238000010586 diagram Methods 0.000 description 5
- 239000010931 gold Substances 0.000 description 4
- 239000000758 substrate Substances 0.000 description 4
- 239000010949 copper Substances 0.000 description 3
- RYGMFSIKBFXOCR-UHFFFAOYSA-N Copper Chemical compound [Cu] RYGMFSIKBFXOCR-UHFFFAOYSA-N 0.000 description 2
- 229910052802 copper Inorganic materials 0.000 description 2
- PCHJSUWPFVWCPO-UHFFFAOYSA-N gold Chemical compound [Au] PCHJSUWPFVWCPO-UHFFFAOYSA-N 0.000 description 2
- 229910052737 gold Inorganic materials 0.000 description 2
- 229910052751 metal Inorganic materials 0.000 description 2
- 239000002184 metal Substances 0.000 description 2
- 238000002161 passivation Methods 0.000 description 2
- 238000003486 chemical etching Methods 0.000 description 1
- 238000007796 conventional method Methods 0.000 description 1
- 230000002950 deficient Effects 0.000 description 1
- 230000000694 effects Effects 0.000 description 1
- 238000009713 electroplating Methods 0.000 description 1
- 238000005272 metallurgy Methods 0.000 description 1
- 230000008054 signal transmission Effects 0.000 description 1
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- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
- H01L21/50—Assembly of semiconductor devices using processes or apparatus not provided for in a single one of the subgroups H01L21/06 - H01L21/326, e.g. sealing of a cap to a base of a container
- H01L21/60—Attaching or detaching leads or other conductive members, to be used for carrying current to or from the device in operation
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- H01L2224/05124—Aluminium [Al] as principal constituent
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Abstract
よび生産性を向上し得る半導体素子のバンプ形成方法を
提供する。 【構成】 セラミック加熱プレート上に複数個のクロム
パッドおよびテストパッドをそれぞれ形成して該クロム
パッド上にソルダパッドを形成し、半導体素子のアルミ
ニウムパッド17上にBLM層19を形成して該BLM
層19と前記セラミック加熱プレート上のソルダパッド
とを結合させ、テストを行ない合格した半導体素子16
のソルダパッドのみを加熱してBLM層19とボンディ
ングさせ、セラミック加熱プレートを分離してバンプ1
5′を形成する。
Description
成方法に関するものであり、詳しくは、簡便にバンプを
形成し、収率および生産性を向上し得るようにした、半
導体素子のバンプ形成方法に関するものである。
に、ベアーチップ状態で基板上に直接実装させるベアー
チップ実装方法が広く用いられている。このような方法
は、半導体素子のアルミニウムパッド上に基板接触用バ
ンプを形成し、該バンプの媒介により半導体素子を基板
上に実装させるものである。このような方法を用い、ベ
アーチップ状態で基板上に実装させた半導体素子は、信
号の伝達経路が短くて電気的特性が向上され、パッケー
ジ状態の半導体素子よりも小型化および軽薄化し得る長
所がある。
パッド上にバンプを形成する方法を説明すると次のよう
であった。
素子1のアルミニウムパッド2上に、クロムCr、銅C
uおよび金Auが順次電気めっきされてBLM(Ball L
imiting Metallurgy;以下BLMと略称する)層3が形
成される。次いで、該BLM層3の上面に、図7(B)
に示したようなフォトレジスト層4が所定高さに成層さ
れる。
ォトレジスト層4の上面にメタルマスクを利用したフォ
トレジスト除去領域を限定して、該メタルマスクに露光
および現像が行なわれて、該フォトレジスト層4が除去
されバンプ5の形成される領域がオープンされる(図7
(D)参照)。
域内にバンプ(通常、ソルダである)が電気めっきによ
り蒸着(deposition)され、図7(F)に示したように
残りのフォトレジスト層4が除去される。その後、画7
(G)に示したように、エッチングにより不必要なBL
M層3が除去され不導体層6が形成されて、半導体素子
1のアルミニウムパッド2上にのみBLM層3およびバ
ンプ5が形成され、該バンプ5が図7(H)に示したよ
うにリフローされてボール状に変形される。
バンプ形成方法においては、半導体素子1の上面にBL
M層3が形成され、該BLM層3上面にのみバンプ5が
形成されるので、該バンプ5部位を除いた他のBLM層
3はエッチングにより除去されるようになっていた。
うな従来の半導体素子のバンプ形成方法においては、不
必要なBLM層を除去するためエッチングの工程を行な
うようになっているため煩雑であり、オーバエッチング
またはアンダエッチングの現象が発生して不良品が発生
するという不都合な点があった。
は、工程中に半導体素子のテストが不可能であるため、
半導体素子の収率が低下し、生産性の向上を図り得ない
という不都合な点もあった。
BLM層を除去するエッチング工程を省いて簡便にバン
プを形成し得る、半導体素子のバンプ形成方法を提供す
ることにある。
程中に半導体素子の事前テストを行ない、半導体素子の
収率および生産性を向上し得る、半導体素子のバンプ形
成方法を提供することにある。
は、セラミック加熱プレート上面に複数個でなる複数列
のクロムパッドおよびテストパッドをそれぞれ形成し、
それらクロムパッド上にソルダパッドを形成する第1過
程と、半導体素子のアルミニウムパッド上にフォトレジ
スト層を成層してエッチングした後、該アルミニウムパ
ッド上にBLM層を形成する第2過程と、それら第1お
よび第2過程で形成されたソルダパッドおよびBLM層
を合致させ結合した後、セラミック加熱プレート上のテ
ストパッドを利用して半導体素子の事前テストを行なう
第3過程と、該第3過程のテスト結果合格した半導体素
子のソルダパッドを加熱溶融して該ソルダパッドをボー
ル状にBLM層とボンディングさせ、セラミック加熱プ
レートを分離してバンプを形成する第4過程と、を備え
る半導体素子のバンプ形成方法を提供することにより達
成される。
詳細に説明する。
においては、まず、図1に示したように、所定大きさの
セラミック加熱プレート11が形成されて該セラミック
加熱プレート11上面中央部に複数個のクロムパッド1
2が2列に形成され、それら2列のクロムパッド12外
方側に所定間隔をおいて複数個のテストパッド13がそ
れぞれ2列に形成され、それらクロムパッド12および
テストパッド13はそれぞれクロム線14により連結さ
れる。
ムパッド12上面にはソルダめっきのスクリーン印刷法
によりそれぞれソルダパッド15が形成される。この場
合、クロムパッド12とソルダパッド15のソルダめっ
きとは接触性がよくない。
16上面にアルミニウムパッド17が形成され、該アル
ミニウムパッド17上面にフォトレジスト層18が形成
され、側面に不動態層20が形成され、該フォトレジス
ト層18がエッチングされて半導体素子16のアルミニ
ウムパッド17上面がオープンされる。
ッド17上面に、クロムCr、銅Cuおよび金Auが順
次蒸着されてBLM層19が形成され、残りのフォトレ
ジスト層18が除去される(図4参照)。
ミック加熱プレート11上のソルダパッド15と半導体
素子16上のBLM層19とが合致されてソルダパッド
15およびBLM層19が結合され、該ソルダパッド1
5のソルダめっきの粘性により半導体素子16のアルミ
ニウムパッド17が導電性になり、該導電化された半導
体素子16は前記セラミック加熱プレート11上のテス
トパッド13により事前テストが行なわれ、テストの結
果合格した半導体素子16のみが次の過程に移送され
る。
層19と結合されたソルダパッド15は、ソルダめっき
溶融点以上の温度に加熱されてソルダパッド15がBL
M層19と接着され、該ソルダパッド15がセラミック
加熱プレート11から分離されて、図6に示したよう
に、ソルダボール状のバンプ15′が形成される。この
場合、溶融点以上に加熱されたソルダパッド15のソル
ダめっきの特性により、ソルダパッド15がBLM層1
9とボンディングされ、ソルダパッド15はセラミック
加熱プレート11上のクロムパッド12と接触性がよく
ないので容易に分離される。
体素子のバンプ形成方法においては、従来のケミカルエ
ッチング工程を省き、ソルダめっきの特性を利用して半
導体素子のバンプを形成し、工程中にテストを行なうよ
うになっているため、半導体素子のバンプを形成する工
程が簡便になり、収率および生産性が向上されるという
効果がある。
加熱プレート上にクロムパッドとテストパッドとクロム
ワイヤとを形成した状態を表示する図である。
加熱プレート上にソルダパッドを形成した状態を表示す
る図である。
ープン状態を表示する図である。
ある。
結合状態を表示する図である。
示する図である。
明図である。
Claims (1)
- 【請求項1】 半導体素子のバンプを形成する方法であ
って、 所定大きさのセラミック加熱プレート上面に複数個でな
る複数列のクロムパッドおよびテストパッドをそれぞれ
形成し、それらクロムパッドおよびテストパッドをそれ
ぞれクロム線により連結し、それらクロムパッド上にソ
ルダめっきのスクリーン印刷法によりソルダパッドを形
成する第1過程と、 半導体素子のアルミニウムパッド上に所定高さのフォト
レジスト層を成層した後、該フォトレジスト層をエッチ
ングして半導体素子のアルミニウムパッド部位をオープ
ンさせ、該アルミニウムパッド上にBLM層を形成する
第2過程と、 該第2過程で形成されたBLM層と前記第1過程で形成
されたソルダパッドとを合致させ結合した後、前記セラ
ミック加熱プレート上のテストパッドを利用して半導体
素子の事前テストを行なう第3過程と、 該第3過程で行なった事前テストにより合格した半導体
素子のソルダパッドをソルダめっきの溶融点以上の温度
で加熱し、該ソルダパッドをソルダボール状にBLM層
上にボンディングさせ、セラミック加熱プレートを分離
してバンプを形成する第4過程と、 を備える半導体素子のバンプ形成方法。
Applications Claiming Priority (2)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
KR1019930004089A KR960004092B1 (ko) | 1993-03-17 | 1993-03-17 | 반도체 소자의 범프 형성방법 |
KR93P4089 | 1993-03-17 |
Publications (2)
Publication Number | Publication Date |
---|---|
JPH06326111A true JPH06326111A (ja) | 1994-11-25 |
JP3382340B2 JP3382340B2 (ja) | 2003-03-04 |
Family
ID=19352310
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP04349794A Expired - Fee Related JP3382340B2 (ja) | 1993-03-17 | 1994-03-15 | 半導体素子のバンプ形成方法 |
Country Status (3)
Country | Link |
---|---|
US (1) | US5449108A (ja) |
JP (1) | JP3382340B2 (ja) |
KR (1) | KR960004092B1 (ja) |
Cited By (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
WO1997009740A1 (de) * | 1995-09-08 | 1997-03-13 | Fraunhofer-Gesellschaft zur Förderung der angewandten Forschung e.V. | Verfahren und vorrichtung zum testen eines chips |
US6409073B1 (en) | 1998-07-15 | 2002-06-25 | Fraunhofer-Gesellschaft Zur Foerderung Der Angewandten Forschung E.V. | Method for transfering solder to a device and/or testing the device |
Families Citing this family (14)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US6609652B2 (en) | 1997-05-27 | 2003-08-26 | Spheretek, Llc | Ball bumping substrates, particuarly wafers |
US5988487A (en) * | 1997-05-27 | 1999-11-23 | Fujitsu Limited | Captured-cell solder printing and reflow methods |
US7288471B2 (en) * | 1997-05-27 | 2007-10-30 | Mackay John | Bumping electronic components using transfer substrates |
US7842599B2 (en) * | 1997-05-27 | 2010-11-30 | Wstp, Llc | Bumping electronic components using transfer substrates |
US7654432B2 (en) | 1997-05-27 | 2010-02-02 | Wstp, Llc | Forming solder balls on substrates |
US7007833B2 (en) | 1997-05-27 | 2006-03-07 | Mackay John | Forming solder balls on substrates |
US7819301B2 (en) * | 1997-05-27 | 2010-10-26 | Wstp, Llc | Bumping electronic components using transfer substrates |
US6293456B1 (en) | 1997-05-27 | 2001-09-25 | Spheretek, Llc | Methods for forming solder balls on substrates |
US6059172A (en) * | 1997-06-25 | 2000-05-09 | International Business Machines Corporation | Method for establishing electrical communication between a first object having a solder ball and a second object |
US6085968A (en) * | 1999-01-22 | 2000-07-11 | Hewlett-Packard Company | Solder retention ring for improved solder bump formation |
US6435398B2 (en) * | 2000-06-01 | 2002-08-20 | Texas Instruments Incorporated | Method for chemically reworking metal layers on integrated circuit bond pads |
US6992001B1 (en) * | 2003-05-08 | 2006-01-31 | Kulicke And Soffa Industries, Inc. | Screen print under-bump metalization (UBM) to produce low cost flip chip substrate |
JP2006202969A (ja) * | 2005-01-20 | 2006-08-03 | Taiyo Yuden Co Ltd | 半導体装置およびその実装体 |
CN109788643A (zh) * | 2017-11-10 | 2019-05-21 | 泰连公司 | 铝基可焊接的触头 |
Family Cites Families (6)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US4866507A (en) * | 1986-05-19 | 1989-09-12 | International Business Machines Corporation | Module for packaging semiconductor integrated circuit chips on a base substrate |
US4831494A (en) * | 1988-06-27 | 1989-05-16 | International Business Machines Corporation | Multilayer capacitor |
US4898320A (en) * | 1988-11-21 | 1990-02-06 | Honeywell, Inc. | Method of manufacturing a high-yield solder bumped semiconductor wafer |
US5217597A (en) * | 1991-04-01 | 1993-06-08 | Motorola, Inc. | Solder bump transfer method |
US5266522A (en) * | 1991-04-10 | 1993-11-30 | International Business Machines Corporation | Structure and method for corrosion and stress-resistant interconnecting metallurgy |
US5289631A (en) * | 1992-03-04 | 1994-03-01 | Mcnc | Method for testing, burn-in, and/or programming of integrated circuit chips |
-
1993
- 1993-03-17 KR KR1019930004089A patent/KR960004092B1/ko not_active IP Right Cessation
-
1994
- 1994-03-15 JP JP04349794A patent/JP3382340B2/ja not_active Expired - Fee Related
- 1994-03-15 US US08/213,430 patent/US5449108A/en not_active Expired - Lifetime
Cited By (3)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
WO1997009740A1 (de) * | 1995-09-08 | 1997-03-13 | Fraunhofer-Gesellschaft zur Förderung der angewandten Forschung e.V. | Verfahren und vorrichtung zum testen eines chips |
US6211571B1 (en) | 1995-09-08 | 2001-04-03 | Fraunhofer-Gesellschaft Zur Forderung Der Angewandten Forschung | Method and apparatus for testing chips |
US6409073B1 (en) | 1998-07-15 | 2002-06-25 | Fraunhofer-Gesellschaft Zur Foerderung Der Angewandten Forschung E.V. | Method for transfering solder to a device and/or testing the device |
Also Published As
Publication number | Publication date |
---|---|
KR960004092B1 (ko) | 1996-03-26 |
KR940022761A (ko) | 1994-10-21 |
JP3382340B2 (ja) | 2003-03-04 |
US5449108A (en) | 1995-09-12 |
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