JPH0629452A - 集積回路パッケージ及びその製造方法 - Google Patents

集積回路パッケージ及びその製造方法

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Publication number
JPH0629452A
JPH0629452A JP5051328A JP5132893A JPH0629452A JP H0629452 A JPH0629452 A JP H0629452A JP 5051328 A JP5051328 A JP 5051328A JP 5132893 A JP5132893 A JP 5132893A JP H0629452 A JPH0629452 A JP H0629452A
Authority
JP
Japan
Prior art keywords
layer
conductive
lead frame
insulating
conductive plate
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP5051328A
Other languages
English (en)
Japanese (ja)
Inventor
Bidyut Bhattacharyya
ビデュート・バータッチャリヤ
Debendra Mallik
デベンドラ・マリク
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Intel Corp
Original Assignee
Intel Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Intel Corp filed Critical Intel Corp
Publication of JPH0629452A publication Critical patent/JPH0629452A/ja
Pending legal-status Critical Current

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    • HELECTRICITY
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    • H01L23/00Details of semiconductor or other solid state devices
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    • H01L23/495Lead-frames or other flat leads
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    • YGENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
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  • Engineering & Computer Science (AREA)
  • Power Engineering (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Lead Frames For Integrated Circuits (AREA)
  • Physical Vapour Deposition (AREA)
JP5051328A 1992-02-18 1993-02-18 集積回路パッケージ及びその製造方法 Pending JPH0629452A (ja)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
US83728592A 1992-02-18 1992-02-18
US837285 1992-02-18

Publications (1)

Publication Number Publication Date
JPH0629452A true JPH0629452A (ja) 1994-02-04

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ID=25274058

Family Applications (2)

Application Number Title Priority Date Filing Date
JP5514358A Pending JPH06507275A (ja) 1992-02-18 1993-02-18 薄膜法を用いた多層成形プラスチックパッケージ
JP5051328A Pending JPH0629452A (ja) 1992-02-18 1993-02-18 集積回路パッケージ及びその製造方法

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Application Number Title Priority Date Filing Date
JP5514358A Pending JPH06507275A (ja) 1992-02-18 1993-02-18 薄膜法を用いた多層成形プラスチックパッケージ

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EP0580855A1 (en) 1994-02-02
EP0603158A3 (en) 1994-07-13
US5488257A (en) 1996-01-30
JPH06507275A (ja) 1994-08-11
WO1993016492A1 (en) 1993-08-19
EP0580855A4 (enExample) 1994-03-16
US5556807A (en) 1996-09-17
EP0603158A2 (en) 1994-06-22
CA2120464A1 (en) 1993-08-19
CA2108542A1 (en) 1993-08-19

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