JPH06120226A - Electrode structure of semiconductor element - Google Patents

Abstract

PURPOSE:To stabilize quality by uniforming a gap, simplify a solder bump manufacturing process, and enable cost reduction, by constituting an Ni-plated layer which is formed in a protruding type on an Al electrode layer of a semiconductor device by electroless plating, and a solder layer formed on the Ni- plated layer by dipping. CONSTITUTION:The active surface of a semiconductor element 1 is made to face an outer circuit board 6, and an electrode 2 of a semiconductor element 1 is connected with the upper part of a pattern 5 of an outer circuit board 6. The above electrode structure of the semiconductor element 1 of a semiconductor device consists of an Ni-plated layer 3 formed in a protruding type on an Al electrode 2 of the semiconductor element 1 by nonelectrolytic plating, and a solder layer 4 formed on the Ni-plated layer 3 by dipping. Thereby, in the case of connection by a flip chip mounting system, the gap 10 between a semiconductor element 1 and the outer circuit board 6 becomes uniform, and the adjustment of solder amount is facilitated, so that the short-circuit between patterns which is to be caused by the flowing-out of solder can be prevented.

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to an electrode structure of a semiconductor device.

[0002]

2. Description of the Related Art An active surface of a semiconductor device 1 is connected to an external circuit board 6
The electrode of the semiconductor element used in the so-called flip-chip mounting method, in which the electrode of the semiconductor element 1 is connected to the pattern 5 of the external circuit board 6 so as to be opposed to the Al electrode as shown in FIG. A Cu plating layer 9 is formed by electroplating on the layer 2 via a so-called barrier metal layer of a Cr layer 7 and a Cu layer 8 provided by sputtering.
The so-called solder bump electrodes, which are provided to have a thickness of about 4 .mu.m and have a projection of solder having a thickness of about 100 .mu.m, are the mainstream.

[0003]

However, in the electrode of the solder bump according to the above-mentioned conventional technique, the thickness of the Cu plating layer 9 shown in FIG. 3 is as very thin as 3 to 4 .mu.m. As shown in FIG. 4, the gap 10 between the Cu plating layer 9 and the pattern of the external circuit board 6 becomes large. For example, when the pressure applied to the semiconductor element 1 is small, the connection by the solder 4 is insufficient as shown in FIG. 4A, whereas when the applied pressure is large, the solder is attached as shown in FIG. 4B. There is a problem that it becomes difficult to make the circuit pattern finer because the possibility of short-circuiting between the patterns increases due to the outflow. Therefore, the present invention solves such a problem, and an object thereof is to provide quality stabilization of a semiconductor device by uniformizing the gap, simplification of a solder bump manufacturing process, and cost reduction. is there.

[0004]

The electrode structure of the semiconductor element of the present invention is the electrode structure of the semiconductor element of the semiconductor device, wherein the active surface of the semiconductor element is directly connected to the pattern of the external circuit board by soldering. It is characterized by comprising a Ni plating layer formed in a projection shape by electroless plating on the Al electrode layer of the semiconductor element, and a solder layer formed by dipping on the Ni plating layer.

[0005]

According to the above configuration of the present invention, by dipping the solder on the Ni plating layer formed to be thick by electroless plating, the protruding Ni plating layer and the external circuit board are bonded at the time of bonding. The patterns come into contact with each other
Since the plated layer holds the gap, the gap between the semiconductor element and the external circuit board is made uniform.

[0006]

DESCRIPTION OF THE PREFERRED EMBODIMENTS One embodiment of the present invention will be described below with reference to FIGS. 1, 2 and 4.

In order to clean the surface of the Al electrode layer 2 of the electrodes of the semiconductor element 1, first, UV irradiation (irradiation time is 2 minutes) and Ar plasma (100 W / 5 minutes) are applied to the surface of the semiconductor element 1. . Furthermore, this semiconductor device 1
Is immersed in a palladium chloride solution having a palladium concentration of 0.03 g / l and a liquid temperature of 5 ° C. for 2 minutes to activate the surface of the Al electrode layer 2. Immediately after activation, electroless Ni with a Ni ion concentration of 3.0 g / l (pH 5.5) and a liquid temperature of 65 ° C.
Immerse it in the plating solution for 2 hours in a static state to obtain a thickness of 15μ.
A Ni plating layer 3 of about m is provided. Furthermore, after immersing the semiconductor element 1 in a solder bath (solder composition; Sn: Pb = 6: 4) heated to 230 ° C. for 1 to 2 minutes in a state where the active surface and the liquid surface are parallel, slowly By pulling at a constant speed, the solder layer 4 having a thickness of 3 to 4 μm is formed on the Ni plating layer 3.
Can be formed. At this time, while pulling up the semiconductor element 1 at a constant speed, hot air purged with N ₂ is blown onto the active surface of the semiconductor element 1 that has come out of the bath, and excess solder that has adhered to other than the electrode portions is removed. At this time, Ni
Since the plating layer 3 is relatively thick with a thickness of 15 μm and is formed in the shape of a bump, due to the action of gravity and surface tension,
The solder layer 4 has a thickness of 3 to 4 μm on the surface of the bump-shaped Ni plating layer 3.
It will be formed in a coated state with a thickness of m. The semiconductor element 1 having the solder bumps manufactured in this manner is opposed to the external circuit board 6, and the electrodes of the semiconductor element are thermocompression bonded onto the pattern 5 (conditions: 250 ° C.,
When connected by 5.0 g / bump), a good bonding state can be obtained as shown in FIG. As can be seen from comparison with the conventional example shown in FIG. 4, in the conventional case, the Cu plating layer 9 and the external circuit board 6 which are electrolytically plated to a relatively thin thickness of 3 to 4 μm on the Al electrode layer 2 of the semiconductor element 1 are formed. Since the pattern 5 is connected via solder, the gap 10 between the semiconductor element 1 and the external circuit board 6 becomes non-uniform, and for example, the pressure of thermocompression bonding conditions applied to the semiconductor element 1 is applied. When the value is as small as "2.0 g / bump", the connection is insufficient as shown in Fig. 4 (a), or conversely, when the applied pressure is as large as "15 g / bump", the value is as shown in Fig. 4 (b). ) Caused a short circuit between the patterns due to the solder flowing out. However, in the case of the present invention, during thermocompression bonding, the bump-shaped Ni plating layer 3 and the pattern 5 come into contact with each other as shown in FIG. With a thickness of 3-4 μm,
Since it is formed so as to coat the Ni plating layer, it becomes easy to adjust the amount of solder, and it is possible to prevent a short circuit between patterns due to the solder flowing out.

[0008]

As is apparent from the above description, according to the present invention, by forming a thick Ni plating layer on the Al electrode layer of the semiconductor element, the semiconductor element and the external circuit can be connected at the time of connection by the flip chip mounting method. At the same time that the gap with the substrate becomes uniform, the amount of solder can be easily adjusted, and a short circuit between the patterns due to the solder flowing out can be prevented, so that a high-quality semiconductor device can be obtained. Further, regarding the solder bump manufacturing process, as compared with the conventional bump-shaped electrode manufacturing process, the solder bump of the present invention has no vapor deposition process or photo process, and metal bumps can be formed by using a machine or apparatus. In this respect, since the electroless plating method is relatively inexpensive, the manufacturing process can be simplified and the cost can be reduced.

[Brief description of drawings]

FIG. 1 is a sectional view of a solder bump of a semiconductor element for flip-chip mounting according to the present invention.

FIG. 2 is a sectional view of a semiconductor device flip-chip mounted by the solder bump of the present invention.

FIG. 3 is a sectional view of a solder bump of a conventional semiconductor element for flip-chip mounting.

FIG. 4 is a cross-sectional view of a semiconductor device flip-chip mounted by a conventional solder bump. (A) Sectional drawing when the pressure applied to a semiconductor element is small. (B) Sectional drawing when the pressure applied to a semiconductor element is large.

[Explanation of symbols]

 DESCRIPTION OF SYMBOLS 1 Semiconductor element 2 Al electrode layer 3 Ni plating layer 4 Solder 5 Pattern 6 External circuit board 7 Cr vapor deposition layer 8 Cu vapor deposition layer 9 Cu plating layer 10 Gap

Claims (1)

[Claims] 1. An electrode structure of the semiconductor element of a semiconductor device, wherein an active surface of the semiconductor element is opposed to an external circuit board, and electrodes of the semiconductor element are connected to a pattern of the external circuit board by soldering. An electrode structure for a semiconductor device, comprising a Ni plating layer formed in a projection shape by electroless plating on an Al electrode layer of the device, and a solder layer formed by dipping on the Ni plating layer.