JPH05315731A - Manufacture of connection pad of wiring board - Google Patents
Manufacture of connection pad of wiring boardInfo
- Publication number
- JPH05315731A JPH05315731A JP11498792A JP11498792A JPH05315731A JP H05315731 A JPH05315731 A JP H05315731A JP 11498792 A JP11498792 A JP 11498792A JP 11498792 A JP11498792 A JP 11498792A JP H05315731 A JPH05315731 A JP H05315731A
- Authority
- JP
- Japan
- Prior art keywords
- film
- gold
- connection pad
- wiring board
- wiring
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Granted
Links
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
- H01L24/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L24/02—Bonding areas ; Manufacturing methods related thereto
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/02—Bonding areas; Manufacturing methods related thereto
- H01L2224/04—Structure, shape, material or disposition of the bonding areas prior to the connecting process
- H01L2224/0401—Bonding areas specifically adapted for bump connectors, e.g. under bump metallisation [UBM]
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/10—Bump connectors; Manufacturing methods related thereto
- H01L2224/15—Structure, shape, material or disposition of the bump connectors after the connecting process
- H01L2224/16—Structure, shape, material or disposition of the bump connectors after the connecting process of an individual bump connector
- H01L2224/161—Disposition
- H01L2224/16151—Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
- H01L2224/16221—Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
- H01L2224/16225—Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/01—Chemical elements
- H01L2924/01078—Platinum [Pt]
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/01—Chemical elements
- H01L2924/01079—Gold [Au]
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/013—Alloys
- H01L2924/014—Solder alloys
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/15—Details of package parts other than the semiconductor or other solid state devices to be connected
- H01L2924/161—Cap
- H01L2924/1615—Shape
- H01L2924/16152—Cap comprising a cavity for hosting the device, e.g. U-shaped cap
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/19—Details of hybrid assemblies other than the semiconductor or other solid state devices to be connected
- H01L2924/191—Disposition
- H01L2924/19101—Disposition of discrete passive components
- H01L2924/19107—Disposition of discrete passive components off-chip wires
Landscapes
- Engineering & Computer Science (AREA)
- Computer Hardware Design (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Power Engineering (AREA)
- Manufacturing Of Printed Wiring (AREA)
- Wire Bonding (AREA)
Abstract
Description
【０００１】[0001]
【産業上の利用分野】本発明は、配線基板において、半
導体チップ等を搭載するためのパッドの金属膜形成に係
り、特にニッケルめっき上の厚付けの金膜形成方法に関
する。BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to forming a metal film of a pad for mounting a semiconductor chip or the like on a wiring board, and more particularly to a method of forming a thick gold film on nickel plating.
【０００２】[0002]
【従来の技術】配線基板上の接続パッドは、半導体チッ
プ等の部品と、配線とを、半田やボンディングにより接
続するために備えられている。接続パッドは、半導体チ
ップや入出力端子との半田接続のために、また、ワイヤ
ボンディングによる配線変更を可能にするために、最表
層にＡｕ被膜を備えた複数種類の金属皮膜層によって構
成される。2. Description of the Related Art Connection pads on a wiring board are provided for connecting components such as semiconductor chips and wiring to each other by soldering or bonding. The connection pad is composed of a plurality of kinds of metal film layers each having an Au film on the outermost layer for solder connection with a semiconductor chip or an input / output terminal and for enabling wiring change by wire bonding. ..
【０００３】特に、ワイヤボンディング用のパッドは、
部品と配線との接続信頼性を保証するために最表層に
０．５μｍ以上厚さの金被膜が必要とされる。従来、膜
厚０．５μｍ以上の金被膜を有する接続パッドは、例え
ば特開平１−２６８８７６号公報等に記載されているよ
うに、セラミック基板上の金属配線膜上に、ニッケル膜
を設け、ニッケル膜上に、置換型めっき法で、金の薄膜
を形成した後、さらに、還元型めっき法を用いて、０．
５μｍ以上の厚さまで金膜を積層していた。その後、金
属配線層と、金膜の密着性向上のために、加熱処理を施
して、ニッケル膜を金膜に拡散させていた。Particularly, the pad for wire bonding is
A gold coating with a thickness of 0.5 μm or more is required for the outermost layer in order to guarantee the connection reliability between parts and wiring. Conventionally, a connection pad having a gold coating with a thickness of 0.5 μm or more has a nickel film formed on a metal wiring film on a ceramic substrate by forming a nickel film on the metal wiring film on the ceramic substrate as described in, for example, Japanese Patent Application Laid-Open No. 1-268876. After forming a gold thin film on the film by the displacement-type plating method, further, by using the reduction-type plating method,
The gold film was laminated to a thickness of 5 μm or more. Then, in order to improve the adhesion between the metal wiring layer and the gold film, a heat treatment was performed to diffuse the nickel film into the gold film.
【０００４】[0004]
【発明が解決しようとする課題】しかしながら、従来の
技術に用いられる還元型めっき法は、めっきを行なう表
面の汚染や、めっき液内異物により、局所的に金めっき
膜が析出せず、接続パッドの最表層の金膜に欠陥が生じ
てしまうという問題があった。近年の配線基板は、高密
度化、高集積化に伴い、表面配線パターンの微細化が進
んでいるため、このような接続パッド最表層の欠陥は、
たとえ軽微なものであっても、接続信頼性を低下させる
原因となる。However, the reduction-type plating method used in the prior art does not locally deposit a gold plating film due to contamination of the surface to be plated or foreign matter in the plating solution, resulting in a connection pad. However, there is a problem that defects occur in the outermost gold film. In recent years, wiring boards have become finer in surface wiring pattern with higher density and higher integration.
Even a slight one causes a decrease in connection reliability.
【０００５】また、金属配線層と金膜の密着性向上のた
めの加熱処理の際に、還元型めっき法によって生じた欠
陥によって、金属配線層を構成する材料や下地膜である
ニッケル膜が、金膜表面へ過度に拡散してしまうため、
半田濡れ不良や、ワイヤボンディング接続不良を引き起
こし、問題となっていた。In addition, during the heat treatment for improving the adhesion between the metal wiring layer and the gold film, the material forming the metal wiring layer and the nickel film as the base film are caused by defects caused by the reduction type plating method. Since it diffuses excessively to the surface of the gold film,
This has caused problems such as poor solder wetting and poor wire bonding connections.
【０００６】本発明の目的は、前述した従来技術の問題
点を解決し、接続パッドの最上層の欠陥を無くし、半田
による接続、あるいはワイヤボンディングによる接続を
信頼性良く確実に行なうことのできる接続パッドを形成
する方法を提供することにある。An object of the present invention is to solve the above-mentioned problems of the prior art, eliminate defects in the uppermost layer of the connection pad, and perform connection by soldering or wire bonding reliably and reliably. It is to provide a method of forming a pad.
【０００７】[0007]
【課題を解決するための手段】上記問題を解決するため
に、本発明によれば、基板上に形成された配線上に、下
地膜を形成し、前記下地膜上に、置換型めっき法によ
り、第１の金膜を積層し、前記基板上の配線領域に金箔
を置いて圧着処理をすることにより、前記第１の金膜上
に第２の金膜を形成することを特徴とする配線基板の接
続パッドの製造方法が提供される。In order to solve the above problems, according to the present invention, an underlayer film is formed on a wiring formed on a substrate, and the underlayer film is formed by a substitutional plating method. And a first gold film is laminated, a gold foil is placed on a wiring region on the substrate, and a pressure treatment is performed to form a second gold film on the first gold film. A method of manufacturing a connection pad of a substrate is provided.
【０００８】[0008]
【作用】本発明では、配線パターン上に、下地膜を形成
し、その上に、置換型無電解めっき法で金膜を形成し、
さらにその上に、別途作製した金箔を圧着することによ
り、金の厚膜を有する接続パッドを形成する。無電解め
っき法には、置換型と還元型とがある。置換型は、欠陥
のない金膜を形成することができるが、厚膜を形成する
のには適しないという特徴がある。また、還元型は、金
の厚膜を形成可能であるが、めっきを行なう表面の汚染
や、めっき液内異物により、欠陥が生じやすい。本発明
では、金膜と金箔の圧着が容易に行ない得ることに着目
し、還元型無電解めっき法を用いずに、金の厚膜を形成
することを可能にしている。In the present invention, the base film is formed on the wiring pattern, and the gold film is formed thereon by the substitution type electroless plating method.
Further, a separately manufactured gold foil is pressure-bonded thereon to form a connection pad having a gold thick film. The electroless plating method includes a substitution type and a reduction type. The substitution type is capable of forming a gold film without defects, but has a characteristic that it is not suitable for forming a thick film. Further, the reduction type can form a thick film of gold, but defects are likely to occur due to contamination of the surface to be plated and foreign matter in the plating solution. In the present invention, focusing on the fact that the gold film and the gold foil can be easily pressure-bonded, it is possible to form a thick gold film without using the reduction-type electroless plating method.
【０００９】その後、熱処理することにより、配線を形
成する金属膜と下地膜間、及び、下地膜と金膜間に相互
拡散が生じさせ、各膜界面の密着力を向上させることが
できる。熱処理は、還元もしくは不活性ガス雰囲気で、
６５０℃〜８５０℃、１０±５分間行なった場合、接続
パッドの表面まで拡散してきたニッケルの酸化を防ぐこ
とができ、半田濡れ或いはワイヤボンディング強度を向
上させることができる。After that, heat treatment causes mutual diffusion between the metal film forming the wiring and the base film, and between the base film and the gold film, so that the adhesive force at each film interface can be improved. The heat treatment is performed in a reducing or inert gas atmosphere,
When performed at 650 ° C. to 850 ° C. for 10 ± 5 minutes, oxidation of nickel that has diffused to the surface of the connection pad can be prevented, and solder wetting or wire bonding strength can be improved.
【００１０】また、配線パッド間の余分な金箔は、研磨
剤を吹き付けるブラストによって容易に除去でき、配線
パターン間のショートを引き起こすこともない。Further, the excess gold foil between the wiring pads can be easily removed by blasting with an abrasive, and a short circuit between the wiring patterns does not occur.
【００１１】[0011]
【実施例】以下、本発明によるセラミック配線基板の接
続パッド製造方法の実施例を図面により詳細に説明す
る。DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENT An embodiment of a method for manufacturing a connection pad of a ceramic wiring board according to the present invention will be described in detail below with reference to the drawings.
【００１２】（実施例１）本発明により形成される接続
パッドは、図１のように、セラミック基板１上に、タン
グステン（Ｗ）膜２と、ニッケル（Ｎｉ）膜３と、第１
の金（Ａｕ）膜５、第２の金（Ａｕ）膜６とを有してい
る。Ｗ膜２は、セラミック基板１上に配線パターンを構
成する。Ｎｉ膜３は、Ｗ膜２と、第１のＡｕ膜５および
第２のＡｕ膜６との密着性を向上させるために配置され
ている。Example 1 A connection pad formed according to the present invention has a tungsten (W) film 2, a nickel (Ni) film 3, and a first (Ni) film 3 on a ceramic substrate 1 as shown in FIG.
The second gold (Au) film 5 and the second gold (Au) film 6 are included. The W film 2 forms a wiring pattern on the ceramic substrate 1. The Ni film 3 is arranged to improve the adhesion between the W film 2 and the first Au film 5 and the second Au film 6.
【００１３】つぎに、本実施例のセラミック配線基板の
各膜の形成方法を説明する。Next, a method of forming each film of the ceramic wiring board of this embodiment will be described.
【００１４】まず、図２に示すように、セラミック基板
１上に、基板１と同時に焼結することによって、Ｗ膜２
を形成する。つぎに、Ｗ膜２の表面を機械研磨し、さら
に、純水に研磨剤を分散した研磨液で液体ホーニングを
施して、Ｗ膜２の表面を平滑化する。平滑化したＷ膜２
表面を、さらに、化学的エッチングにより、エッチング
して、清浄面を出す。Ｗ膜２の清浄面上に、つぎに行な
うＮｉめっきの触媒として、Ｐｄ膜を形成する。First, as shown in FIG. 2, the W film 2 is formed on the ceramic substrate 1 by simultaneously sintering the substrate 1.
To form. Next, the surface of the W film 2 is mechanically polished, and further liquid honing is performed with a polishing liquid in which a polishing agent is dispersed in pure water to smooth the surface of the W film 2. Smoothed W film 2
The surface is further etched by chemical etching to expose a clean surface. A Pd film is formed on the clean surface of the W film 2 as a catalyst for Ni plating to be performed next.
【００１５】つぎに、ジメチルアミンボランを還元剤と
した無電解めっきにより、Ｎｉ膜３を厚さ２〜３μｍ形
成する。つぎに、軽く水洗浄し、すぐに、シアン化金カ
リを金塩とする置換型金めっき液（ＥＪＡ社製のベクト
ロレス）により、第１のＡｕ膜５を厚さ約０．１μｍ形
成し、イソプロピルアルコール（ＩＰＡ）を用い乾燥す
る。Next, the Ni film 3 having a thickness of 2 to 3 μm is formed by electroless plating using dimethylamine borane as a reducing agent. Next, lightly washing with water, and immediately, a first Au film 5 having a thickness of about 0.1 μm was formed by a displacement type gold plating solution (Vectroless manufactured by EJA) using gold cyanide as a gold salt. Dry with isopropyl alcohol (IPA).
【００１６】セラミック基板１と、形成したＮｉ膜３の
表面を覆うように、第２のＡｕ膜６となる厚さ２〜３μ
ｍの金箔をかぶせ、図５のように、ゴムローラ３０によ
り、Ａｕ箔を、第１のＡｕ膜５上に圧着する。連続式加
熱雰囲気炉により、Ｈ2：Ｎ2＝１：１の雰囲気中で、７
５０℃、１０分間、各膜を形成した基板１の熱処理を行
なう。これにより、Ｎｉ膜３が、Ｗ膜２と、第１のＡｕ
膜５および第２のＡｕ膜６とに、相互拡散し、各膜間の
密着力が向上する。加熱処理を、Ｈ2／Ｎ2の還元雰囲気
中で行なうので、第２のＡｕ膜６の表面に拡散したＮｉ
めっきの酸化も防止できる。The ceramic substrate 1 and the Ni film 3 thus formed are covered with a second Au film 6 having a thickness of 2 to 3 μm.
m gold foil is covered, and as shown in FIG. 5, the Au foil is pressure-bonded onto the first Au film 5 by the rubber roller 30. In a continuous heating atmosphere furnace, in an atmosphere of H 2 : N 2 = 1: 1,
The substrate 1 on which each film is formed is heat-treated at 50 ° C. for 10 minutes. As a result, the Ni film 3 is separated from the W film 2 and the first Au film.
Interdiffusion with the film 5 and the second Au film 6 improves the adhesion between the films. Since the heat treatment is performed in a reducing atmosphere of H 2 / N 2 , the Ni diffused on the surface of the second Au film 6 is
It can also prevent the oxidation of plating.
【００１７】つぎに、基板１の表面に、研磨剤を高圧で
吹き付けるサンドブラストを施し、図２（ｂ）ように、
配線パターンの間に残った金箔を除去し、図２（ｃ）の
ように、セラミック基板１上に、Ｗ膜２とＮｉ膜３と第
１のＡｕ膜５と第２のＡｕ膜６から構成から、配線パタ
ーンおよび接続パッドを完成させる。配線パターン間の
金箔は、セラミック基板１に直接接触しており、熱処理
を施してもセラミック基板１に拡散することがないの
で、サンドブラストによって容易に取り除くことができ
る。Next, the surface of the substrate 1 is sandblasted by spraying an abrasive at a high pressure, as shown in FIG. 2 (b).
The gold foil remaining between the wiring patterns is removed, and as shown in FIG. 2C, a W film 2, a Ni film 3, a first Au film 5 and a second Au film 6 are formed on the ceramic substrate 1. Then, the wiring pattern and the connection pad are completed. Since the gold foil between the wiring patterns is in direct contact with the ceramic substrate 1 and does not diffuse into the ceramic substrate 1 even if heat treatment is performed, it can be easily removed by sandblasting.
【００１８】このように本実施例の接続パッド製造方法
では、第２のＡｕ膜６を、金箔を圧着させることによっ
て、従来の様に還元型無電解めっき法を用いることなく
形成することを可能にしている。従来の還元型めっき法
では、めっきを行なう表面の汚染や、めっき液内異物に
より、局所的にＡｕめっき膜が析出せず、接続パッドの
最表層のＡｕ膜に欠陥が生じてしまうという問題があっ
た。本実施例では、欠陥のない金箔を用いることによ
り、第２のＡｕ膜６に欠陥のない接続信頼性の高い接続
パッドを形成することができる。このような、欠陥のな
い金箔を製造する技術は、古くから十分に研究されてお
り、本実施例に用いる厚さ１〜２μｍ程度の欠陥のない
金箔を、容易に入手することができる。As described above, in the method of manufacturing the connection pad of this embodiment, the second Au film 6 can be formed by pressing the gold foil without using the reduction type electroless plating method as in the conventional case. I have to. In the conventional reduction plating method, there is a problem in that the Au plating film is not locally deposited due to contamination of the surface to be plated or foreign matter in the plating solution, and a defect occurs in the Au film as the outermost layer of the connection pad. there were. In this embodiment, by using a gold foil having no defect, a connection pad having no defect and having high connection reliability can be formed on the second Au film 6. Techniques for producing such a defect-free gold foil have been well studied for a long time, and a defect-free gold foil having a thickness of about 1 to 2 μm used in this example can be easily obtained.
【００１９】また、本実施例の製造方法では、別の手段
で形成された金箔を、予め検査して、欠陥のないことを
確認してから、接続パッドの形成に用いることができる
ので、接続パッドの歩留まりを向上させることができ
る。Further, in the manufacturing method of this embodiment, the gold foil formed by another means can be used for forming the connection pad after being inspected in advance to confirm that there is no defect. The pad yield can be improved.
【００２０】本実施例では、７５０℃で１０分間加熱処
理を施して、各膜間を相互拡散させて、密着性を向上さ
せたが、この温度と時間に限定されるものではない。本
実施例の接続パッドの製造方法においては、約６５０℃
〜８５０℃で５分から１５分間の加熱処理が適してい
る。加熱温度は、Ｎｉの拡散スピードに密接に関係して
いる。７５０℃で１０分間加熱処理した場合、Ｗ膜２と
Ｎｉ膜３の間に、Ｎｉ膜とＷ膜とが相互拡散した層が、
約０．８μｍ形成される。温度が６５０度より低い場合
には、拡散速度が低下するので、加熱処理時間を長くす
ることによって、密着性を向上させることができる。ま
た、加熱温度が８５０度より高くなると、Ｎｉの拡散速
度が高くなり、第２のＡｕ膜６の表面すなわち接続パッ
ドの表面に過度にＮｉが拡散するので、Ｎｉの酸化等の
問題を引き起こしやすくなる。In this embodiment, heat treatment was performed at 750 ° C. for 10 minutes to cause mutual diffusion between the films to improve adhesion, but the temperature and time are not limited. In the method of manufacturing the connection pad of this embodiment, the temperature is about 650 ° C.
Heat treatment at 850 ° C. for 5 to 15 minutes is suitable. The heating temperature is closely related to the diffusion speed of Ni. When the heat treatment is performed at 750 ° C. for 10 minutes, a layer in which the Ni film and the W film interdiffuse is formed between the W film 2 and the Ni film 3.
About 0.8 μm is formed. When the temperature is lower than 650 ° C., the diffusion rate decreases, so that the adhesion can be improved by increasing the heat treatment time. Further, when the heating temperature is higher than 850 ° C., the diffusion rate of Ni becomes high and Ni is excessively diffused on the surface of the second Au film 6, that is, the surface of the connection pad, so that problems such as Ni oxidation are likely to occur. Become.
【００２１】また、図１、および、図２（ｂ）（ｃ）で
は、各膜間の境界を明確に描いているが、加熱処理によ
り、第１のＡｕ膜５と第２のＡｕ膜６とは、密着するの
で、実際の接続パッドを切断した断面を目視で観察した
場合、１つのＡｕ膜のようにみえる。また、Ｎｉ膜３と
第１のＡｕ膜５との境界、および、Ｗ膜２とＮｉ膜３と
の境界には、それぞれ相互拡散層が観察される。Although the boundaries between the films are clearly drawn in FIG. 1 and FIGS. 2B and 2C, the first Au film 5 and the second Au film 6 are formed by the heat treatment. Since they are in close contact with each other, when a cross section obtained by cutting an actual connection pad is visually observed, it looks like one Au film. Further, interdiffusion layers are observed at the boundary between the Ni film 3 and the first Au film 5 and at the boundary between the W film 2 and the Ni film 3, respectively.
【００２２】（実施例２）つぎに、図４を用いて、本発
明の別の実施例である接続パッド製造方法を示す。(Embodiment 2) Next, referring to FIG. 4, a method of manufacturing a connection pad according to another embodiment of the present invention will be described.
【００２３】セラミック基板１上に、Ｗ膜２と、Ｎｉ膜
３と、第１のＡｕ膜５を形成する方法までは、前述の実
施例と同一であるので説明を省略する。本実施例では、
Ａｕ膜５を施した後、チオ尿素を還元剤とした還元型無
電解めっき法により、厚付けＡｕ膜７を施す。The method up to the method of forming the W film 2, the Ni film 3 and the first Au film 5 on the ceramic substrate 1 is the same as that of the above-mentioned embodiment, and therefore its explanation is omitted. In this example,
After the Au film 5 is applied, the thick Au film 7 is applied by a reduction type electroless plating method using thiourea as a reducing agent.
【００２４】厚付けＡｕめっき膜５には、めっき前ある
いはめっき中の異物により局部的にＡｕめっき膜の形成
されない欠陥を生じる部分がある。この部分にあらかじ
め欠陥の大きさに加工した金箔８をのせ、ゴムローラに
より圧着する。その後は、前述の実施例と同様の熱処理
を施し配線パターン金属膜が完成する。The thick Au plated film 5 has a portion where a defect in which the Au plated film is not formed is locally caused by foreign matter before or during plating. A gold foil 8 previously processed to have a defect size is placed on this portion and pressure-bonded by a rubber roller. After that, the same heat treatment as in the above-described embodiment is performed to complete the wiring pattern metal film.
【００２５】このように、本実施例の接続パッドの製造
方法を用いることにより、従来の還元型無電解めっきに
よって生じたＡｕ膜の欠陥に補修を施し、欠陥のない接
続パッドを形成することができる。したがって本実施例
の接続パッド製造方法を用いることにより、歩留まりを
向上させることができる。As described above, by using the method of manufacturing the connection pad of the present embodiment, the defect of the Au film caused by the conventional reduction type electroless plating can be repaired and the connection pad having no defect can be formed. it can. Therefore, the yield can be improved by using the connection pad manufacturing method of the present embodiment.
【００２６】（実施例３）つぎに、上述の実施例１、２
により形成したセラミック基板１および接続パッド９を
用いた電子部品の実装例を図４を用いて説明する。(Third Embodiment) Next, the above-mentioned first and second embodiments will be described.
A mounting example of an electronic component using the ceramic substrate 1 and the connection pad 9 formed by the above will be described with reference to FIG.
【００２７】セラミック基板１は、配線パターンをタン
グステンにより印刷したグリーンシートを積層して焼結
した内層とスルーホールとを有するものを用いた。基板
１の両面に接続パッド９を形成した。接続パッド９の製
造方法は実施例１および２で説明したので、説明を省略
する。As the ceramic substrate 1, one having a through hole and an inner layer obtained by stacking and sintering green sheets having a wiring pattern printed with tungsten was used. The connection pads 9 were formed on both surfaces of the substrate 1. Since the method of manufacturing the connection pad 9 has been described in the first and second embodiments, the description thereof will be omitted.
【００２８】基板１の上面の接続パッド９に、Ｓｎ−Ａ
ｇ半田１０ａにより、半導体チップ１２を接続する。ま
た、基板１の裏面の接続パッド９に、Ａｕ−Ｇｅろう材
１０ｂにより入出力ピン１３を接続する。その後、設計
変更に伴う回路の一部変更を行なうための配線パターン
にボンディングワイヤ１１を接続する。その後、半導体
チップ１２を気密封止するために、基板１の端部の接続
パッド９上に、Ｐｂ−Ｓｎ半田１０ｃにより封止キャッ
プ１４を接続する。On the connection pad 9 on the upper surface of the substrate 1, Sn-A
The semiconductor chip 12 is connected by the solder 10a. Further, the input / output pin 13 is connected to the connection pad 9 on the back surface of the substrate 1 by the Au-Ge brazing material 10b. After that, the bonding wire 11 is connected to a wiring pattern for partially changing the circuit due to the design change. After that, in order to hermetically seal the semiconductor chip 12, the sealing cap 14 is connected to the connection pad 9 at the end of the substrate 1 by the Pb-Sn solder 10c.
【００２９】実施例１または２により、形成した接続パ
ッドは、最上層のＡｕ膜に欠陥がないので、半田やろう
材やボンディングによる接続において、接続不良が発生
せず、信頼性が高く、かつ、歩留まり良く、電子部品を
実装することができる。In the connection pad formed according to the first or second embodiment, since the uppermost Au film has no defect, no connection failure occurs in connection by solder, brazing material, or bonding, and reliability is high, and The yield is good, and electronic components can be mounted.
【００３０】上述の実施例１、２では、置換型無電解め
っき法により、第１のＡｕ膜５を形成したが、この方法
に限定されるものではなく、蒸着等の気相成長法で、第
１のＡｕ膜５を形成しても良い。この場合、第１のＡｕ
膜５を形成したくない部分には、予めレジストを塗布し
ておくか、または基板全面にＡｕ膜を形成した後、リソ
グラフィ法により不要なＡｕ膜を取り除く工程を加え
る。In the above-mentioned Examples 1 and 2, the first Au film 5 was formed by the displacement type electroless plating method, but the present invention is not limited to this method, and vapor phase growth methods such as vapor deposition may be used. The first Au film 5 may be formed. In this case, the first Au
A resist is applied in advance to a portion where the film 5 is not formed, or a step of removing an unnecessary Au film by a lithography method is added after forming an Au film on the entire surface of the substrate.
【００３１】また、実施例１、２では、ゴムローラによ
って、金箔を圧着したが、熱を加えながら、金箔を圧着
することも可能である。In the first and second embodiments, the gold foil is pressure-bonded by the rubber roller, but it is also possible to pressure-bond the gold foil while applying heat.
【００３２】[0032]
【発明の効果】本発明により、セラミック配線基板の接
続パッドの表面層である金膜の欠陥を無くし、接続信頼
性の高い接続パッドを形成することができる。According to the present invention, it is possible to eliminate the defects of the gold film which is the surface layer of the connection pads of the ceramic wiring board and form the connection pads with high connection reliability.
【図１】本発明の一実施例によるセラミック配線基板の
接続パッドの断面図。FIG. 1 is a sectional view of a connection pad of a ceramic wiring board according to an embodiment of the present invention.
【図２】本発明の一実施例の接続パッドの製造方法の手
順を示す断面図。FIG. 2 is a cross-sectional view showing a procedure of a method of manufacturing a connection pad according to an embodiment of the present invention.
【図３】本発明の別の実施例によるセラミック配線基板
の接続パッドの断面図。FIG. 3 is a sectional view of a connection pad of a ceramic wiring board according to another embodiment of the present invention.
【図４】本発明によるセラミック配線基板を用いた実相
例を示す断面図。FIG. 4 is a sectional view showing an actual phase example using a ceramic wiring board according to the present invention.
【図５】本発明の一実施例における金箔の圧着方法を示
す説明図。FIG. 5 is an explanatory view showing a gold foil pressure bonding method according to an embodiment of the present invention.
１…セラミック基板、２…Ｗ膜、３…Ｎｉ膜、５…第１
のＡｕ膜、６…第２のＡｕ膜、７…還元型無電解めっき
により形成したＡｕ膜、８…金箔を圧着して形成した金
膜セラミック基板、９…表面配線パターン、１０ａ、
ｂ、ｃ…部品接続用ろう材、１１…ボンディングワイ
ヤ、１２…半導体チップ、１３…入出力ピン、１４…封
止キャップ。1 ... Ceramic substrate, 2 ... W film, 3 ... Ni film, 5 ... First
Au film, 6 ... Second Au film, 7 ... Au film formed by reduction electroless plating, 8 ... Gold film ceramic substrate formed by pressure bonding of gold foil, 9 ... Surface wiring pattern, 10a,
b, c ... Brazing material for component connection, 11 ... Bonding wire, 12 ... Semiconductor chip, 13 ... Input / output pin, 14 ... Sealing cap.
Claims (6)
成し、 前記下地膜上に、置換型無電解めっき法により、第１の
金膜を積層し、 前記基板上の配線領域に金箔を置いて圧着処理をするこ
とにより、前記第１の金膜上に第２の金膜を形成するこ
とを特徴とする配線基板の接続パッドの製造方法。1. A wiring layer formed on a substrate by forming a base film on a wiring formed on a substrate, laminating a first gold film on the base film by a substitution electroless plating method. A method of manufacturing a connection pad of a wiring board, comprising forming a second gold film on the first gold film by placing a gold foil on the substrate and performing a pressure bonding process.
すことを特徴とする配線基板の接続パッドの製造方法。2. The method of manufacturing a connection pad of a wiring board according to claim 1, further comprising heat treatment.
第１の金膜に圧着されていない部分を取り除くことを特
徴とする配線基板の接続パッド製造方法。3. The method for manufacturing a connection pad of a wiring board according to claim 2, wherein a portion of the gold foil that is not pressure-bonded to the first gold film is removed.
いて、前記金箔を取り除くことを特徴とする配線基板の
接続パッド製造方法。4. The method of manufacturing a connection pad of a wiring board according to claim 3, wherein the gold foil is removed by using a sandblast method.
ル膜であることを特徴とする配線基板の接続パッド製造
方法。5. The method for manufacturing a connection pad of a wiring board according to claim 1, wherein the base film is a nickel film.
成し、 前記下地膜上に、置換型無電解めっき法により、第１の
金膜を積層し、 前記第１の金膜上に還元型無電解めっき法により、めっ
き金膜を積層し、 前記めっき金膜が析出しなかった部分のみに、金箔を置
いて圧着処理をすることにより、前記めっき金膜のめっ
き金膜が析出しなかった部分を補修することを特徴とす
る配線基板の接続パッドの製造方法。6. A base film is formed on a wiring formed on a substrate, and a first gold film is laminated on the base film by a substitution type electroless plating method. By a reduction type electroless plating method, a plated gold film is laminated, and only the part where the plated gold film is not deposited is subjected to pressure treatment by placing a gold foil, whereby the plated gold film of the plated gold film is formed. A method of manufacturing a connection pad of a wiring board, which comprises repairing a portion which has not been deposited.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP11498792A JP2708322B2 (en) | 1992-05-07 | 1992-05-07 | Method of manufacturing connection pad of wiring board |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP11498792A JP2708322B2 (en) | 1992-05-07 | 1992-05-07 | Method of manufacturing connection pad of wiring board |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| JPH05315731A true JPH05315731A (en) | 1993-11-26 |
| JP2708322B2 JP2708322B2 (en) | 1998-02-04 |
Family
ID=14651538
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP11498792A Expired - Fee Related JP2708322B2 (en) | 1992-05-07 | 1992-05-07 | Method of manufacturing connection pad of wiring board |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JP2708322B2 (en) |
Cited By (9)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPH08335602A (en) * | 1995-06-08 | 1996-12-17 | Ngk Spark Plug Co Ltd | Ceramic substrate and its manufacturing method |
| JPH09232392A (en) * | 1996-02-22 | 1997-09-05 | Rohm Co Ltd | Semiconductor device provided with semiconductor chip, semiconductor chip and method for repairing function test trace for the chip |
| JPH1050751A (en) * | 1996-07-30 | 1998-02-20 | Kyocera Corp | Method for bonding thin bonding wire |
| JPH10242205A (en) * | 1997-03-03 | 1998-09-11 | Hitachi Chem Co Ltd | Wire bonding terminal and manufacture thereof |
| JPH10242327A (en) * | 1997-02-27 | 1998-09-11 | Sumitomo Kinzoku Electro Device:Kk | Electrode structure of ceramic package and manufacturing method thereof |
| JP2000307091A (en) * | 1999-04-19 | 2000-11-02 | Sharp Corp | Manufacture of light or radiation detecting device and two-dimensional image detector |
| US6998714B2 (en) * | 1999-08-25 | 2006-02-14 | Micron Technology, Inc. | Selectively coating bond pads |
| JP2016156034A (en) * | 2015-02-23 | 2016-09-01 | 三菱マテリアル株式会社 | ELECTROLESS Ni PLATING METHOD |
| JP2018142665A (en) * | 2017-02-28 | 2018-09-13 | 株式会社村田製作所 | Correction method of structure |
-
1992
- 1992-05-07 JP JP11498792A patent/JP2708322B2/en not_active Expired - Fee Related
Cited By (9)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPH08335602A (en) * | 1995-06-08 | 1996-12-17 | Ngk Spark Plug Co Ltd | Ceramic substrate and its manufacturing method |
| JPH09232392A (en) * | 1996-02-22 | 1997-09-05 | Rohm Co Ltd | Semiconductor device provided with semiconductor chip, semiconductor chip and method for repairing function test trace for the chip |
| JPH1050751A (en) * | 1996-07-30 | 1998-02-20 | Kyocera Corp | Method for bonding thin bonding wire |
| JPH10242327A (en) * | 1997-02-27 | 1998-09-11 | Sumitomo Kinzoku Electro Device:Kk | Electrode structure of ceramic package and manufacturing method thereof |
| JPH10242205A (en) * | 1997-03-03 | 1998-09-11 | Hitachi Chem Co Ltd | Wire bonding terminal and manufacture thereof |
| JP2000307091A (en) * | 1999-04-19 | 2000-11-02 | Sharp Corp | Manufacture of light or radiation detecting device and two-dimensional image detector |
| US6998714B2 (en) * | 1999-08-25 | 2006-02-14 | Micron Technology, Inc. | Selectively coating bond pads |
| JP2016156034A (en) * | 2015-02-23 | 2016-09-01 | 三菱マテリアル株式会社 | ELECTROLESS Ni PLATING METHOD |
| JP2018142665A (en) * | 2017-02-28 | 2018-09-13 | 株式会社村田製作所 | Correction method of structure |
Also Published As
| Publication number | Publication date |
|---|---|
| JP2708322B2 (en) | 1998-02-04 |
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