JPH10289973A - Surface treatment method of lead frame - Google Patents
Surface treatment method of lead frameInfo
- Publication number
- JPH10289973A JPH10289973A JP9917897A JP9917897A JPH10289973A JP H10289973 A JPH10289973 A JP H10289973A JP 9917897 A JP9917897 A JP 9917897A JP 9917897 A JP9917897 A JP 9917897A JP H10289973 A JPH10289973 A JP H10289973A
- Authority
- JP
- Japan
- Prior art keywords
- lead frame
- layer
- plating
- plating layer
- sealing resin
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/26—Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
- H01L2224/31—Structure, shape, material or disposition of the layer connectors after the connecting process
- H01L2224/32—Structure, shape, material or disposition of the layer connectors after the connecting process of an individual layer connector
- H01L2224/321—Disposition
- H01L2224/32151—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
- H01L2224/32221—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
- H01L2224/32245—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
- H01L2224/481—Disposition
- H01L2224/48151—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
- H01L2224/48221—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
- H01L2224/48245—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic
- H01L2224/48247—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic connecting the wire to a bond pad of the item
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/73—Means for bonding being of different types provided for in two or more of groups H01L2224/10, H01L2224/18, H01L2224/26, H01L2224/34, H01L2224/42, H01L2224/50, H01L2224/63, H01L2224/71
- H01L2224/732—Location after the connecting process
- H01L2224/73251—Location after the connecting process on different surfaces
- H01L2224/73265—Layer and wire connectors
Landscapes
- Laminated Bodies (AREA)
- Other Surface Treatments For Metallic Materials (AREA)
- Lead Frames For Integrated Circuits (AREA)
Abstract
Description
【０００１】[0001]
【発明の属する技術分野】本発明は、半導体素子を搭載
したパッケージの製造に用いられるリードフレームの表
面処理方法に関する。BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a method for treating a surface of a lead frame used for manufacturing a package on which a semiconductor element is mounted.
【０００２】[0002]
【従来の技術】ＩＣ等の半導体素子をリードフレーム上
に搭載して半導体素子を樹脂封止してなるパッケージの
製造においては、まず、Ｃｕ等からなるリードフレーム
素材に必要に応じて所定の表面処理を施し、そのリード
フレームのダイパッド上に半導体素子をＡｇペーストを
用いてダイボンディングし、半導体素子の電極パッドと
インナーリードとをワイヤボンディングし、その後半導
体素子を樹脂封止する。2. Description of the Related Art In the manufacture of a package in which a semiconductor element such as an IC is mounted on a lead frame and the semiconductor element is sealed with a resin, first, a lead frame material made of Cu or the like has a predetermined surface if necessary. The semiconductor element is die-bonded on the die pad of the lead frame using an Ag paste, the electrode pad of the semiconductor element and the inner lead are wire-bonded, and then the semiconductor element is sealed with a resin.
【０００３】通常、樹脂封止前のリードフレームにおい
ては、半導体素子表面に電極材料であるＡｌやパッシベ
ーション膜の材料が露出しており、リードフレームのイ
ンナーリード部の表裏面やダイパッド部の裏面（半導体
素子搭載面と反対側の面）にはＣｕが露出している。Normally, in a lead frame before resin encapsulation, Al which is an electrode material and a material for a passivation film are exposed on the surface of the semiconductor element, and the front and back surfaces of inner lead portions of the lead frame and the back surface of the die pad portion (see FIG. 1). Cu is exposed on the surface opposite to the semiconductor element mounting surface).
【０００４】このような半導体素子を搭載したリードフ
レームを樹脂封止してパッケージを作製し、このパッケ
ージをリフロー工程に供する場合、リードフレーム上に
露出したＡｌやパッシベーション膜の材料、Ｃｕと封止
樹脂との間の密着性が比較的良いので、別段問題は生じ
ない。When a package is manufactured by sealing a lead frame on which such a semiconductor element is mounted with a resin, and the package is subjected to a reflow process, the material exposed to the lead frame on the lead frame, the material of the passivation film, and Cu are sealed. Since the adhesion to the resin is relatively good, no particular problem occurs.
【０００５】[0005]
【発明が解決しようとする課題】しかしながら、リード
フレーム素材への表面処理において、複数のメッキ処理
がなされ、結果としてＡｕ層が最外層となる場合には、
樹脂封止してもＡｕと封止樹脂との間の密着性が悪いた
めにＡｕと封止樹脂との間で湿気を吸収してしまう。こ
のように吸湿した部分を有するリードフレームを用いて
パッケージを作製し、このパッケージをリフロー工程に
供すると、パッケージに膨れやクラックが発生する、い
わゆるポップコーン現象が起こる。このようなパッケー
ジは信頼性に欠け、電気部品として使用できないものと
なる。However, when a plurality of plating processes are performed in the surface treatment of the lead frame material, and as a result, the Au layer becomes the outermost layer,
Even with resin sealing, moisture is absorbed between Au and the sealing resin due to poor adhesion between Au and the sealing resin. When a package is manufactured using a lead frame having a portion that has absorbed moisture as described above and the package is subjected to a reflow process, a so-called popcorn phenomenon occurs in which the package swells and cracks occur. Such a package lacks reliability and cannot be used as an electric component.
【０００６】本発明はかかる点に鑑みてなされたもので
あり、信頼性の高いパッケージを得るために好適なリー
ドフレームの表面処理方法を提供することを目的とす
る。SUMMARY OF THE INVENTION The present invention has been made in view of the above circumstances, and has as its object to provide a lead frame surface treatment method suitable for obtaining a highly reliable package.
【０００７】[0007]
【課題を解決するための手段】上記課題を解決するため
に、以下の手段を講じた。本発明は、半導体素子を搭載
して樹脂封止する際に使用されるリードフレームのメッ
キ方法であって、ダイパッド部を有するリードフレーム
素材上に最外層がＡｕ層となるようにメッキ処理を施す
メッキ処理工程と、樹脂封止時に封止樹脂と接触するＡ
ｕ層上に相対的に封止樹脂と密着性が良い材料の層を形
成する層形成工程とを具備することを特徴とするリード
フレームの表面処理方法を提供する。Means for Solving the Problems In order to solve the above problems, the following measures have been taken. The present invention relates to a method for plating a lead frame used when a semiconductor element is mounted and sealed with a resin, wherein plating is performed on a lead frame material having a die pad portion so that an outermost layer is an Au layer. A plating process and A contacting the sealing resin during resin sealing
a layer forming step of forming a layer of a material having good adhesion to the sealing resin on the u-layer.
【０００８】この構成によれば、Ａｕ層上に相対的に封
止樹脂の材料と密着性が良い材料の層を形成するので、
Ａｕと封止樹脂とが直接接触することがなく、封止樹脂
の材料と密着性が良い材料と封止樹脂とが接触するの
で、樹脂封止後にリードフレームと封止樹脂との間で吸
湿が起こることを防止する。これにより、リフロー工程
におけるパッケージのポップコーン現象の発生を回避す
ることができる。According to this structure, a layer of a material having good adhesion to the sealing resin material is formed on the Au layer.
Au and the sealing resin do not come into direct contact with each other, and a material having good adhesion to the sealing resin and the sealing resin come into contact with each other. Therefore, moisture is absorbed between the lead frame and the sealing resin after resin sealing. To prevent from happening. Thereby, it is possible to avoid the occurrence of the popcorn phenomenon of the package in the reflow process.
【０００９】[0009]
【発明の実施の形態】以下、本発明のリードフレームの
表面処理方法を添付図面を参照して詳細に説明する。本
発明のリードフレームの表面処理方法は、ダイパッド部
を有するリードフレーム素材上に最外層がＡｕ層となる
ようにメッキ処理を施すメッキ処理工程と、樹脂封止時
に封止樹脂と接触するＡｕ層上に相対的に封止樹脂の材
料と密着性が良い材料の層を形成する層形成工程とを具
備することを特徴としている。DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS Hereinafter, a method for treating a surface of a lead frame according to the present invention will be described in detail with reference to the accompanying drawings. The lead frame surface treatment method of the present invention includes a plating step of plating a lead frame material having a die pad portion so that an outermost layer becomes an Au layer; And a layer forming step of forming a layer of a material having good adhesion to the sealing resin material.
【００１０】本発明において、リードフレーム素材とし
ては、Ｃｕ材，４２アロイ材等を挙げることができる。
また、相対的に封止樹脂と密着性が良い材料としては、
Ｃｕ，Ｎｉ，Ｐｄ等を挙げることができる。また、層形
成工程としては、メッキ処理工程、蒸着工程等を挙げる
ことができる。特に、層形成工程としては、Ｃｕメッキ
処理工程であることが好ましい。この場合、Ｃｕメッキ
処理工程における条件については、通常の条件を採用す
ることができる。なお、本発明において、封止樹脂と密
着性が良いとは、例えば１２０℃、８５％ＲＨで９０日
間放置しても半田付け時にポップコーン現象での欠陥が
ないことを意味する。In the present invention, examples of the lead frame material include a Cu material and a 42 alloy material.
Also, as a material having relatively good adhesion to the sealing resin,
Cu, Ni, Pd and the like can be mentioned. Further, examples of the layer forming step include a plating step, a vapor deposition step, and the like. In particular, the layer forming step is preferably a Cu plating step. In this case, as the conditions in the Cu plating process, ordinary conditions can be adopted. In the present invention, good adhesion to the sealing resin means that there is no defect due to the popcorn phenomenon at the time of soldering even when left at, for example, 120 ° C. and 85% RH for 90 days.
【００１１】なお、形成された層は、相対的に封止樹脂
と密着性が良い材料が存在していれば良いので、非孔質
であっても、多孔質（ポーラス）であっても良い。ま
た、形成された層の厚さには制限はない。The formed layer may be non-porous or porous, as long as a material having good adhesion to the sealing resin is present. . Further, the thickness of the formed layer is not limited.
【００１２】本発明において、層形成工程において層形
成を行う領域は、封止樹脂と接触する領域、すなわちダ
イパッド部裏面（半導体素子搭載面と反対の面）及びイ
ンナーリード部両面を含むパッケージエリアに設定す
る。特に、Ａｕ層が比較的広いダイパッド部裏面に層形
成することが好ましい。In the present invention, the region in which the layer is formed in the layer forming step is a region in contact with the sealing resin, that is, a package area including the back surface of the die pad portion (the surface opposite to the semiconductor device mounting surface) and both surfaces of the inner lead portion. Set. In particular, it is preferable to form a layer on the back surface of the die pad portion where the Au layer is relatively wide.
【００１３】本発明において、リードフレーム素材上に
最外層がＡｕ層となるようにメッキ処理を施すメッキ処
理工程においては、最外層がＡｕ層となるような処理で
あれば、リードフレーム素材上に複数のメッキ処理を施
しても良い。例えば、リードフレーム素材と最外層であ
るＡｕ層との間にＮｉメッキ層、Ｐｄメッキ層等を設け
ても良い。この場合、中間の層の順序や厚さに制限はな
い。In the present invention, in the plating step of plating the lead frame material such that the outermost layer becomes an Au layer, if the plating process is such that the outermost layer becomes an Au layer, the plating process is performed on the lead frame material. A plurality of plating processes may be performed. For example, a Ni plating layer, a Pd plating layer, or the like may be provided between the lead frame material and the Au layer as the outermost layer. In this case, the order and thickness of the intermediate layers are not limited.
【００１４】本発明において、封止樹脂としては、エポ
キシ樹脂、ポリイミド樹脂、フェノール樹脂、シリコー
ン樹脂等を挙げることができる。In the present invention, examples of the sealing resin include an epoxy resin, a polyimide resin, a phenol resin, and a silicone resin.
【００１５】次に、本発明の効果を明確にするために行
った実施例について説明する。まず、図１に示すような
ダイパッド部１ａ及びインナーリード部１ｂを有するＣ
ｕ製のリードフレーム素材１全面にＮｉメッキ処理を施
してリードフレーム素材１上に厚さ１．０μｍのＮｉメ
ッキ層を形成した。この場合のＮｉメッキ処理は、リー
ドフレーム素材１を処理液に浸漬して通電した状態で４
０〜５０℃、５分で行った。なお、前記条件は、形成す
るＮｉメッキ層の厚さや処理液の濃度に応じて適宜変更
する。Next, an embodiment performed to clarify the effect of the present invention will be described. First, as shown in FIG. 1, C having a die pad portion 1a and an inner lead portion 1b
A nickel plating layer having a thickness of 1.0 μm was formed on the entire surface of the lead frame material 1 by subjecting the entire surface of the lead frame material 1 made of u to Ni plating. In this case, the Ni plating process is performed by immersing the lead frame material 1 in a processing solution and energizing the lead frame material.
Performed at 0 to 50 ° C for 5 minutes. The above conditions are appropriately changed according to the thickness of the Ni plating layer to be formed and the concentration of the processing solution.
【００１６】次いで、Ｎｉメッキ層を有するリードフレ
ーム素材１全面にＰｄメッキ処理を施してＮｉメッキ層
上に厚さ０．１μｍのＰｄメッキ層を形成した。この場
合のＰｄメッキ処理は、Ｎｉメッキ層を有するリードフ
レーム素材を処理液に浸漬して通電した状態で６０℃、
１分で行った。なお、前記条件は、形成するＰｄメッキ
層の厚さや処理液の濃度に応じて適宜変更する。Next, Pd plating was applied to the entire surface of the lead frame material 1 having a Ni plating layer to form a Pd plating layer having a thickness of 0.1 μm on the Ni plating layer. In this case, the Pd plating process is performed by immersing a lead frame material having a Ni plating layer in a processing solution and energizing the lead frame material at 60 ° C.
It took one minute. The above conditions are appropriately changed according to the thickness of the Pd plating layer to be formed and the concentration of the processing solution.
【００１７】次いで、Ｎｉメッキ層及びＰｄメッキ層を
有するリードフレーム素材１全面にＡｕメッキ処理を施
してＰｄメッキ層上に厚さ０．００５μｍのＡｕメッキ
層を形成した。この場合のＡｕメッキ処理は、Ｎｉメッ
キ層及びＰｄメッキ層を有するリードフレーム素材を処
理液に浸漬して通電した状態で４０℃、０．５分で行っ
た。なお、前記条件は、形成するＡｕメッキ層の厚さや
処理液の濃度に応じて適宜変更する。Next, an Au plating process was applied to the entire surface of the lead frame material 1 having a Ni plating layer and a Pd plating layer to form a 0.005 μm thick Au plating layer on the Pd plating layer. In this case, the Au plating treatment was performed at 40 ° C. for 0.5 minutes while the lead frame material having the Ni plating layer and the Pd plating layer was immersed in the treatment liquid and energized. The above conditions are appropriately changed depending on the thickness of the Au plating layer to be formed and the concentration of the processing solution.
【００１８】次いで、Ｎｉメッキ層、Ｐｄメッキ層、及
びＡｕメッキ層を有するリードフレーム素材１のダイパ
ッド部１ａの裏面及びインナーリード部１ｂの両面にス
ポットＣｕメッキ処理を施してＡｕメッキ層上に厚さ
１．０μｍのＣｕメッキ層を形成した。この場合のＣｕ
メッキ処理は、Ｎｉメッキ層、Ｐｄメッキ層、及びＡｕ
メッキ層を有するリードフレーム素材を処理液に浸漬し
て通電した状態で６０℃、３分で行った。なお、前記条
件は、形成するＣｕメッキ層の厚さや処理液の濃度に応
じて適宜変更する。このＣｕメッキ層は、相対的に封止
樹脂と密着性が良い材料の層である。Next, spot Cu plating is applied to the back surface of the die pad portion 1a and both surfaces of the inner lead portion 1b of the lead frame material 1 having a Ni plating layer, a Pd plating layer, and an Au plating layer to form a thick layer on the Au plating layer. A Cu plating layer having a thickness of 1.0 μm was formed. Cu in this case
The plating process includes a Ni plating layer, a Pd plating layer, and an Au plating layer.
This was carried out at 60 ° C. for 3 minutes in a state where the lead frame material having the plating layer was immersed in the treatment liquid and energized. The above conditions are appropriately changed according to the thickness of the Cu plating layer to be formed and the concentration of the processing solution. This Cu plating layer is a layer of a material having relatively good adhesion to the sealing resin.
【００１９】このようにして得られたリードフレームの
ダイパッド部の裏面及びインナーリード部の両面は、そ
れぞれ図２に示すように、リードフレーム素材１上に、
Ｎｉメッキ層２、Ｐｄメッキ層３、Ａｕメッキ層４、及
びＣｕメッキ層５が順次形成された構成を有している。As shown in FIG. 2, the back surface of the die pad portion and both surfaces of the inner lead portion of the lead frame thus obtained are respectively placed on the lead frame material 1 as shown in FIG.
It has a configuration in which a Ni plating layer 2, a Pd plating layer 3, an Au plating layer 4, and a Cu plating layer 5 are sequentially formed.
【００２０】次いで、図３に示すように、得られたリー
ドフレーム６ダイパッド部にＡｇペースト７を供給し、
その上に半導体素子であるチップ８を搭載し、チップ８
の電極パッド（図示せず）とリードフレーム６のインナ
ーリード部との間をワイヤ９を用いてワイヤボンディン
グし、封止樹脂１０により樹脂封止してパッケージを作
製した。なお、樹脂封止は図１に示すモールドエリアＸ
に対して行った。Next, as shown in FIG. 3, an Ag paste 7 is supplied to the obtained lead frame 6 die pad portion,
A chip 8 as a semiconductor element is mounted thereon, and the chip 8
The wire between the electrode pad (not shown) and the inner lead portion of the lead frame 6 was wire-bonded using a wire 9 and resin-sealed with a sealing resin 10 to produce a package. The resin sealing is performed in the mold area X shown in FIG.
Went against.
【００２１】このようにして作製されたパッケージをプ
リント配線板に搭載してリフロー工程に供したところ、
封止樹脂１０とＣｕメッキ層５との間の密着性が良好で
あるために、両者の間に湿気が吸収されておらず、ポッ
プコーン現象は確認されず、プリント配線板上にパッケ
ージを良好に実装することができた。なお、リードフレ
ームのダイパッド部の表面には、Ｃｕメッキ層５が形成
されていないが、電極材料であるＡｌやパッシベーショ
ン膜の材料が露出しており、封止樹脂と密着性が良好で
あるので、吸湿によるポップコーン現象は起こらない。The package thus manufactured was mounted on a printed wiring board and subjected to a reflow process.
Since the adhesion between the sealing resin 10 and the Cu plating layer 5 is good, moisture is not absorbed between the two, the popcorn phenomenon is not confirmed, and the package is well placed on the printed wiring board. Could be implemented. Although the Cu plating layer 5 is not formed on the surface of the die pad portion of the lead frame, Al, which is an electrode material, and the material of the passivation film are exposed and have good adhesion to the sealing resin. The popcorn phenomenon due to moisture absorption does not occur.
【００２２】実際に、本発明の表面処理方法で得られた
リードフレームを用いて作製されたパッケージは、最外
層のＡｕメッキ層上にＣｕメッキ層を設けないで得られ
たリードフレームを用いて作製されたパッケージに比べ
てポップコーン現象による不良率が１００％程度低減さ
れた。Actually, a package manufactured using a lead frame obtained by the surface treatment method of the present invention uses a lead frame obtained without providing a Cu plating layer on the outermost Au plating layer. The defective rate due to the popcorn phenomenon was reduced by about 100% as compared with the manufactured package.
【００２３】上記実施形態においては、相対的に封止樹
脂と密着性が良好である層としてＣｕメッキ層を用いた
場合について説明しているが、本発明はこれに限定され
ず、相対的に封止樹脂と密着性が良好である層としてＮ
ｉメッキ層、Ｐｄメッキ層等のメッキ層や蒸着等の方法
で形成された層を用いた場合にも同様に適用することが
できる。In the above embodiment, the case where a Cu plating layer is used as a layer having relatively good adhesion to the sealing resin has been described. However, the present invention is not limited to this. N as a layer having good adhesion to the sealing resin
The same can be applied to the case where a plating layer such as an i-plating layer or a Pd plating layer or a layer formed by a method such as vapor deposition is used.
【００２４】上記実施形態においては、Ｃｕ製リードフ
レーム素材上にＮｉメッキ層、Ｐｄメッキ層、及びＡｕ
メッキ層を設けた場合について説明しているが、本発明
はこれに限定されず、リードフレーム素材として、４２
アロイ材等を用いても良く、Ａｕメッキ層の下地層とし
て、Ｎｉ層等を用いても良い。また、下地層の形成順序
の特に制限されない。In the above embodiment, a Ni plating layer, a Pd plating layer, and an Au plating layer are formed on a Cu lead frame material.
Although the case where the plating layer is provided is described, the present invention is not limited to this.
An alloy material or the like may be used, and a Ni layer or the like may be used as a base layer of the Au plating layer. Further, the order of forming the underlayer is not particularly limited.
【００２５】[0025]
【発明の効果】以上説明したように本発明のリードフレ
ームの表面処理方法によれば、ダイパッド部を有するリ
ードフレーム素材上に最外層がＡｕ層となるようにメッ
キ処理を施し、樹脂封止時に封止樹脂と接触するＡｕ層
上に相対的に封止樹脂と密着性が良い材料の層を形成す
るので、Ａｕと封止樹脂とが直接接触することがなく、
封止樹脂の材料と密着性が良い材料と封止樹脂とが接触
する。これにより、樹脂封止後にリードフレームと封止
樹脂との間で吸湿が起こることを防止し、リフロー工程
におけるパッケージのポップコーン現象の発生を回避す
ることができる。As described above, according to the lead frame surface treatment method of the present invention, a plating process is performed on a lead frame material having a die pad portion so that the outermost layer becomes an Au layer. Since a layer of a material having relatively good adhesion to the sealing resin is formed on the Au layer that comes into contact with the sealing resin, there is no direct contact between Au and the sealing resin,
A material having good adhesion to the material of the sealing resin comes into contact with the sealing resin. Thus, it is possible to prevent moisture absorption between the lead frame and the sealing resin after the resin sealing, and to avoid a popcorn phenomenon of the package in the reflow process.
【図１】半導体素子を搭載したパッケージの製造に用い
られるリードフレームを示す平面図である。FIG. 1 is a plan view showing a lead frame used for manufacturing a package on which a semiconductor element is mounted.
【図２】本発明の表面処理を施したリードフレームを示
す断面図である。FIG. 2 is a sectional view showing a lead frame subjected to a surface treatment of the present invention.
【図３】本発明の表面処理を施したリードフレームに半
導体素子を搭載し、樹脂封止してなるパッケージを示す
断面図である。FIG. 3 is a cross-sectional view showing a package in which a semiconductor element is mounted on a lead frame that has been subjected to the surface treatment of the present invention and is sealed with a resin.
１…リードフレーム素材、１ａ…ダイパッド部、１ｂ…
インナーリード部、２…Ｎｉメッキ層、３…Ｐｄメッキ
層、４…Ａｕメッキ層、５…Ｃｕメッキ層、６…リード
フレーム、７…Ａｇペースト、８…チップ、９…ワイ
ヤ、１０…封止樹脂。1: Lead frame material, 1a: Die pad part, 1b ...
Inner lead part, 2 ... Ni plating layer, 3 ... Pd plating layer, 4 ... Au plating layer, 5 ... Cu plating layer, 6 ... Lead frame, 7 ... Ag paste, 8 ... Chip, 9 ... Wire, 10 ... Sealing resin.
Claims (3)
使用されるリードフレームのメッキ方法であって、ダイ
パッド部を有するリードフレーム素材上に最外層がＡｕ
層となるようにメッキ処理を施すメッキ処理工程と、樹
脂封止時に封止樹脂と接触するＡｕ層上に相対的に封止
樹脂と密着性が良い材料の層を形成する層形成工程とを
具備することを特徴とするリードフレームの表面処理方
法。1. A method of plating a lead frame used when mounting a semiconductor element and sealing it with a resin, wherein an outermost layer is formed of Au on a lead frame material having a die pad portion.
A plating process of performing plating to form a layer, and a layer forming process of forming a layer of a material having relatively good adhesion to the sealing resin on the Au layer that contacts the sealing resin during resin sealing. A surface treatment method for a lead frame, comprising:
子搭載面と反対の面に前記Ｃｕメッキ処理を施すことを
特徴とする請求項１に記載のリードフレームの表面処理
方法。2. The lead frame surface treatment method according to claim 1, wherein the Cu plating is performed on at least a surface of the die pad portion opposite to a semiconductor element mounting surface.
上に複数のメッキ処理を施す工程であることを特徴とす
る請求項１または請求項２に記載のリードフレームの表
面処理方法。3. The lead frame surface treatment method according to claim 1, wherein the plating step is a step of performing a plurality of plating steps on the lead frame material.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP9917897A JPH10289973A (en) | 1997-04-16 | 1997-04-16 | Surface treatment method of lead frame |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP9917897A JPH10289973A (en) | 1997-04-16 | 1997-04-16 | Surface treatment method of lead frame |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| JPH10289973A true JPH10289973A (en) | 1998-10-27 |
Family
ID=14240406
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP9917897A Pending JPH10289973A (en) | 1997-04-16 | 1997-04-16 | Surface treatment method of lead frame |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPH10289973A (en) |
Cited By (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US6376901B1 (en) * | 1999-06-08 | 2002-04-23 | Texas Instruments Incorporated | Palladium-spot leadframes for solder plated semiconductor devices and method of fabrication |
| JP2007063042A (en) * | 2005-08-30 | 2007-03-15 | Hitachi Metals Ltd | Ceramic substrate and electronic component using it |
| US10048750B2 (en) | 2013-08-30 | 2018-08-14 | Beijing Zhigu Rui Tuo Tech Co., Ltd | Content projection system and content projection method |
-
1997
- 1997-04-16 JP JP9917897A patent/JPH10289973A/en active Pending
Cited By (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US6376901B1 (en) * | 1999-06-08 | 2002-04-23 | Texas Instruments Incorporated | Palladium-spot leadframes for solder plated semiconductor devices and method of fabrication |
| JP2007063042A (en) * | 2005-08-30 | 2007-03-15 | Hitachi Metals Ltd | Ceramic substrate and electronic component using it |
| US10048750B2 (en) | 2013-08-30 | 2018-08-14 | Beijing Zhigu Rui Tuo Tech Co., Ltd | Content projection system and content projection method |
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