JPH0722213A - Method for forming solder bump on surface mounting component - Google Patents

Method for forming solder bump on surface mounting component

Info

Publication number
JPH0722213A
JPH0722213A JP5166663A JP16666393A JPH0722213A JP H0722213 A JPH0722213 A JP H0722213A JP 5166663 A JP5166663 A JP 5166663A JP 16666393 A JP16666393 A JP 16666393A JP H0722213 A JPH0722213 A JP H0722213A
Authority
JP
Japan
Prior art keywords
solder
plating
solder bump
electrode
primary electrode
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP5166663A
Other languages
Japanese (ja)
Other versions
JP3180515B2 (en
Inventor
Osamu Mitsumura
修 三ツ村
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Panasonic Holdings Corp
Original Assignee
Matsushita Electric Industrial Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Matsushita Electric Industrial Co Ltd filed Critical Matsushita Electric Industrial Co Ltd
Priority to JP16666393A priority Critical patent/JP3180515B2/en
Publication of JPH0722213A publication Critical patent/JPH0722213A/en
Application granted granted Critical
Publication of JP3180515B2 publication Critical patent/JP3180515B2/en
Anticipated expiration legal-status Critical
Expired - Fee Related legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00Apparatus or processes for manufacturing printed circuits
    • H05K3/30Assembling printed circuits with electric components, e.g. with resistor
    • H05K3/32Assembling printed circuits with electric components, e.g. with resistor electrically connecting electric components or wires to printed circuits
    • H05K3/34Assembling printed circuits with electric components, e.g. with resistor electrically connecting electric components or wires to printed circuits by soldering
    • H05K3/341Surface mounted components
    • H05K3/3431Leadless components
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00Apparatus or processes for manufacturing printed circuits
    • H05K3/30Assembling printed circuits with electric components, e.g. with resistor
    • H05K3/32Assembling printed circuits with electric components, e.g. with resistor electrically connecting electric components or wires to printed circuits
    • H05K3/34Assembling printed circuits with electric components, e.g. with resistor electrically connecting electric components or wires to printed circuits by soldering
    • H05K3/3457Solder materials or compositions; Methods of application thereof
    • YGENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y02TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
    • Y02PCLIMATE CHANGE MITIGATION TECHNOLOGIES IN THE PRODUCTION OR PROCESSING OF GOODS
    • Y02P70/00Climate change mitigation technologies in the production process for final industrial or consumer products
    • Y02P70/50Manufacturing or production processes characterised by the final manufactured product

Abstract

PURPOSE:To form a thick solder bump on a surface mounting component, e.g. a chip resistor or a semifixed chip resistor employed in an electronic appliance, by feeding power continuously to an outer electrode in a plating liquid without relying on the conventional technology, e.g. presoldering method or barrel plating method, in which the thickness of solder is limited. CONSTITUTION:Chip resistors 1 are set on a carrier tape 5 and carried continuously to a plating bath where power is fed continuously from a power supply electrode 6 to the primary electrode 3a of the chip resistor 1 and the anode 7 is disposed just under the primary electrode 3a thus forming a solder bump 9a selectively. Since a thick solder bump 9a is formed by plating, additional solder supply is not required at the time of mounting on a circuit board, resulting in the enhancement of reliability and efficiency in the mounting.

Description

【発明の詳細な説明】Detailed Description of the Invention

【0001】[0001]

【産業上の利用分野】本発明は各種電子機器に使用され
るチップ抵抗、チップ半固定抵抗等の面実装部品への半
田バンプ形成方法に関する。
BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a method for forming solder bumps on surface-mounted components such as chip resistors and chip semi-fixed resistors used in various electronic devices.

【0002】[0002]

【従来の技術】従来、この種の面実装部品への半田バン
プ形成方法には、Ag−Pd電極上に溶融半田による予
備半田法またはAg系電極からなる一次電極上にバレル
工法等による電解Niおよび電解半田メッキによって半
田電極を形成していた。
2. Description of the Related Art Conventionally, as a method of forming solder bumps on surface mount components of this type, electrolytic Ni by a pre-solder method using molten solder on an Ag-Pd electrode or a barrel method on a primary electrode made of an Ag-based electrode is used. Also, the solder electrodes are formed by electrolytic solder plating.

【0003】[0003]

【発明が解決しようとする課題】しかしながら、従来の
予備半田法およびバレルメッキ法による半田電極は、膜
厚3〜10μm程度を均一な半田膜として形成してい
た。したがって、回路基板等への実装時には、クリーム
半田印刷による半田の供給を必要としていた。
However, the conventional solder electrodes formed by the preliminary soldering method and the barrel plating method have a uniform solder film having a film thickness of about 3 to 10 μm. Therefore, when mounting on a circuit board or the like, it is necessary to supply solder by cream solder printing.

【0004】近年、電子機器の小型、薄型化の進展は著
しく、電子部品も1.0×0.5チップ抵抗等の微小部
品の需要が高まっている。このような微小部品の半田付
けには、クリーム半田に使用する半田粒の形状管理、ま
たファインパターン印刷技術等には問題があり、実装不
良の大部分が半田付け工程に起因するといっても過言で
はない。
In recent years, the progress of miniaturization and thinning of electronic devices has been remarkable, and the demand for electronic parts such as minute parts such as 1.0 × 0.5 chip resistors is increasing. There is a problem in the shape management of the solder particles used for cream soldering, fine pattern printing technology, etc. in soldering such minute parts, and it is an exaggeration to say that most of the mounting defects are due to the soldering process. is not.

【0005】本発明は、上記問題を解決するもので、ク
リーム半田等の供給を不要とすることにより、面実装部
品の実装作業の信頼性を高め、実装工程の効率化をはか
ることを目的とする。
The present invention is intended to solve the above problems, and it is an object of the present invention to improve the reliability of the mounting work of surface mounting components and to improve the efficiency of the mounting process by eliminating the supply of cream solder or the like. To do.

【0006】[0006]

【課題を解決するための手段】本発明は上記目的を達成
するために、あらかじめ絶縁基板上に形成した一次電極
を有する面実装部品を連続的にメッキ槽内へ搬送する搬
送手段と、前記一次電極にメッキ液中で当接して連続的
に給電する給電電極とを備えたメッキ工法において、前
記一次電極上の陽極側に選択的に半田メッキを厚付けし
て半田バンプを形成するものである。
In order to achieve the above-mentioned object, the present invention provides a conveying means for continuously conveying a surface-mounted component having a primary electrode formed on an insulating substrate in advance into a plating tank, and the primary means. In a plating method provided with a power supply electrode that contacts an electrode in a plating solution and continuously supplies power, a solder bump is formed by selectively thickening solder plating on the anode side on the primary electrode. .

【0007】[0007]

【作用】上記した方法において、一次電極上の陽極側に
選択的に半田メッキを厚付けして半田バンプを形成する
ので、回転基板への実装時に新たな半田を供給する必要
がなくなるものである。
In the method described above, the solder plating is selectively thickened on the anode side on the primary electrode to form the solder bumps, so that it is not necessary to supply new solder at the time of mounting on the rotating substrate. .

【0008】[0008]

【実施例】以下、本発明の一実施例について、図1〜図
3を参照しながら説明する。図において、1はチップ抵
抗であり、2はアルミナからなる絶縁基板、3a,3b
はAgメタルグレーズからなる一次電極、4は最上層の
ガラス層である。5はチップ抵抗1を装着して連続的に
メッキ層内へ搬送する一次電極3a,3bと接する部分
に孔部3c,3dを有するキャリアテープであり、6は
一次電極3aに連続的に給電するための給電電極、7は
半田メッキ陽極(Sn−Pb)、8は半田メッキ液流を
示す。
DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS An embodiment of the present invention will be described below with reference to FIGS. In the figure, 1 is a chip resistor, 2 is an insulating substrate made of alumina, and 3a and 3b.
Is a primary electrode made of Ag metal glaze, and 4 is the uppermost glass layer. Reference numeral 5 is a carrier tape having holes 3c and 3d in a portion in contact with the primary electrodes 3a and 3b for mounting the chip resistor 1 and continuously carrying it into the plating layer, and 6 is continuously feeding power to the primary electrode 3a. Is a power supply electrode, 7 is a solder plating anode (Sn-Pb), and 8 is a solder plating liquid flow.

【0009】上記構成において、一次電極3aに給電電
極6によって負電位が与えられると、一次電極3aの表
面で半田メッキの析出反応がおこり、半田バンプ9aが
形成される。この反応速度は、半田メッキ液流8が大き
いほど、また陽極7との距離に反比例して大きくなる。
本発明では陽極7を一次電極3aの真下に配置するこ
と、および給電電極6にて連続給電を行うことにより、
メッキ析出速度を上げることができ、一次電極3aの陽
極側に選択的に半田メッキを厚付けすることができる。
In the above structure, when a negative potential is applied to the primary electrode 3a by the power supply electrode 6, a deposition reaction of solder plating occurs on the surface of the primary electrode 3a to form the solder bump 9a. This reaction rate increases as the solder plating liquid flow 8 increases and in inverse proportion to the distance from the anode 7.
In the present invention, by arranging the anode 7 directly below the primary electrode 3a, and by continuously feeding power with the power feeding electrode 6,
The plating deposition rate can be increased, and the solder plating can be selectively thickened on the anode side of the primary electrode 3a.

【0010】なお、チップ抵抗1の反対側の一次電極3
bへの半田バンプ9bの形成も同様の方法で行う。ま
た、実施例ではチップ抵抗1について説明したが、チッ
プ半固定抵抗についても同様の半田バンプ形成方法によ
って半田メッキの析出反応が可能である。
The primary electrode 3 on the opposite side of the chip resistor 1
The same method is used to form the solder bump 9b on b. Although the chip resistor 1 has been described in the embodiment, the solder plating deposition reaction can be performed on the chip semi-fixed resistor by the same solder bump forming method.

【0011】[0011]

【発明の効果】上記実施例から明らかなように本発明の
面実装部品への半田バンプ形成方法は、一次電極の真下
に陽極を配置することにより選択的に半田メッキを厚付
けして半田バンプを形成するものであり、この形成方法
により、従来の工法では不可能だった半田バンプの形成
が可能となり、半田バンプ付き面実装部品を供給するこ
とにより、実装の信頼性と実装効率の向上をはかること
ができる。
As is apparent from the above-described embodiments, the method of forming solder bumps on surface-mounted components according to the present invention is that solder bumps are formed by arranging an anode directly under the primary electrode to selectively thicken the solder plating. This method enables the formation of solder bumps, which was not possible with the conventional method, and improves the reliability and efficiency of mounting by supplying surface mount components with solder bumps. You can measure.

【図面の簡単な説明】[Brief description of drawings]

【図1】本発明の一実施例における面実装部品への半田
バンプ形成方法の構成図
FIG. 1 is a configuration diagram of a method for forming solder bumps on surface-mounted components according to an embodiment of the present invention.

【図2】同半田バンプ成形方法に用いるチップ抵抗の断
面図
FIG. 2 is a sectional view of a chip resistor used in the same solder bump forming method.

【図3】同チップ抵抗に半田メッキを施した断面図FIG. 3 is a sectional view of the same chip resistor with solder plating.

【符号の説明】[Explanation of symbols]

1 チップ抵抗(面実装部品) 2 絶縁基板 3a,3b 一次電極 5 キャリアテープ(搬送手段) 6 給電電極 7 陽極 9a,9b 半田バンプ 1 Chip Resistor (Surface Mount Component) 2 Insulating Substrate 3a, 3b Primary Electrode 5 Carrier Tape (Conveying Means) 6 Feeding Electrode 7 Anode 9a, 9b Solder Bump

Claims (1)

【特許請求の範囲】[Claims] 【請求項1】 あらかじめ絶縁基板上に形成した一次電
極を有する面実装部品を連続的にメッキ槽内へ搬送する
搬送手段と、前記一次電極にメッキ液中で当接して連続
的に給電する給電電極とを備えたメッキ工法において、
前記一次電極上の陽極側に選択的に半田メッキを厚付け
して半田バンプを形成する面実装部品への半田バンプ形
成方法。
1. A transfer means for continuously transferring a surface-mounted component having a primary electrode formed in advance on an insulating substrate into a plating tank, and a power supply for continuously supplying power by contacting the primary electrode in a plating solution. In the plating method with electrodes,
A method of forming a solder bump on a surface-mounted component, wherein a solder plating is selectively thickened on the anode side of the primary electrode to form a solder bump.
JP16666393A 1993-07-06 1993-07-06 Method of forming solder bumps on surface mount components Expired - Fee Related JP3180515B2 (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP16666393A JP3180515B2 (en) 1993-07-06 1993-07-06 Method of forming solder bumps on surface mount components

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP16666393A JP3180515B2 (en) 1993-07-06 1993-07-06 Method of forming solder bumps on surface mount components

Publications (2)

Publication Number Publication Date
JPH0722213A true JPH0722213A (en) 1995-01-24
JP3180515B2 JP3180515B2 (en) 2001-06-25

Family

ID=15835431

Family Applications (1)

Application Number Title Priority Date Filing Date
JP16666393A Expired - Fee Related JP3180515B2 (en) 1993-07-06 1993-07-06 Method of forming solder bumps on surface mount components

Country Status (1)

Country Link
JP (1) JP3180515B2 (en)

Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
WO2005041220A1 (en) * 2003-10-22 2005-05-06 Minowa Koa Inc. Method of manufacturing electronic component
WO2005045856A1 (en) * 2003-11-11 2005-05-19 Minowa Koa Inc. Electronic component manufacturing method
WO2005091313A1 (en) * 2004-03-24 2005-09-29 Minowa Koa Inc. Electronic component

Cited By (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
WO2005041220A1 (en) * 2003-10-22 2005-05-06 Minowa Koa Inc. Method of manufacturing electronic component
WO2005045856A1 (en) * 2003-11-11 2005-05-19 Minowa Koa Inc. Electronic component manufacturing method
WO2005091313A1 (en) * 2004-03-24 2005-09-29 Minowa Koa Inc. Electronic component
JPWO2005091313A1 (en) * 2004-03-24 2008-02-07 箕輪興亜株式会社 Electronic components
JP4568719B2 (en) * 2004-03-24 2010-10-27 コーア株式会社 Electronic components

Also Published As

Publication number Publication date
JP3180515B2 (en) 2001-06-25

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