JPH03225923A - Formation of bump - Google Patents
Formation of bumpInfo
- Publication number
- JPH03225923A JPH03225923A JP1927890A JP1927890A JPH03225923A JP H03225923 A JPH03225923 A JP H03225923A JP 1927890 A JP1927890 A JP 1927890A JP 1927890 A JP1927890 A JP 1927890A JP H03225923 A JPH03225923 A JP H03225923A
- Authority
- JP
- Japan
- Prior art keywords
- semiconductor element
- bumps
- solder
- substrate
- cream solder
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Granted
Links
- 230000015572 biosynthetic process Effects 0.000 title claims description 3
- 239000004065 semiconductor Substances 0.000 claims abstract description 62
- 229910000679 solder Inorganic materials 0.000 claims abstract description 51
- 239000000758 substrate Substances 0.000 claims abstract description 46
- 238000000034 method Methods 0.000 claims abstract description 31
- 239000006071 cream Substances 0.000 claims abstract description 28
- 239000000463 material Substances 0.000 claims abstract description 18
- 238000007650 screen-printing Methods 0.000 claims description 7
- 239000011521 glass Substances 0.000 abstract description 13
- 239000000203 mixture Substances 0.000 abstract description 5
- 238000012216 screening Methods 0.000 abstract 1
- 239000002184 metal Substances 0.000 description 10
- 229910052751 metal Inorganic materials 0.000 description 10
- PXHVJJICTQNCMI-UHFFFAOYSA-N nickel Substances [Ni] PXHVJJICTQNCMI-UHFFFAOYSA-N 0.000 description 10
- 230000004907 flux Effects 0.000 description 4
- 238000007772 electroless plating Methods 0.000 description 3
- 239000010931 gold Substances 0.000 description 3
- 238000010438 heat treatment Methods 0.000 description 3
- 238000002161 passivation Methods 0.000 description 3
- 238000007747 plating Methods 0.000 description 3
- 230000008569 process Effects 0.000 description 3
- 229910045601 alloy Inorganic materials 0.000 description 2
- 239000000956 alloy Substances 0.000 description 2
- 238000005260 corrosion Methods 0.000 description 2
- 230000007797 corrosion Effects 0.000 description 2
- 230000000694 effects Effects 0.000 description 2
- 238000005516 engineering process Methods 0.000 description 2
- 230000008018 melting Effects 0.000 description 2
- 238000002844 melting Methods 0.000 description 2
- KWSLGOVYXMQPPX-UHFFFAOYSA-N 5-[3-(trifluoromethyl)phenyl]-2h-tetrazole Chemical compound FC(F)(F)C1=CC=CC(C2=NNN=N2)=C1 KWSLGOVYXMQPPX-UHFFFAOYSA-N 0.000 description 1
- 229910001020 Au alloy Inorganic materials 0.000 description 1
- 229910021586 Nickel(II) chloride Inorganic materials 0.000 description 1
- 229910000978 Pb alloy Inorganic materials 0.000 description 1
- 230000004913 activation Effects 0.000 description 1
- 150000001875 compounds Chemical class 0.000 description 1
- 229910052802 copper Inorganic materials 0.000 description 1
- 238000000151 deposition Methods 0.000 description 1
- 229910052737 gold Inorganic materials 0.000 description 1
- 239000003353 gold alloy Substances 0.000 description 1
- 229910052745 lead Inorganic materials 0.000 description 1
- 239000007788 liquid Substances 0.000 description 1
- 150000002739 metals Chemical class 0.000 description 1
- 229910052759 nickel Inorganic materials 0.000 description 1
- QMMRZOWCJAIUJA-UHFFFAOYSA-L nickel dichloride Chemical compound Cl[Ni]Cl QMMRZOWCJAIUJA-UHFFFAOYSA-L 0.000 description 1
- 239000002244 precipitate Substances 0.000 description 1
- 230000009467 reduction Effects 0.000 description 1
- 230000004044 response Effects 0.000 description 1
- 229910052709 silver Inorganic materials 0.000 description 1
- 239000010944 silver (metal) Substances 0.000 description 1
- VILMUCRZVVVJCA-UHFFFAOYSA-M sodium glycolate Chemical compound [Na+].OCC([O-])=O VILMUCRZVVVJCA-UHFFFAOYSA-M 0.000 description 1
- 229910001379 sodium hypophosphite Inorganic materials 0.000 description 1
- 239000010935 stainless steel Substances 0.000 description 1
- 229910001220 stainless steel Inorganic materials 0.000 description 1
- 229910052718 tin Inorganic materials 0.000 description 1
- 239000011135 tin Substances 0.000 description 1
- 238000001771 vacuum deposition Methods 0.000 description 1
Classifications
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K3/00—Apparatus or processes for manufacturing printed circuits
- H05K3/30—Assembling printed circuits with electric components, e.g. with resistor
- H05K3/32—Assembling printed circuits with electric components, e.g. with resistor electrically connecting electric components or wires to printed circuits
- H05K3/34—Assembling printed circuits with electric components, e.g. with resistor electrically connecting electric components or wires to printed circuits by soldering
- H05K3/3457—Solder materials or compositions; Methods of application thereof
- H05K3/3478—Applying solder preforms; Transferring prefabricated solder patterns
Landscapes
- Wire Bonding (AREA)
Abstract
Description
【発明の詳細な説明】
［発明の目的コ
（産業上の利用分野）
本発明は半導体素子の電極パッド上へのバンプの形成方
法に関する。DETAILED DESCRIPTION OF THE INVENTION [Object of the Invention (Field of Industrial Application) The present invention relates to a method for forming bumps on electrode pads of a semiconductor device.
（従来の技術） 現在、電子機器の小型化に伴ない、ＩＣ。(Conventional technology) Currently, with the miniaturization of electronic devices, ICs.
ＬＳＩ等の半導体素子は高密度、高集積化が進められて
いる。また、半導体素子の実装の面からみても、電極ピ
ッチ間の縮小化、Ｉ１０数の増大といった傾向にある。BACKGROUND ART Semiconductor devices such as LSIs are becoming more dense and highly integrated. Furthermore, from the perspective of mounting semiconductor elements, there is a trend toward a reduction in electrode pitch and an increase in the number of I10.
さらに、電卓やＩＣカードにみられるカード化に対応す
る薄型化が要求されている。Furthermore, there is a demand for thinner devices that correspond to the use of cards such as calculators and IC cards.
このような要求に対し、ＴＡＢ方式やフリップチップ方
式などのワイヤレスボンディング方式は、−括接合、位
置合わせ精度からくる信頼性、実装の薄型化、自動化等
の面において有利であり、今後の半導体素子の実装技術
の主流となることが予想される。ワイヤレスボンディン
グ方式では、一般に半導体素子の電極パッド上にバンプ
と呼ばれる金属突起物が形成される。かかるバンプの形
成方法としては、従来次のようなものが知られている。In response to these demands, wireless bonding methods such as the TAB method and the flip-chip method are advantageous in terms of joint bonding, reliability due to alignment accuracy, thinner mounting, automation, etc., and are suitable for future semiconductor devices. It is expected that this will become the mainstream mounting technology. In the wireless bonding method, metal protrusions called bumps are generally formed on electrode pads of a semiconductor element. The following methods are conventionally known as methods for forming such bumps.
まず、半導体素子とは別の基板上の所定位置に半田等の
バンプ材料を配列形成しておき、この基板と半導体素子
とを対向配置せしめる。この後基板上のバンプ材料を加
熱すると、バンプ材料が半導体素子の電極パッド上に転
写され、バンプが形成される。例えば特開昭６２−２５
４３５号には、基板上の所定位置にバンプ材料の金属ボ
ールを配置し該基板と半導体素子とを対向配置せしめた
後、金属ボールを加熱して半導体素子の電極パッド上に
転写し、バンプを形成する方法が開示されている。First, bump materials such as solder are arranged and formed at predetermined positions on a substrate different from the semiconductor element, and this substrate and the semiconductor element are placed facing each other. When the bump material on the substrate is then heated, the bump material is transferred onto the electrode pads of the semiconductor element, forming bumps. For example, JP-A-62-25
No. 435 discloses that after placing a metal ball of bump material at a predetermined position on a substrate and arranging the substrate and a semiconductor element to face each other, the metal ball is heated and transferred onto the electrode pad of the semiconductor element to form the bump. A method of forming is disclosed.
このようなワイヤレスボンディング方式においては、半
導体素子の電極パッド上に形成されるバンプの高さが重
要な問題となる。すなわち、全ての電極パッド上に、均
一かつ充分な高さを有するバンプが形成されることが要
求される。而るに、前述したような金属ボールを転写し
てバンプを形成する方法では、高さの均一なバンプを形
成するためには均等な大きさの金属ボールを基板上に配
置せしめることが必要であり、このためには種々の治具
等を用いた繁雑な工程を経なければならなかった。また
、金属ボールは基板上において半導体素子の電極パッド
と対向する位置に正確に形成されなければならず、さら
に該基板と半導体素子（３）
との位置合わせを精密に行なわなければ位置ずれが生じ
てしまうという問題があった。In such a wireless bonding method, the height of the bump formed on the electrode pad of the semiconductor element is an important issue. That is, it is required that bumps having uniform and sufficient height be formed on all electrode pads. However, in the method of forming bumps by transferring metal balls as described above, it is necessary to arrange metal balls of uniform size on the substrate in order to form bumps of uniform height. For this purpose, it was necessary to go through a complicated process using various jigs and the like. In addition, the metal ball must be accurately formed on the substrate at a position facing the electrode pad of the semiconductor element, and if the substrate and the semiconductor element (3) are not precisely aligned, misalignment may occur. There was a problem with this.
またこのような方法以外にも、基板上の所定位置にバン
プ材料をメツキ、真空蒸着等によって形成した後、半導
体素子の電極パッド上に転写してバンプを形成する方法
も知られている。しかしながら係る方法では、半導体素
子の高集積化が進み電極パッドの面積が微細化したとき
には、充分な高さのバンプが形成できないという問題点
があった。In addition to this method, a method is also known in which a bump material is formed at a predetermined position on a substrate by plating, vacuum deposition, etc., and then transferred onto an electrode pad of a semiconductor element to form a bump. However, this method has a problem in that bumps of sufficient height cannot be formed when semiconductor devices become highly integrated and the area of electrode pads becomes smaller.
（発明が解決しようとする課題）
上述したように、ワイヤレスボンディング方式において
は、半導体素子の電極パッド」−に均一かつ充分な高さ
のバンプを形成することが不可欠である。しかしながら
従来のバンプの形成方法では、このようなバンプを形成
することは非常に困難であった。(Problems to be Solved by the Invention) As described above, in the wireless bonding method, it is essential to form bumps of uniform and sufficient height on the electrode pads of the semiconductor element. However, it is very difficult to form such bumps using conventional bump forming methods.
本発明ではこのような問題を解決して、半導体素子の電
極パッド上に均一かつ充分な高さのバンプを容易に形成
することのできるバンプの形成刃（４）
法を提供することを目的としている。The present invention aims to solve these problems and provide a bump forming blade (4) method that can easily form bumps of uniform and sufficient height on the electrode pads of semiconductor devices. There is.
［発明の構成］
（課題を解決するための手段及び作用）本発明は、半導
体素子の電極パッドと対向する位置にバンプ材料が形成
された基板を前記半導体素子と重ね合わせた後、前記基
板上のバンプ材料を加熱溶融せしめることによって、前
記半導体素子の電極パッド上にバンプ材料を転写してバ
ンプを形成するバンプの形成方法において、前記バンプ
材料が半田であり、半田はクリーム半田を所望の基板に
スクリーン印刷することにより前記基板上に形成された
ことを特徴とするバンプの形成方法である。すなわち本
発明のバンプの形成方法は、所望の基板の所定位置にク
リーム半田をスクリーン印刷する工程（第一工程）、基
板上に形成されたクリーム半田と半導体素子の電極パッ
ドとが対向するように前記基板と半導体素子とを重ね合
わせる工程（第二工程）、前記基板上に形成された半田
を加熱溶融４して半導体素子の電極パッド上に転写する
工程（第三工程）とから構成される。[Structure of the Invention] (Means and Effects for Solving the Problems) The present invention provides a method for overlapping a substrate on which a bump material is formed at a position facing an electrode pad of a semiconductor element with the semiconductor element, and then stacking the substrate on the substrate. In the bump forming method, the bump material is transferred onto the electrode pad of the semiconductor element to form a bump by heating and melting the bump material. A method for forming bumps, characterized in that the bumps are formed on the substrate by screen printing. That is, the bump forming method of the present invention includes a step (first step) of screen-printing cream solder at a predetermined position on a desired substrate, such that the cream solder formed on the substrate faces the electrode pad of the semiconductor element. It consists of the step of overlapping the substrate and the semiconductor element (second step), and the step of heating and melting the solder formed on the substrate and transferring it onto the electrode pad of the semiconductor element (third step). .
本発明において、バンプ材料として用いられる半田の組
成は特に限定されず、５ｎ−Ｐｂ合金、Ｓｎ−Ｐｂ−Ａ
ｇ合金、５ｎ−Ｐｂ−Ｂｉ金合金が例示される。半田が
形成される基板としては、半田と化合物等を作らず、半
田濡れ性の悪い材料であればよく、ガラス、ステンレス
等を用いることができる。このような基板を用いれば、
第三工程において基板上の半田を加熱溶融したとき、半
田はより半田濡れ性の良い電極パッド上に容易に転写さ
れる。さらにガラス等の透明な基板は、第二工程での基
板と半導体素子との位置合わせが容易となるので特に好
ましい。また本発明では、クリーム半田を基板にスクリ
ーン印刷することにより半田が基板上に形成されるが、
クリーム半田とは半田とフラックスとのペースト状の混
合物のことであり、フラックスの含有量は５〜２０重量
％であることが好ましい。この理由は、フラックスが多
すぎると半導体素子の電極パッド上に転写される半田の
量が少なくなり、フラックスが少なすぎるとクリーム半
田を基板にスクリーン印刷することが困難となるからで
ある。In the present invention, the composition of the solder used as the bump material is not particularly limited, and may include 5n-Pb alloy, Sn-Pb-A
Examples include g alloy and 5n-Pb-Bi gold alloy. The substrate on which the solder is formed may be any material that does not form a compound with the solder and has poor solder wettability, such as glass or stainless steel. If you use such a board,
When the solder on the substrate is heated and melted in the third step, the solder is easily transferred onto the electrode pad, which has better solder wettability. Further, a transparent substrate such as glass is particularly preferable because it facilitates alignment of the substrate and the semiconductor element in the second step. Furthermore, in the present invention, solder is formed on the substrate by screen printing cream solder on the substrate.
Cream solder is a paste-like mixture of solder and flux, and the content of flux is preferably 5 to 20% by weight. The reason for this is that if there is too much flux, the amount of solder transferred onto the electrode pads of the semiconductor element will decrease, and if there is too little flux, it will be difficult to screen print the cream solder onto the substrate.
本発明では前述したような基板上において、基板と目的
とする半導体素子とを対向配置せしめたとき、半導体素
子の電極パッドと基板上に形成されたクリーム半田とが
対向するようなパターンにクリーム半田のスクリーン印
刷が行なわれる。このとき半導体素子における電極パッ
ドのパターンとスクリーン印刷されたクリーム半田のパ
ターンとは、必ずしも正確に一致する必要はない。すな
わち基板と半導体素子とを重ね合わせたとき、半導体素
子の電極パッドと基板上に形成されたクリム半田とが少
なくとも一部で接触するようなパターンにスクリーン印
刷を行なえばよい。何となれば、このように半導体素子
の電極パッドとクリム半田とが少なくとも一部で接触し
ていれば、第三工程において半田加熱溶融を行なったと
きに半田はすべて半導体素子の電極パッド上に転写され
るからである。In the present invention, on the substrate as described above, when the substrate and the target semiconductor element are placed facing each other, the cream solder is applied in a pattern such that the electrode pads of the semiconductor element and the cream solder formed on the substrate face each other. Screen printing is performed. At this time, the pattern of the electrode pads on the semiconductor element and the pattern of the screen-printed cream solder do not necessarily need to exactly match. That is, screen printing may be performed in a pattern such that when the substrate and the semiconductor element are superimposed, the electrode pads of the semiconductor element and the crimped solder formed on the substrate are at least partially in contact with each other. The reason is that if the electrode pads of the semiconductor element and the cream solder are in at least some contact with each other in this way, all the solder will be transferred onto the electrode pads of the semiconductor element when the solder is heated and melted in the third step. This is because it will be done.
本発明のバンプの形成方法においては、半導体素子の電
極パッド上に形成されるバンプの高さは、（７）
基板にスクリーン印刷されたクリーム半田の量によって
制御することができる。従って、半導体素子の各電極パ
ッドと対向する位置に、等量のクリーム半田をスクリー
ン印刷により形成しておけば、電極パッド上に均一な高
さの半田バンプが形成される。また、クリーム半田の量
を変えることによりバンプの高さを調節することができ
るので、クリーム半田の量を適増量することにより充分
な高さのバンプを形成することができる。In the bump forming method of the present invention, the height of the bump formed on the electrode pad of the semiconductor element can be controlled by (7) the amount of cream solder screen printed on the substrate. Therefore, by forming an equal amount of cream solder by screen printing at a position facing each electrode pad of a semiconductor element, solder bumps of uniform height can be formed on the electrode pads. Furthermore, since the height of the bump can be adjusted by changing the amount of cream solder, a bump of sufficient height can be formed by appropriately increasing the amount of cream solder.
本発明では、バンプが形成される電極パッドの形状、材
料については特に限定されないが、例えば半導体素子の
Ａｆｉ電極パッドに対して本発明のバンプの形成方法を
適用する場合には、あらかじめＡ、Ｑ電極パッド上に、
Ａｕ、Ｎｉ、Ａｇ、Ｓｎ。In the present invention, the shape and material of the electrode pad on which the bump is formed are not particularly limited. For example, when applying the bump formation method of the present invention to the Afi electrode pad of a semiconductor element, A, Q on the electrode pad,
Au, Ni, Ag, Sn.
Ｐｂ、Ｃｕあるいはこれらの合金等の耐食性の大きい金
属を析出せしめることが望ましい。なかでもＡｕは耐食
性が特に大きいので好ましく、ＩＱ電極パッド上に他の
金属を析出せしめた後、さらにＡｕを析出せしめてもよ
い。係る金属を析出する方法としては、無電解メツキ法
等を用いること（８）
ができる。このようにＡ［電極パッド上にバンプを形成
する場合には、あらかじめＡｐ電極パッド上に他の金属
を析出させれば、バンプ材料を転写するときに電極パッ
ドが損傷されるおそれがなく、本発明により好適にバン
プを形成することが可能となる。It is desirable to deposit a metal with high corrosion resistance, such as Pb, Cu, or an alloy thereof. Among them, Au is preferred because it has particularly high corrosion resistance, and Au may be further deposited after other metals are deposited on the IQ electrode pad. As a method for depositing such a metal, an electroless plating method or the like can be used (8). In this way, when forming bumps on the A[electrode pads, if another metal is deposited on the Ap electrode pads in advance, there is no risk of damaging the electrode pads when transferring the bump material, and The invention makes it possible to suitably form bumps.
（実施例） 以下に本発明の実施例を示す。(Example) Examples of the present invention are shown below.
まず全面にパッシベーション膜が形成され、部にＡｊ）
電極パッドが露出した半導体素子を用意し、この半導体
素子のＡ、Ｑ電極パッド上に無電解メツキ法によりＮｉ
を析出せしめた。得られた半導体素子の縦断面図を第１
図に示す。無電解メツキは、まず半導体素子（１）をＰ
ｄ活性化液に３０〜６０秒程度浸漬してＡｇ電極パッド
（２）上に選択的にＰｄの析出物を付着せしめた後、半
導体素子（１）を液温９０°Ｃの無電解Ｎｉメツキ液に
２０分間浸漬して行った。図中（３）はパッシベーショ
ン膜である。無電解Ｎｉメツキ液としては下記の組成の
ものを用い、Ａｇ電極パッド（２）上に厚さ約５μｍの
Ｎｉ電極パッド（４）が形成された。First, a passivation film is formed on the entire surface, and Aj)
A semiconductor element with exposed electrode pads is prepared, and Ni is deposited on the A and Q electrode pads of this semiconductor element by electroless plating.
was precipitated. The longitudinal cross-sectional view of the obtained semiconductor device is shown in the first
As shown in the figure. In electroless plating, first the semiconductor element (1) is
d After being immersed in the activation solution for about 30 to 60 seconds to selectively deposit Pd precipitates on the Ag electrode pad (2), the semiconductor element (1) is plated with electroless Ni at a solution temperature of 90°C. This was done by immersing it in the solution for 20 minutes. In the figure, (3) is a passivation film. An electroless Ni plating solution having the following composition was used to form a Ni electrode pad (4) with a thickness of approximately 5 μm on the Ag electrode pad (2).
［無電解Ｎｉメツキ液組成］
塩化ニッケル ３０ｇ／ｊ）ヒドロキシ酢酸
ソーダ ５０ｇ／ρ
次亜リン酸ソーダ １０ｇ／ρ
この後、２００〜３００℃の温度で３０〜６０分程度真
空中で熱処理を行ない、ＡｆｉとＮｉとの密着性を増大
せしめた。[Electroless Ni plating liquid composition] Nickel chloride 30g/j) Sodium hydroxyacetate 50g/ρ Sodium hypophosphite 10g/ρ After this, heat treatment is performed in a vacuum at a temperature of 200 to 300°C for about 30 to 60 minutes, Increased adhesion between Afi and Ni.
一方、バンプ材料として６３Ｓｎ−３７Ｐｂなる組成の
半田を含むクリーム半田（千住金属工業製、０Ｚ６３−
２０Ｆ−７５−１３）を用意し、係るクリーム半田をガ
ラス基板にスクリーン印刷して、半導体素子の電極パッ
ドと対向する位置にクリーム半田をそれぞれ均等量形成
した。この結果、ガラス基板上に１２０μｍ口のパター
ンで厚さ１００μｍのクリーム半田が形成された。On the other hand, cream solder (manufactured by Senju Metal Industries, Ltd., 0Z63-
20F-75-13) was prepared, and the cream solder was screen printed on a glass substrate to form equal amounts of cream solder at positions facing the electrode pads of the semiconductor element. As a result, cream solder with a thickness of 100 μm was formed on the glass substrate in a pattern of 120 μm openings.
次いで、ガラス基板上に形成された半田を半導体素子の
電極パッド上へ転写したが、このときの工程における縦
断面図を第２図に示す。まず、半導体素子（１）のＮｉ
電極パッド（４）とガラス基板（５）上に形成されたク
リーム半田（６）のパターンとが接触するように半導体
素子（１）とガラス基板（５）とを重ね合わせた後、ク
リーム半田（６）を２４０°Ｃに加熱し溶融せしめた。Next, the solder formed on the glass substrate was transferred onto the electrode pads of the semiconductor element, and a vertical cross-sectional view of this process is shown in FIG. First, the Ni of the semiconductor element (1)
After overlapping the semiconductor element (1) and the glass substrate (5) so that the electrode pads (4) and the pattern of cream solder (6) formed on the glass substrate (5) are in contact with each other, the cream solder ( 6) was heated to 240°C to melt it.
この後、半導体素子とガラス基板とを引き離したところ
、半導体素子のＮｉ電極パッド上に球状の半田バンプが
形成された。第３図にバンプが形成された半導体素子の
縦断面図を示す。形成されたバンプ（７）は、全てのＮ
ｉ電極パッド（４）上において高さ約３０μｍ、径約８
０μｍであり、均一かつ充分な高さを何していた。Thereafter, when the semiconductor element and the glass substrate were separated, spherical solder bumps were formed on the Ni electrode pads of the semiconductor element. FIG. 3 shows a longitudinal cross-sectional view of a semiconductor element on which bumps are formed. The formed bump (7) has all N
Approximately 30 μm in height and approximately 8 in diameter on i-electrode pad (4)
It was 0 μm and had a uniform and sufficient height.
さらに、ガラス基板上に形成するクリーム半田の量を適
宜変えて同様にバンプを形成したところ、高さ１０〜４
０．ｃｚｍ、径４０〜１５０μｍの範囲内で、所望の大
きさを有するバンプを形成することが可能であった。Furthermore, when bumps were formed in the same manner by changing the amount of cream solder formed on the glass substrate, the height was 10 to 4.
0. It was possible to form a bump having a desired size within the range of czm and diameter of 40 to 150 μm.
［発明の効果］
以上詳述したように、本発明のバンプの形成方法によれ
ば、半導体素子の電極パッド上に均一かつ充分な高さの
バンプを容易に形成することができ、さらにはバンプの
高さを適宜制御することも可能であり、その工業的価値
は大なるものがある。[Effects of the Invention] As detailed above, according to the bump forming method of the present invention, bumps of uniform and sufficient height can be easily formed on the electrode pads of a semiconductor element, and furthermore, the bumps can be easily formed on the electrode pads of a semiconductor element. It is also possible to control the height appropriately, and its industrial value is great.
第１図はバンプを形成する前の半導体素子の縦断面図、
第２図は半田の転写を行なう工程を示す縦断面図、第３
図はバンプを形成した後の半導体素子の縦断面図である
。
１・・・半導体素子、２・・・ＡＩ！電極パッド、３・
・・パッシベーション膜、４・・・Ｎｉ電極パッド、５
・・・ガラス基板、６・・・クリーム半田、７・・・バ
ンプ。FIG. 1 is a longitudinal cross-sectional view of a semiconductor element before bumps are formed;
Figure 2 is a vertical cross-sectional view showing the solder transfer process;
The figure is a longitudinal cross-sectional view of the semiconductor element after bumps have been formed. 1... Semiconductor element, 2... AI! Electrode pad, 3.
...Passivation film, 4...Ni electrode pad, 5
...Glass substrate, 6...Cream solder, 7...Bump.
Claims (1)
形成された基板を前記半導体素子と重ね合わせた後、前
記基板上のバンプ材料を加熱溶融せしめることによって
、前記半導体素子の電極パッド上にバンプ材料を転写し
てバンプを形成するバンプの形成方法において、前記バ
ンプ材料が半田であり、半田はクリーム半田を所望の基
板にスクリーン印刷することにより前記基板上に形成さ
れたことを特徴とするバンプの形成方法。After overlapping a substrate on which bump material is formed at a position facing the electrode pad of the semiconductor element with the semiconductor element, the bump material on the substrate is heated and melted, thereby forming the bump material on the electrode pad of the semiconductor element. In the bump forming method, the bump material is solder, and the solder is formed on the desired substrate by screen printing cream solder onto the desired substrate. Formation method.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP2019278A JP2931011B2 (en) | 1990-01-31 | 1990-01-31 | Method of forming bump |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP2019278A JP2931011B2 (en) | 1990-01-31 | 1990-01-31 | Method of forming bump |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| JPH03225923A true JPH03225923A (en) | 1991-10-04 |
| JP2931011B2 JP2931011B2 (en) | 1999-08-09 |
Family
ID=11994979
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP2019278A Expired - Lifetime JP2931011B2 (en) | 1990-01-31 | 1990-01-31 | Method of forming bump |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JP2931011B2 (en) |
Cited By (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPH05136151A (en) * | 1991-11-15 | 1993-06-01 | Matsushita Electric Ind Co Ltd | Method of forming electrode of semiconductor device and packaged body |
| JPH06140409A (en) * | 1992-10-29 | 1994-05-20 | Rohm Co Ltd | Manufacture of semiconductor device |
| US5762259A (en) * | 1995-07-13 | 1998-06-09 | Motorola Inc. | Method for forming bumps on a substrate |
-
1990
- 1990-01-31 JP JP2019278A patent/JP2931011B2/en not_active Expired - Lifetime
Cited By (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPH05136151A (en) * | 1991-11-15 | 1993-06-01 | Matsushita Electric Ind Co Ltd | Method of forming electrode of semiconductor device and packaged body |
| JPH06140409A (en) * | 1992-10-29 | 1994-05-20 | Rohm Co Ltd | Manufacture of semiconductor device |
| US5762259A (en) * | 1995-07-13 | 1998-06-09 | Motorola Inc. | Method for forming bumps on a substrate |
Also Published As
| Publication number | Publication date |
|---|---|
| JP2931011B2 (en) | 1999-08-09 |
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