JP2000012605A - Method for producing electrode part of semiconductor chip - Google Patents

Abstract

PROBLEM TO BE SOLVED: To prevent variations of thickness of aluminum electrode formed on a semiconductor chip and variations of height of the electrode when a bump, etc., are formed on the aluminum electrode. SOLUTION: In this method, an aluminum layer 4 and an electrode part 100a comprising a metallic layer 20 which is nobler than aluminum, laminated on the aluminum layer 4 are formed on a semiconductor substrate 2 comprising a semiconductor chip 1. In this case, the aluminum layer 4 is formed on the whole surface of the semiconductor substrate 2. A metallic layer which is nobler than aluminum is laminated on the part to be at least electrode part on the aluminum layer 4 without previously patterning the aluminum layer 4 on an electrode pattern. As a result, an electrode pattern 30 having laminated structure of the aluminum layer 4 and the metallic layer 20 which is noble than aluminum is formed. Subsequently, a protective film 7 is formed in such a way as to open the electrode pattern 30. Furthermore, if necessary, a bump is formed.

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a structure of an electrode portion of a semiconductor chip suitable for flip chip mounting, TAB mounting, and the like, and a method of forming the same.

[0002]

2. Description of the Related Art As shown in FIG. 7, a conventional method for forming an electrode portion of a semiconductor chip 1 is to first form a 2 μm thick layer on the surface.
An Al layer 4 is deposited on the entire surface of a semiconductor substrate 2 such as a Si substrate having an insulating layer 3 of about m or less by vacuum evaporation of Al (FIG. 1A). Electrode 4 by patterning
A and the circuit portion 4X are formed (FIG. 2B), and then sintering is performed to secure the adhesion between Si / Al.
Further, a protection film (passivation film) 7 is formed on the surface of the semiconductor chip 1 so that the Al electrode 4A is opened (FIG. 3C).

A method of mounting the semiconductor chip 1 having the electrode portion formed in this manner is a so-called wire bonding mounting method in which the electrode portion of the semiconductor chip 1 is connected to the electrode portion of the substrate using an Al wire or an Au wire. Alternatively, flip chip mounting or TAB mounting in which a bump is formed on an Al electrode 4A of the semiconductor chip 1 and the semiconductor chip 1 is directly mounted on a substrate using the bump is performed.

In this case, as shown in FIG. 8, a bump is formed on a semiconductor chip 1 (FIG. 1A) having an Al electrode 4A and a protective film 7 by applying a C
adhesion improving film 8 made of r, W, Ti, Cu, etc. and Cu,
A diffusion prevention film 9 made of Ni or the like is sequentially laminated (FIG. 2B), a resist 10 is applied (FIG. 2C), and the resist 10 is patterned by a photolithography method so that an Al electrode 4A is opened (FIG. 2B). (D), a bump metal 11 such as Cu, Ni, solder, Ag, Au, etc. to be a bump is formed thereon by an electroplating method or a vacuum method ((e) in the same figure). Next, the resist 10 is peeled off (FIG. 6F), the diffusion prevention film 9 is removed by etching (FIG. 6G), and the adhesion improving film 8 is further removed by etching (FIG. 5G). Figure (h).

[0005]

However, the above-described bump forming method requires a large number of steps, requires high equipment cost, and is expensive.

Also, the height of the formed bump tends to vary. For example, when a solder bump having a height of 30 μm is intended, the height of the formed bump is as follows.
Usually, it varies in the range of 25 to 35 μm.

[0007] These facts are one of the reasons why flip chip mounting has not exploded at present.

In recent years, bumps suitable for flip-chip mounting are formed by directly plating Ni or Au by electroless plating on the Al electrodes 4A of the semiconductor chip 1 formed by the method shown in FIG. A forming method has also been proposed (JP-A-8-130227). According to this method, bumps of a semiconductor chip that can be used for flip chip mounting can be manufactured with a small number of steps and at low cost.

However, even with this method using the electroless plating method, the power supply, the ground,
It is difficult to form all of the plurality of Al electrodes 4A formed as electrodes for various uses such as a ground and a signal terminal with the same thickness. Therefore, when bumps are formed on the Al electrodes 4A, the electrode portions having the bumps do not have the same height, and therefore, when the semiconductor chip 1 having such electrode portions is actually mounted on a substrate. Causes variations in the bonding strength between the bumps of the electrode portions used as a power source, ground, ground, signal terminals, and the like, and the substrate. Therefore, there has been a problem that the electrode portions cannot be reliably joined with the same reliability.

[0010] In the patterning step of the Al layer 4 shown in FIG. 7B, when a plurality of various Al electrodes 4A such as a power supply, a ground, a ground, and a signal terminal are simultaneously formed, Al is inherently amphoteric. Since it is a metal, it is easy to be polarized both positively and negatively. Therefore, when degreasing or pickling the substrate, which is generally performed as a pretreatment for etching, or at the time of etching, each of the Al electrodes 4A becomes positively or negatively. Polarize. Then, in the positively polarized Al electrode 4A, the Al layer 4 becomes thin in a very short time and sometimes disappears. Conversely, A polarized negatively
This is because Al is deposited on the 1-electrode 4A, and the thickness of the Al layer 4 of the plurality of Al electrodes 4A thus formed at the same time varies. Further negatively polarized Al electrode 4A
In this case, in addition to Al ions, positively charged metal ions and organic acid ions are precipitated or replaced, so that the adhesion of plating formed on the Al electrode 4A is reduced.

In the patterning step of the Al layer 4, if the Al layer 4 is formed too thin, the bumps (adhesion improving film 8, diffusion preventing film 9) formed on the Al electrode 4A in the subsequent steps. , Bump metal 11 (see FIG. 8))
When the bump is formed high, the interface between the bump and the Al electrode 4A is easily peeled off and the bump falls down. Therefore, the height is practically 5 μm.
As described above, there is a problem that it is difficult to form a bump.

An object of the present invention is to solve the above-mentioned problems of the prior art. In the semiconductor chip, Al electrodes formed as electrodes for various uses in a semiconductor chip are formed to have the same thickness and these Al electrodes are formed. The electrode parts obtained by forming bumps etc. can be formed at the same height so that the substrate and each electrode part of the semiconductor chip can be joined with the same adhesion strength and with high reliability. Aim. It is another object of the present invention to form bumps having a height of 5 μm or more as needed.

[0013]

According to the present invention, in order to achieve the above object, an electrode portion comprising an Al layer and a metal layer nobler than Al laminated on the Al layer is formed on a semiconductor substrate. A method of forming an Al layer on a semiconductor substrate, laminating a metal layer more noble than Al on at least a portion to be an electrode portion on the Al layer without previously patterning the Al layer into an electrode pattern, Provided is a method for forming an electrode portion of a semiconductor chip, characterized by forming an electrode pattern having a laminated structure of an Al layer and a metal layer more noble than Al by patterning.

In particular, a metal layer nobler than Al is laminated on the entire surface of the Al layer, and then patterned to form an Al layer.
Method of forming an electrode pattern having a laminated structure of a layer and a metal layer nobler than Al, or selectively laminating a metal layer nobler than Al on a portion to be an electrode portion on the Al layer, and then patterning This provides a method for forming an electrode pattern having a laminated structure of an Al layer and a metal layer more noble than Al.

Further, after the formation of the electrode pattern, a method of forming a protective film on the surface of the semiconductor chip so that the electrode pattern is opened, particularly, forming the protective film so that the opening area of the electrode pattern is reduced, The present invention provides a method of laminating an electrode upper pattern on an electrode pattern.

Further, after forming the electrode pattern or the protective film, the Al layer and the Al layer are formed by sintering.
A method for forming a metal diffusion layer between a metal layer and a noble metal layer is provided.

Further, the present invention provides a semiconductor chip having the electrode portion formed as described above. Further, the present invention provides a method for mounting the semiconductor chip having the electrode portion formed as described above on a substrate. (2) Place a solder ball on the electrode pattern of the semiconductor chip to form a bump, and place it on the substrate electrode pad on which the semiconductor chip is to be mounted. (3) coating or printing an anisotropic conductive agent, or applying an anisotropic conductive film on the electrode part of the semiconductor chip, or the electrode part of the substrate, A method of heating and pressing by aligning the electrode parts, (4) on the electrode part of the semiconductor chip, or on the electrode part of the substrate, apply or print a conductive paste, or paste a conductive film,
Alternatively, the present invention provides a method in which a resin bump is placed and both electrode portions are positioned and heated and pressed, and (5) a method in which an electrode portion of a semiconductor chip and an electrode portion of a substrate are connected by a wire bonding method.

In the method for forming an electrode portion of a semiconductor chip, the semiconductor chip, or the method for mounting a semiconductor chip according to the present invention, the semiconductor substrate is a Si substrate, a Ga-As substrate, a sapphire substrate, and a thin film is formed on the surface of these substrates. And substrates formed from various materials such as those described above.

The Al layer means not only the Al layer but also the Si layer.
Al-Si layer containing Si, Al containing Si and Cu
-Al-Cu layers, Al-Cu layers containing Cu, Al alloy layers such as Al-Si-Ti layers containing Si and Ti,
Alternatively, an Al-based metal layer containing Al as a main component is included.

The semiconductor chip includes various transistors, thyristors and the like in addition to the LSI.

According to the method of forming an electrode portion of the present invention, when forming an electrode portion on a semiconductor substrate, first, an Al layer is formed on the semiconductor substrate, and then the Al layer is previously patterned into an electrode pattern by etching or the like. Instead, a metal layer more noble than Al is laminated on the Al layer. In this case, Al
The more noble metal layer may be formed on the entire surface of the Al layer as long as it is formed at least on the portion of the Al layer that will become the electrode portion, or selectively formed on the portion of the Al layer that becomes the electrode portion. It may be formed. In the former case, an electrode pattern is formed by patterning a laminate of a metal layer and an Al layer that are nobler than Al, and in the latter case, selective electrode portions on the Al layer are selectively formed. An electrode pattern is formed by patterning so as to leave the noble metal layer formed on the substrate. In any case, at the time of patterning for forming an electrode pattern, that is, at the time of etching, the outermost layer of the substrate is not an Al layer, but a metal layer which is more noble than Al. Excessive elution due to the positive polarization of the layer, and the loss of the portion to be left as a pattern can be prevented, and the Al layer of the electrode portion can be prevented from being negatively polarized. For this reason, it is possible to prevent the thickness of the Al layer constituting the Al electrode from being varied. Also, Al
Even when bumps and the like are formed on the electrodes, each electrode portion can be formed at the same height. Therefore, when a semiconductor chip having such electrode portions is mounted on a substrate, each electrode portion can be reliably and reliably joined with uniform adhesion.

According to the method for forming an electrode portion of the present invention, Al
Since a predetermined thickness can be ensured as the thickness of the Al layer constituting the electrode, it is possible to improve the adhesion between the bump formed on the Al electrode and the underlying Al layer.
Therefore, it is possible to form a bump having a height of 5 μm or more if necessary.

In the present invention, the metal layer which is more noble than Al also has the function of the adhesion improving film or the diffusion preventing film formed on the conventional Al electrode.

[0024]

DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS Hereinafter, a method for forming an electrode portion of a semiconductor chip according to the present invention will be described in detail with reference to the drawings. In each of the drawings, the same reference numerals represent the same or equivalent components.

FIG. 1 and FIG. 2 are process charts showing the basic aspects of the method for forming the electrode portions 100a and 100b of the present invention.

In the method of forming these electrode portions, first, an Al layer 4 is formed on the Si substrate 2 of the semiconductor chip 1 (FIGS. 1A and 2A). The thickness of the Al layer 4 can be appropriately determined according to the use of the semiconductor chip 1 and the like, but is preferably about 1 to 10 μm.
The formation method of the Al layer 4 is the same as that of the conventional example.
The Al layer 4 may be deposited on the entire surface of the substrate 2. Also, A
As the Si substrate 2 on which the l layer 4 is to be adhered, a Si wafer having an insulating layer made of silicon oxide having a thickness of about 2 μm or less (see the insulating layer 3 in FIGS. Any Si wafer on which such an insulating layer is not formed can be used.

Next, a metal layer 20 which is nobler than Al is laminated on the Al layer 4 (FIG. 1C). As the metal layer 20 which is nobler than Al, Si, Zn, Ta, Sn, Pb, A
g, Au, Pt, As, Bi, Sb, Se, Cd, C
u, Ni, Cr, In, Fe, Mo, W, Co, Rh,
A single layer of a metal selected from Ti and Pd can be formed. Alternatively, as shown in FIG.
The first metal layer 21 and the second metal layer 20
Of the metal layer 22 may be formed, more metal layers may be stacked, or an alloy layer of these metals may be formed.

The thickness of the metal layer 20, which is more noble than Al, depends on the type of the metal to be formed and its layer structure. For example, as the metal layer 20, which is nobler than Al, Cu is laminated on the Al layer 4. In this case, the thickness is preferably about 0.01 to 10 μm.

The method of forming the metal layer 20 which is nobler than Al is as follows.
An electroplating method, an electroless plating method, a spraying method, a gas phase method, or the like can be used depending on the type of the metal layer 20 to be laminated as a metal nobler than Al.

Here, in the case of electroplating, Cu,
A metal layer of Ni, Co, Sn, Ag, Au, Pd, Ni or the like can be preferably formed. All of these have a pH of 3 to 10, a bath temperature of 20 to 70 ° C, and a cathode current density of 0.0
It can be carried out preferably at 1 to 5 A / dm ² .

In the case of electroless plating, Ni-P, N
i-B, Ni-WB, Ni, Ni-P-W, Co, C
A metal layer such as o-Ni, Cu, Cu-Ni-P, Pd, or Au can be preferably formed. The reducing agents used in the electroless plating method include hydrazine, formalin, D
MAB (dimethyl amino borane), NaBH ₄ , KBH
₄ , TMAB (trimethyl amino borane), formic acid and the like are preferable. In addition, it is preferable that the electroless plating solution is usually adjusted to pH 3 to 9 and bath temperature to about 20 to 95 ° C. Note that the electroless plating method also includes a displacement plating method.

In the case of the spraying method, W, Mo, Ti, C
A metal layer such as r or Cu can be preferably formed.
As the thermal spraying method, a low-temperature thermal spraying method can also be used. In this case, the surface temperature of the object to be plated can be 300 ° C. or less.

As the vapor phase method, a physical method such as vacuum deposition, sputtering, or ion plating, or a chemical method such as exposing an object to be plated to a vapor of an organometallic compound can be used.

As a method for forming the metal layer 20 which is nobler than Al, the vapor phase method is preferable among the above-mentioned methods from the viewpoint of productivity and quality.

Prior to laminating the metal layer 20 which is more noble than Al on the Al layer 4, the surface of the Al layer 4 may be subjected to a pretreatment, if necessary. For example, when a Ni layer is laminated on the Al layer 4 by electroplating, a Zn substitution film 19 may be formed on the surface of the Al layer 4 in advance (FIGS. 1B and 2).
(B)).

After laminating the metal layer 20 which is nobler than Al on the Al layer 4, these lamination areas are patterned to
An electrode pattern 30 in which a metal electrode 20A which is nobler than Al is laminated on the electrode 4A (FIG. 1 (d), FIG. 2)
(D)). In the case of the embodiment of FIG. 2, the metal electrode 20A which is more noble than Al on the Al electrode 4A is the first metal electrode 21A.
A and a laminated structure of the second metal electrode 22A.

In the step of forming the electrode pattern 30, the circuit section 4X can be patterned in addition to the electrode pattern 30, as in the conventional patterning step shown in FIG. 7B.

As a method of forming the electrode pattern 30, a mask is formed by using a photolithography method or the like as in a conventional example,
It is sufficient to etch the Al layer 4 and the metal layer 20 which is more noble than Al. In this etching step, the outermost layer of the substrate to be etched is not the Al layer 4 as in the conventional example (see FIG. 7). The metal layer 20 is more precious. For this reason, it is possible to prevent the outermost layer of the electrode pattern 30 from being excessively eluted during the etching. Therefore, it is possible to uniformly form all the Al layers 4 of the plurality of electrode patterns 30 formed for various uses such as a power supply, a ground, a ground, and a signal terminal at a predetermined height. Further, when bumps are formed on the electrode patterns 30 as necessary, it is possible to prevent variations in the height of the electrode portions including the bumps. Therefore, when this semiconductor chip 1 is mounted on a substrate, it is possible to reliably and reliably join the electrode portions of the semiconductor chip 1 to the electrode portions of the substrate with uniform adhesion strength.

For the electrode pattern 30 of the semiconductor chip 1 formed as described above, a protective film 7 is formed on the surface of the semiconductor chip 1 so that the electrode pattern 30 has an opening, so that it has versatility. Electrode section 10 of semiconductor chip 1
0a, 100b (FIG. 1)
(E), FIG. 2 (e)). Here, the material and method for forming the protective film 7 are not particularly limited. For example, the protective film 7 can be formed in the same manner as a conventional passivation film.

Although the basic embodiment of the present invention has been described with reference to FIGS. 1 and 2, the present invention can take various other forms.

For example, in the example shown in FIG. 1 or FIG. 2, the metal layer 20 which is more noble than Al is formed on the entire surface of the Al layer 4 (FIGS. 1 (c) and 2 (c)). The metal layer 20 which is nobler than Al does not always need to be formed on the entire surface of the Al layer 4. For example, as shown in FIG. 6 to be described later, when the Al layer 4 is etched for patterning the electrode portion, the outermost layer of the portion to be the electrode portion may be a metal layer 20 which is more noble than Al. .

The electrode section 100 shown in FIGS.
c, 100d, bump 4 on electrode pattern 30
0 can be formed. In this case, the bump 40
It may be formed from a single layer of solder, Au, Cu, or the like, or may be formed by laminating a plurality of metal layers. For example, as shown in FIG. 3, the first bump metal layer 41 and the second bump metal layer 4
2, or a third bump metal layer 43 may be further laminated as shown in FIG. The layer configuration of these bumps 40 can be appropriately determined according to the requirements such as solderability, wire bonding property, corrosion resistance, and adhesion to a resin film.

In the present invention, after the electrode pattern 30 is formed as shown in FIG. 1D or FIG. 2D, or after the electrode pattern 30 is formed as shown in FIG. 1E or FIG. After the film 7 is formed, the Al electrode 4A and the metal electrode 20 nobler than Al are formed by heat treatment such as sintering and baking.
It is preferable to form a metal diffusion layer with A, and it is particularly preferable to perform sintering. As a result, the adhesion between the Al electrode 4A and the metal electrode 20A which is more noble than Al can be improved, and if necessary, a bump having a height of more than 5 μm on the metal electrode 20A which is noble than Al, for example, the height 2
It is also possible to form bumps of 0 to 60 μm or more.

The condition of sintering depends on the kind of metal constituting the metal electrode 20A which is more noble than Al.
Usually, the pressure can be 1 atmosphere to 10 ⁻⁴ Torr and the temperature can be 300 to 700 ° C. in an atmosphere such as the atmosphere, an inert gas, or a reducing gas.

The semiconductor chip having the electrode portion obtained by the forming method of the present invention can be prepared according to a conventional method according to the presence or absence of bumps in the electrode portion, the type of metal of the outermost layer constituting the electrode portion, and the like. It can be mounted on a substrate in various ways.

For example, the electrode portion formed by the method of the present invention and the electrode pad of the substrate on which the semiconductor chip having the electrode portion is to be mounted may be positioned and heated and pressed. A solder ball is placed on the electrode pattern formed by the method of the present invention to form an electrode portion having a bump, and the electrode portion and the electrode portion of the substrate on which the semiconductor chip is to be mounted are positioned and heated and pressed. Good. Further, on the electrode portion formed by the method of the present invention, or on the electrode portion of the substrate on which the semiconductor chip is to be mounted, an anisotropic conductive agent is applied or printed, or an anisotropic conductive film is attached, The electrodes may be positioned and heated and pressed. Further, on the electrode portion formed by the method of the present invention, or on the electrode portion of the substrate on which the semiconductor chip is to be mounted, a conductive paste is applied or printed, or a metal foil, a conductive film such as a carbon foil is attached, Alternatively, a resin bump may be placed, and the electrodes of both the semiconductor chip and the substrate may be positioned and heated and pressed. Further, the electrode portion formed by the method of the present invention may be connected to the electrode portion of the substrate on which the semiconductor chip is to be mounted by a wire bonding method.

[0047]

DESCRIPTION OF THE PREFERRED EMBODIMENTS The present invention will be specifically described below based on embodiments.

Example 1 According to the formation process shown in FIG. 1, an electrode portion was formed on a semiconductor chip as follows.

First, as a semiconductor substrate 2 on which a semiconductor chip 1 is formed, a 5-inch wafer for C-MOS was used, and an Al layer 4 was formed to a thickness of 3 μm on the entire surface by a vacuum deposition method (FIG. 7A). .

Next, an Ni plating layer having a thickness of 2 μm was formed on the surface of the Al layer 4 as a metal layer 20 which is nobler than Al by performing an electroplating method as follows (FIG. 3C). That is, the Al layer 4 is washed with a cleaning liquid containing a nonionic surfactant at 50 ± 2 ° C. for 2 to 3 minutes, followed by washing with pure water, and further with 62% HNO ₃ 10
3 ± 25 ° C. using an etching solution consisting of
Washed for 0 seconds. Then, KOH50g / L, ZnO1
A so-called zincate bath composed of 0 g / L and 50 g / L of potassium gluconate was prepared and immersed in the bath at 30 ± 2 ° C. for 30 seconds to form a Zn-substituted film 19 on the surface of the Al layer 4 (FIG. 2B). . After washing, nickel sulfate 10g / L, boric acid 1
0 g / L, nickel chloride 10 g / L, pH4.
5, a current density of 0.1 A at 55 ± 3 ° C.
/ Dm ² to form a Ni plating layer (20) (FIG. 3 (c)).

After the formation of the Ni plating layer (20), the substrate was washed with pure water, dried, and then etched by photolithography so that the electrode pattern 30 and the circuit portion 4X remained (FIG. 4D).

Then, in order to improve the adhesion between Si / Al / Ni, sintering was performed at 500 ° C. and 10 ⁻³ Torr for 20 minutes.

Thereafter, only the electrode portion of 100 × 100 μm is left (that is, the electrode pattern 30 is opened).
A protective film (passivation film) 7 made of silicon nitride was formed on the semiconductor chip 1 to obtain an electrode portion 100a of the embodiment (FIG. 3E).

The obtained electrode portion 100a was immersed in a 5% HCl solution for 30 seconds, washed with pure water, dried, and dried.
6: 4 eutectic solder balls of mφ (Sn 60%, Pb40
%) Was placed on the electrode portion 100a and fused at 240 ° C. to form a bump.

The time required from the formation of the Al layer 4 to the formation of the bump was about 15 hours.

After the solder balls were fused, they were cooled and the solder shear strength was measured by a conventional method. As a result, the weight was 120 g or more in any of the electrode portions such as the power source, the ground, the ground, and the signal terminal. Generally, if the solder shear strength is 25 g or more, there is no practical problem, and it is understood that the electrode portion of this embodiment has a sufficient adhesion strength.

The height of the obtained bump is 27-30.
μm. Conventionally, when a solder bump is formed by an electroplating method, the height of the obtained bump varies in the range of 25 to 35 μm, so that the bump of this embodiment has a very high height uniformity. I understand.

Further, according to this embodiment, while the time required for forming the bump on the Si substrate is about 15 hours, the Al electrode is formed by the conventional method shown in FIGS. 7 and 8.
If solder bumps are to be formed on top, 5
About a day is needed. Therefore, according to this example, it can be seen that an electrode portion having a bump can be formed in a short time.

The semiconductor chip on which the bumps were formed in this example was mounted on a ceramic IC package as follows. That is, the ceramic IC in which the outermost layer is formed of a laminated structure (Ni / Au) of a Ni layer and an Au layer
The bumps of the semiconductor chip on which the bumps are formed in the embodiment are aligned and fixed to the pads of the package, and 230
Fused at ℃.

As a result, it was possible to easily join.
Further, the semiconductor chip was removed and joined again, so-called "repayer" was performed. As a result, the repayer was easy. In the electrode portion having the bumps formed in this embodiment, since the diffusion adhesion layer is completely formed between each layer of Si (substrate) / Al / Ni / solder, it is possible that the Al / Ni is peeled off at the time of the repeater. There was no occurrence of solder wetting failure between Ni / solder.

Embodiment 2 In the same manner as in Embodiment 1, a C-MOS
A 5-inch wafer was used, and an Al layer 4 was formed to a thickness of 3 μm on the entire surface by vacuum evaporation (FIG. 1A).
A Zn-substituted film 19 was formed on the surface of the l-layer 4 (FIG. 2B).

Next, by performing an electroless plating method as described below, Ni is used as the metal layer 20 which is nobler than Al.
A -P electroless plating layer (20) was formed with a thickness of 2 μm (FIG. 3C). That is, A having a Zn-substituted film 19 formed on its surface
Nickel sulfate 10 g / L, citric acid 10
g / L, potassium acetate 10 g / L, potassium hypophosphite 20 g / L, and a plating solution having a pH of 4.5 was prepared.
Plated at 90 ° C.

After the formation of the Ni-P electroless plating layer (20), a pattern was formed by a photolithographic method in the same manner as in Example 1 so that only the electrode pattern 30 and the circuit portion 4X remained (FIG. 4D). .

Next, in order to improve the adhesion between Si / Al / Ni-P, sintering was performed at 500 ° C. and 10 ⁻³ Torr for 20 minutes.

Thereafter, the electrode pattern 30 of 100 μmφ is formed.
A protective film 7 of polyimide was formed on the semiconductor chip 1 so that the opening was formed, and an electrode portion 100a of the example was obtained (FIG. 3E).

The obtained electrode portion 100a was immersed in a 5% HCl solution for 30 seconds, washed with pure water, dried, and then dried.
A 9: 1 solder ball having a diameter of 100 μm was placed on “a”, and was fused at 300 ° C. using a flux to form a solder bump.

The solder shear strength of the thus obtained electrode portion 100a having solder bumps was measured in the same manner as in Example 1. As a result, the power, ground, ground and signal terminals were all 120 g or more.

Also, the height of the bumps is the same as in the first embodiment.
38 to 40 μm, and it was found that all the electrodes were almost the same.

The bumps of the electrode portions of the semiconductor chip formed in this embodiment are formed on the Cu layer of the glass ceramic substrate by N
Align with i / Au plated pads, 30
Flip chip mounting was performed by fusing at 0 ° C., and each electrode portion could be easily joined. Further, the semiconductor chip was removed from the glass ceramic substrate, and the interface of Al / Ni-P / solder was observed.
No bonding failure was observed.

Embodiment 3 In the same manner as in Embodiment 1, a C-MOS
A 5-inch wafer was used, and an Al layer 4 was formed to a thickness of 3 μm on the entire surface by vacuum evaporation (FIG. 1A).
A Zn-substituted film 19 was formed on the surface of the l-layer 4 (FIG. 2B).

Next, a Cu layer (20) having a thickness of 2 μm was formed as a metal layer 20 which is nobler than Al by performing an electroplating method as follows (FIG. 9C). That is,
Potassium pyrophosphate 100g / L, Copper pyrophosphate 10g
/ L, ammonia water 1ml / L, additive mainly composed of sulfur compound (CP60, manufactured by World Metal Co., Ltd.)
A plating solution consisting of 3 ml / L was adjusted to pH 8.5,
Plating was performed at 0 ° C. and a current density of 0.5 A / dm ² .

After the formation of the Cu layer (20), a pattern was formed by a photolithography method so as to leave the electrode pattern 30 and the circuit portion 4X in the same manner as in Example 1 (FIG. 4D).

Next, in order to improve the adhesion between Si / Al / Cu, sintering was performed at 400 ° C. and 10 ⁻² Torr for 20 minutes.

Then, PSG is applied to the semiconductor chip 1 so that the electrode pattern 30 of 100 μm × 100 μm is opened.
Was formed, and an electrode portion 100a of the example was obtained (FIG. 3E).

The obtained electrode portion 100a was immersed in a 2% H ₂ SO ₄ solution for 30 seconds, etched, washed with pure water, dried, and then placed on the electrode portion 100a with a 100 μmφ no-male-less solder (Ag 2%, Sn 97% , Sb1%) balls were fused at 270 ° C. using a flux to form solder bumps.

The solder shear strength of the thus obtained electrode portion 100a having solder bumps was measured in the same manner as in Example 1. As a result, it was 120 g or more in any of the power supply, ground, ground, and signal terminals.

The bumps of the semiconductor chip formed in this embodiment were aligned with the pads of a CSP (Chip size package) having pads made of Ag-Pd paste, and were fused at 270 ° C. Each electrode part was able to be joined. Further, the semiconductor chip was removed, and each interface of Si / Al / Cu / Solder / Ag-Pd was observed, but no bonding failure was found. In this electrode part, the layer between the Al layer 4 and the bump metal is C
Because of u, the response speed was reduced to 1/3 of the conventional solder bump.

The Cu layer (20) functions as a stress buffer film between the semiconductor chip 1 and the substrate 2.

Embodiment 4 In the same manner as in Embodiment 1, a C-MOS
A 5-inch wafer was used, and an Al layer 4 was formed to a thickness of 5 μm on the entire surface thereof by a vacuum evaporation method without forming a Zn substitution film 19 in advance (FIG. 1A).

Next, by performing displacement plating as follows, the metal layer 20 which is nobler than Al is formed as 9: 1.
Solder (Sn: about 90%, Pb: about 10%) layer is 1 μm thick
It was formed (FIG. 3 (c)). That is, the Al layer 4 is heated to 50 ± 2 ° C. using a cleaning liquid comprising a nonionic surfactant.
For 2 minutes, followed by pure water and a further 62%
It was immersed in HNO ₃ 10 ml / L for 10 seconds and washed with water. After that, potassium stannate 20g / L, potassium leadate 2g / L
L, potassium gluconate 30 g / L, EDTA4K10
g / L of the plating solution was adjusted to pH 8.5 with KOH. Immerse in this plating solution at room temperature for 30 seconds, wash with water,
Dried. When the plating film thus formed was analyzed, it was found to be Sn 87% and Pb 13%.

After the formation of the 9: 1 solder layer (20), a pattern was formed by photolithography so that the electrode pattern 30 and the circuit portion 4X remained in the same manner as in Example 1 (FIG. 4D). Thereafter, in order to improve the adhesion between Si / Al / Sn + Pb, baking was performed at 230 ° C. for 30 minutes.

Next, a silicon nitride protective film 7 was formed so that the electrode pattern 30 of 100 μmφ was opened, and an electrode portion 100a of the example was obtained.

The obtained electrode portion 100a was washed with a 5% borofluoric acid solution for 30 seconds, washed with water, dried, and then fused with a 6: 4 eutectic solder ball of 100 μmφ on the electrode portion 100a. Solder bumps were formed. In this case, a solder bump could be formed without flux.

Electrode portion 100a having this solder bump
Was measured in the same manner as in Example 1, and found to be 100 g or more in any of the electrode portions such as the power supply, the ground, the ground, and the signal terminal.

Example 5 According to the formation process shown in FIG. 2, an electrode portion was formed on a semiconductor chip as follows.

First, in the same manner as in the first embodiment, the Si substrate 2
A 5-inch wafer for C-MOS is used, an Al layer 4 is formed to a thickness of 3 μm on the entire surface by vacuum evaporation (FIG. 2A), and a Zn-substituted film 19 is formed on the surface of the Al layer 4. (FIG. 2B), and a metal layer 20 which is nobler than Al
A Ni plating layer having a thickness of 2 μm was formed as the first metal layer 21 (FIG. 3C). Further, an Au plating layer is formed on the Ni plating layer (21) as the second metal layer 22,
A 0.5 μm-thick film was formed under the following electroplating conditions (FIG. 3C). That is, a pH of ₂ g / L of KAu (CN) ₂ , 20 g / L of potassium citrate, and 5 g / L of citric acid,
Using an electrolytic Au plating solution of 4.5, plating was performed at 45 ± 3 ° C. at a current density of 0.1 A / dm ² .

After the formation of the Ni plating layer (21) and the Au plating layer (22), a pattern was formed by a photolithography method so that the electrode pattern 30 and the circuit portion 4X remained (FIG. 4D).

Next, in order to improve the adhesion between Si / Al / Ni / Au, sintering was performed at 400 ° C. and 10 ⁻² Torr for 10 minutes.

Thereafter, a silicon nitride protective film 7 was formed so that the electrode pattern 30 of 100 μm × 100 μm was opened, and an electrode portion 100b of the embodiment was obtained (FIG. 9E).

With respect to the obtained electrode portion 100b, 2
It was mounted on a substrate by a conventional wire bonding method using a 0 μm Au wire. As a result, the electrode portion 1 of the semiconductor chip
00b and the electrode portion of the substrate were successfully bonded. Also, 100 μm is applied to the electrode portion 100 b of the semiconductor chip 1.
A bump was formed by mounting and fusing a 6: 4 m-sized solder-plated Cu ball.

The electrode portion 1 having the bumps thus obtained
When the solder shear strength of 00b was measured in the same manner as in Example 1, it was 120 g or more in any of the electrode portions such as the power supply, the ground, the ground, and the signal terminal, and the solder shear strength of each of the electrode portions was substantially the same.

Example 6 In accordance with the formation process shown in FIG.
Using a 5 inch wafer for MOS, an Al layer 4 is formed to a thickness of 3 μm on the entire surface by vacuum evaporation (FIG. 2)
(A)) On the surface of the Al layer, in the same manner as in Example 1,
A Zn-substituted film 19 is formed (FIG. 4B), and Al
N as the first metal layer 21 constituting the noble metal layer
An i-plated layer was formed with a thickness of 2 μm. Further, a Pd / Au plating layer was formed as a second metal layer 22 on the Ni plating layer under the following electroplating conditions. That is, PdCl ₂ 5 g /
L, EDTA4K20g / L, triethanolamine 2
A Pd plating layer was formed to a thickness of 0.3 μm by electroplating at 50 ° C. and a current density of 0.5 A / dm ² using an electrolytic Pd plating solution consisting of 0 g / L and a pH of 5.0. CN) _{2 2} g / L, potassium citrate 20
g / L, pH 4.5 consisting of 10 g / L of potassium phosphate
50 ° C., current density 0.5 A using electrolytic Au plating solution
An Au plating layer having a thickness of 0.1 μm was formed by electroplating at / dm ² .

After the formation of the Ni plating layer, the Pd plating layer, and the Au plating layer, patterns were formed by a photolithography method so that only the electrode pattern 30 and the circuit portion 4X remained (FIG. 4D).

Next, in order to improve the adhesion between Si / Al / Ni / Pd / Au, ² ° C. at 500 ° C. and 10 ⁻² Torr was used.
Sintered for 0 minutes.

Thereafter, the electrode pattern 30 of 100 μmφ is formed.
A protective film 7 of silicon nitride was formed so that the opening was formed, and an electrode portion 100b of the example was obtained.

An anisotropic conductive film is sandwiched between the obtained electrode portion 100b and an electrode pad of a plastic IC package formed by a build-up method, and 2 kg
/ Cm ² at 200 ° C. by thermocompression bonding.
As a result, a good adhesive bond could be formed between the electrode portion 100b of the semiconductor chip 1 and the electrode pad of the IC package in a short time.

Further, a pre-shear cooker test was conducted by a conventional method. In this case, Ni / Pd / Au was used as a control.
An electrode portion was formed in the same manner as the electrode portion of Example 6 except that the plating layer was not formed, and a semiconductor chip having this electrode portion was bonded to an electrode pad of an IC package, and subjected to a preshear cooker test. As a result, Ni / Pd / Au
The electrode part of Example 6 in which the plating layer was formed was Ni / Pd /
Approximately 6 times (7 times as large as an Al electrode without an Au plating layer)
000 hours), indicating good corrosion resistance.

Embodiment 7 In the same manner as in Embodiment 1, a C-MOS
A 5-inch wafer was used, and an Al layer 4 was formed to a thickness of 3 μm on the entire surface by a vacuum evaporation method (FIG. 1A).

Next, an electroless Ni—B plating layer was formed as a metal layer 20 which is nobler than Al by performing an electroless plating method as follows (FIG. 9C). That is, the Al layer 4 is washed at 30 ° C. for 30 seconds using a neutral detergent, washed with pure water, and further used with a mixed solution of 1% HNO ₃ and 1% HF to remove Al oxide. 2 at room temperature
Treated for 0 seconds and washed with water. Then, first, PdCl ₂
P consisting of 0.1 g / L, 10 ml / L of 36% HCl
Activated by immersing in d solution at room temperature for 20 seconds, washing with water, nickel sulfate 10 g / L, citric acid 10 g / L, ammonium chloride 10 g / L, DMAB (dimethyl amino)
borane) The pH of the electroless plating solution of 2 g / L was adjusted to pH6.
5 and using this plating solution at 60 ° C.
A -B plating layer was formed to a thickness of 2 μm.

After forming the electroless Ni-B plating layer, washing,
After drying, the electrode pattern 30 and the circuit portion 4X are formed by photolithography.
Only the pattern was formed so that only the pattern remained (FIG. 4D).

Next, in order to improve the adhesion between Si / Al / Ni-B, sintering was performed at 500 ° C. and 10 ⁻³ Torr for 20 minutes.

Thereafter, a protective film 7 made of silicon nitride was formed on the semiconductor chip 1 so that the electrode pattern 30 of 100 μm × 100 μm was opened, and an electrode portion 100a (FIG. 9E) of the embodiment was obtained.

On the obtained electrode portion 100a, 100 μm
A 6: 4 eutectic solder ball of φ was placed and fused to form a solder bump.

After cooling, the solder shear strength of the electrode portion 100a having the solder bumps obtained in this manner was measured in Example 1.
As a result, it was found that the weight was 120 g or more in any of the electrode portions such as the power supply, the ground, the ground, and the signal terminal. The height of the bumps was substantially the same for all electrodes.

Example 8 In the same manner as in Example 1, a 5-inch wafer for C-MOS was used as a Si substrate, and an Al layer was formed to a thickness of 3 μm on the entire surface by vacuum evaporation. Next, T
i 1000Å (0.1 μm) followed by Cu 4000Å
(0.4 μm).

Further, an electrolytic copper plating layer was formed to a thickness of 10 μm on the entire surface under the following conditions. That is, copper sulfate 200 g /
L, 98% H ₂ SO ₄ 100 g / L, additive (ABC-9
0, manufactured by World Metal Co., Ltd.) using a plating solution consisting of 20 ml / L at 20 ° C. and a cathode current density of 1 A / dm ²
To form a Cu plating layer.

After the formation of the Cu plating layer, the film was washed with water and dried, and a pattern was formed by a photolithography method so that the electrode portion and the circuit portion remained. Next, sintering was performed at 400 ° C. for 20 minutes in order to improve the adhesion between Si / Al / Ti / Cu / Cu.

Thereafter, a protective film of polyimide was formed so that the electrode pattern of 100 μmφ was opened.

The obtained electrode portion was washed with a 5% H ₂ SO ₄ solution, washed with water, and then a 6: 4 solder ball having a diameter of 100 μm was placed on the electrode portion and fused to form a solder bump.

After cooling, the solder shear strength of the electrode portion having the solder bumps was measured in the same manner as in Example 1. As a result, the power, ground, ground, and signal terminals were all 100 g or more.

Example 9 In the same manner as in Example 1, a 5-inch wafer for C-MOS was used as a Si substrate, and an Al layer was formed to a thickness of 3 μm on the entire surface by vacuum evaporation. Next, T
i 1000Å (0.1 μm) followed by Cu 4000Å
(0.4 μm).

Next, a pattern was formed by a photolithography method so that the electrode portion and the circuit portion remained.

Thereafter, a polyimide protective film was formed while leaving only the electrode portion of 100 μmφ (that is, so that the electrode pattern was opened).

Further, an electroless plating method was performed on the electrode portion on which the protective film of polyimide was formed under the following conditions, and a Ni-P layer having a thickness of 5 μm was formed on the patterned Cu layer of the electrode portion.
A 0.1 μm u layer was formed. That is, first, the electrode pattern on which the polyimide protective film was formed was immersed in a 5% H ₂ SO ₄ aqueous solution at normal temperature for 30 seconds, washed with water, and then 0.1 g of PdCl ₂ /
L, 36% HCl was immersed in a Pd active solution consisting of 10 ml / L at 25 ° C. for 30 seconds and washed with water. Next, nickel sulfate 10 g / L, lactic acid 20 g / L, succinic acid 20 g / L,
The pH of an electroless plating solution of sodium hypophosphite 20 g / L and NaOH was adjusted to 5.0, and a 5 μm-thick Ni—P layer was formed by electroless plating at 90 ° C., and after washing with water,
Further, a plating solution of Au sulfite consisting of 10 g / L of sulfur sulfite, 30 g / L of sulfur dioxide, and 20 g / L of ethylenediamine was prepared, and electroless plating was performed at 80 ° C. to form a 0.1 μm thick Au layer. . In the process of forming the Ni-P layer and the Au layer, the outermost layer of the underlying electrode pattern is a Cu layer, and the Cu layer disappears during the process of forming the Ni-P layer and the Au layer. I never did.

After the formation of the Ni-P layer and the Au layer, the layers were washed with water, dried, and baked at 150 ° C. and 10 ⁻² Torr for 20 minutes to improve the adhesion between the respective layers.

The electrode section 100 having the layer structure shown in FIG.
c was formed. In the figure, 4A is an Al electrode, 21A is a Ti electrode, 22A is a Cu electrode, 30 is these Al electrodes 4A,
3 shows an electrode pattern including a Ti electrode 21A and a Cu electrode 22A. Reference numeral 7 denotes a protective film made of polyimide; 41, a Ni-P layer formed by electroless plating;
Reference numeral 2 denotes an Au layer formed by electroless plating, and reference numeral 40 denotes a bump metal formed from the Ni-P layer 41 and the Au layer 42.

On the obtained electrode portion 100c, 100 μm
A bump was formed by placing and fusing 6: 4 solder balls of φ. After cooling, the electrode portion 1 having the bumps
The solder shear strength of 00c was measured as in Example 1. As a result, the weight was 130 g or more in any of the electrode portions such as the electrode, the ground, the ground, and the signal terminal. The height of the bump is 39 to 4 in any of the electrode portions.
It was 2 μm.

For comparison, the conventional method, that is, FIG.
(C) An Au plating layer was formed directly on the Al electrode 4A in exactly the same manner as in Example 9 above, and solder balls were fused to form bumps. The solder shear strength of the electrode part for this comparison was 60 g at the maximum and 0 g at the minimum. This solder shear strength 0g
In the step of forming the Ni-P plating layer on the Al electrode 4A, the electrode part is eluted by polarization of the Al electrode to the anode, the Al electrode disappears, and the Ni-P plating layer is directly laminated on the Si substrate. It had been.

Example 10 In the same manner as in Example 1, a 5-inch wafer for C-MOS was used as a Si substrate, and an Al layer was formed to a thickness of 3 μm on the entire surface by vacuum evaporation. Next, by the evaporation method,
Cr 1000Å (0.1 μm) followed by Cu 5000
Å (0.5 μm) was laminated. Next, the electrode portion (100
μmφ) and a pattern was formed by a photolithography method so that the circuit portion was left. Next, sintering was performed at 300 ° C. for 20 minutes in order to improve the adhesion between Al / Cr / Cu. After that, the electrode pattern of 100 μmφ is opened so that P is opened.
An SG protective film was formed.

Further, electroless Ni-B plating, electroless Pd-P plating, and electroless Au plating were sequentially performed by the following method, and Ni-based plating was performed on the electrode pattern on which the protective film of PSG was formed.
B plating layer 4 μm, Pd-P plating layer 0.2 μm, Au
A plating layer of 0.05 μm was sequentially laminated. That is, 5% H ₂
After immersing in SO ₄ aqueous solution at room temperature for 30 seconds, washing with water, PdC
It was immersed in a Pd active solution consisting of 0.1 g / L of l _{2 and} 20 ml / L of 36% HCl at 50 ° C. for 30 seconds. After washing with water
Nickel sulfate 20 g / L, citric acid 20 g / L, NH ₄
Cl 20g / L, DMAB (dimethyl amino borane)
A plating solution consisting of 3 g / L was adjusted to pH 6.2 with aqueous ammonia.
The resultant was plated at 60 ° C. for 30 minutes to obtain 4 μm of Ni—B. After washing with water, PdCl ₂
A plating solution composed of 2 g / L, 20 g / L of EDTA4K, 20 g / L of triethanolamine, and 20 g / L of sodium hypophosphite was adjusted to pH 8.2, and the pH was adjusted to 80 using this.
Pd was plated for 10 minutes to obtain 0.2 μm of Pd-P. After washing with water, KAu (CN) _{2 2} g / L, citric acid 20 g /
The pH of an electroless Au plating solution consisting of 20 g / L of L and NH ₄ Cl was adjusted to 4.5, and 0.05 μm of Au was formed on Pd at 90 ° C. for 5 minutes using this solution.

After washing with water and drying, sintering was performed at 200 ° C. for 20 minutes to improve the adhesion between the layers. Thus, the electrode portion 100d having the layer configuration shown in FIG. 4 was formed. In the figure, 4
A is an Al electrode, 21A is a Cr electrode, 22A is a Cu electrode,
Reference numeral 30 denotes the Al electrode 4A, the Cr electrode 21A and the Cu electrode 21A.
This shows an electrode pattern composed of the electrodes 22A. Also,
7 is a protective film made of PSG, 41 is a Ni-B layer formed by electroless plating, 42 is a Pd-P layer formed by electroless plating, and 43 is Au formed by electroless plating.
A layer 40 represents a bump formed of the Ni-B layer 41, the Pd-P layer 42, and the Au layer 43.

Using the conductive paste, resin bumps were formed on the thus obtained electrode portion 100d by screen printing. When the solder shear strength of the resin bump was measured in the same manner as in Example 1, the result was 70 to 90 g.

Further, the resin bumps of the above-mentioned semiconductor chip were positioned and mounted on an electrode portion formed by previously printing a conductive paste on a bare chip mounting substrate, followed by heat curing. As a result, it was possible to form a bond having good adhesion, strong stress, and high conductivity in a short time.

Example 11 In the same manner as in Example 1, a 5-inch wafer for C-MOS was used as an Si substrate, and an Al layer was formed to a thickness of 5 μm on the entire surface by vacuum evaporation.

Next, a displacement tin plating layer having a thickness of 0.7 μm was formed as a metal layer more noble than Al by performing the displacement plating in the same manner as in Example 4. That is,
5 using a cleaning liquid consisting of a nonionic surfactant
After washing at 0 ± 2 ° C. for 2 minutes and washing with pure water, 62% HNO
₃ Immerse in 10 ml / L for 10 seconds, wash with water, then 30 g / L potassium stannate, 50 g / L potassium gluconate, ED
Plating solution consisting of TA4K 10g / L, with KOH
H was adjusted to 9.0. By immersing in this plating solution at 30 ° C. for 30 seconds, the surface of the Al layer has a thickness of 0.7 μm.
Was uniformly substituted with Sn over a period of time.

After washing with water and drying, a pattern was formed by photolithography so that the electrode portion and the circuit portion remained. The respective patterns of the electrode portions were formed so as to be able to conduct with each other in order to perform electrolytic plating in a subsequent step.

Next, masking was performed with a resist so that only the electrode portion having a diameter of 100 μm was opened. Then, electrolytic Sn plating, electrolytic Ag plating, and electrolytic Sb plating were sequentially performed only on the electrode portion under the following composition conditions, and a Sn plating layer of 20 μm was formed.
m, an Ag plating layer 1 μm, and an Sb plating layer 1 μm were sequentially laminated. That is, tin methanesulfonate 20 g / L, methanesulfonic acid 20 g / L, additive (B-10, manufactured by World Metal Co., Ltd.) 20 g / L, 20 ° C., current density 1 A
20 μm of Sn was plated at / dm ² . After washing with water, methanesulfonic acid Ag 10 g / L, methanesulfonic acid 20 g / L
L, additive (AG-11, manufactured by World Metal Co., Ltd.)
Ag at 1 g at 20 g / L, 20 ° C., current density 1 A / dm ²
It was plated by μm. After washing with water, methanesulfonic acid Sb10g
/ L, methanesulfonic acid 20g / L, additive (SB-
8, World Metal Co., Ltd.) 20g / L, 20 ° C,
Sb was plated at 1 μm at a current density of 1 A / dm ² .

After washing with water and drying, the resist was peeled off, the conducting portions of each electrode were cut, and sintering was performed at 300 ° C. for 10 minutes. Thereafter, a protective film made of SiN was formed so that the electrode portion was opened. Thus, as shown in FIG. 5, the Sn plating layer (the first bump metal layer 41), the Sn plating layer (the first bump metal layer 41) on the electrode pattern 30 including the Al electrode 4A and the substitution Sn plating electrode (metal electrode layer substitution 20A which is more noble than Al) An Ag / Sn / Ag / layer in which an Ag plating layer (second bump metal layer 42) and an Sb plating layer (third bump metal layer 43) are sequentially laminated.
The Sb bump 40 was formed.

When the solder shear strength of the bump was measured in the same manner as in Example 1, it was 100 g or more.

Furthermore, the bumps of the above-mentioned semiconductor chip are aligned with the IC package electrodes of the glass ceramic substrate having the IC package electrodes made of Ni / Au on Ag-Pd, and are bonded by thermocompression bonding and mounted. did. This implementation is an implementation based on the All-Marmariless method.

Example 12 In the same manner as in Example 1, a 5-inch wafer for C-MOS was used as a Si substrate, and an Al layer was formed to a thickness of 3 μm on the entire surface by vacuum evaporation. Next, 0.1 μm of Ti and 1 μm of Cu were sequentially laminated on the entire Al surface of the substrate by a low-temperature spraying method. Further, an electrolytic Cu plating layer having a thickness of 10 μm was formed thereon.

Next, a pattern was formed by photolithography so that the electrode portion and the circuit portion remained. Then, 100μmφ
A protective film of silicon nitride was formed so that the electrode pattern of (1) was opened, and an electrode portion was formed. Next, this electrode part was replaced with 5% H _2.
After immersion in SO ₄ solution, washing and drying, 10
A bump was formed by placing a Ni solder-plated ball on a hollow ABS resin having a diameter of 0 μm and fusing the ball.

The solder shear strength of the thus obtained bump was measured in the same manner as in Example 1.
Met. The height of each bump is 95 to 105.
It was in the range of μm and almost the same.

Example 13 In the same manner as in Example 1, a 5-inch wafer for C-MOS was used as a Si substrate, and an Al layer was formed to a thickness of 3 μm on the entire surface by vacuum evaporation.

Next, this semiconductor chip was treated with 0.1 mol / m ³ each of benzotriazole-Cu and Cu stearate.
Was placed in a vacuum furnace at 200 ° C. and 10 ⁻³ Torr, and the semiconductor chip was exposed to vapors of these organometallic (Cu) compounds. As a result, Cu with good adhesion could be deposited on the entire surface of the Al layer of the semiconductor chip in a thickness of 0.3 μm.

Next, a pattern was formed by photolithography so that the electrode portion and the circuit portion remained. And 100μmφ
A protective film of PSG was formed so that the electrode pattern of (1) was opened, and an electrode portion was formed. Further, an electroless N
An i-Au plating layer was formed, and a solder ball of 100 μmφ was placed thereon and fused to form a solder bump.

The solder shear strength of the thus obtained bumps was measured in the same manner as in Example 1.
It was 0 g. The height of each bump is 93-1.
It was in the range of 05 μm and was almost the same.

Example 14 An 8-inch wafer for C-MOS was used as a Si substrate.
An Al-Si-Cu film was formed thereon by sputtering to a thickness of 5 μm.
Laminated.

Next, a resist was applied by screen printing so that the electrode portion and the circuit portion remained. And tin methanesulfonate 10 g / L, methanesulfonic acid 20 g / L,
It was immersed in a tin plating solution consisting of gluconic acid 10 g / L at 30 ° C. for 5 minutes. As a result, a substituted tin plating layer having a thickness of 1.5 μm was formed. This was fused at 270 ° C. and melted.

Next, the resist was removed, the remaining tin plating layer was used as an etching resist, and the other portions were patterned by etching to form electrode portions and circuit portions. Then, a protective film of silicon nitride was formed so that the electrode pattern of 100 μmφ was opened.

A solder ball of 100 μmφ was fused on the obtained electrode portion to form a solder bump. When the solder shear strength of this bump was measured in the same manner as in Example 1, it was 120 g or more in all the electrode portions.

Example 15 In the same manner as in Example 8, a Ti layer of 0.1 μm and a Cu layer of 0.3 μm were formed on the entire surface of the Al layer on the Si substrate by vacuum evaporation.
m were sequentially laminated. Then, a resist was applied so that only the electrode portions were opened, and an electrolytic copper plating layer was formed to a thickness of 5 μm in the openings. Further, a 6: 4 solder layer of 5 μm was laminated by electroplating. Next, the resist was peeled off, and the conduction of each electrode was cut off. Then, a protective film of silicon nitride was formed so that an electrode pattern of 100 μmφ was opened, and an electrode portion was obtained.

A 6: 4 solder ball having a diameter of 100 μm was placed on the electrode portion and melted at 210 ° C. to form a bump.

The solder shear strength of the thus obtained bump was measured in the same manner as in Example 1.
It was 0 g. The height of each bump is 43-4.
In the range of 5 μm, they were almost the same.

It should be noted that there is only a thin film of 0.1 μm of Ti layer and 0.3 μm of Cu layer on the Al layer in the circuit section of this semiconductor chip.

Embodiment 16 As shown in FIG. 6, an 8-inch wafer for C-MOS was used as the Si substrate 2, and the entire surface thereof was
-Si-Cu layer 4 is formed to 3 μm, and then the electrode 4A
Resist 13 such that the portion to be
Was applied (FIG. 6A). Note that a mask may be used instead of applying the resist. Then, only 0.1 μm of Ti, 0.1 μm of Cr, 0.3 μm of Cu
Were sequentially laminated (FIG. 2B). Next, the Ti0.1
120 μm φ of μm, Cr 0.1 μm, Cu 0.3 μm
Pattern so that the laminated portion of
0a and the circuit portion 4X were formed (FIG. 3 (c)). next,
A protective film 7 made of polyimide is formed so that the electrode pattern 30a has an opening of 100 μmφ (FIG. 9D), and the same electroless plating method as in Example 9 is performed to further form Ni on the Cu layer of the electrode portion. Layer 5 μm and Au layer 0.1 μm
The electrode upper pattern 30b made of was formed.

Thus, as shown in FIG. 6 (e), the electrode 4A of the Al—Si—Cu layer and the Ti layer
On the electrode pattern 30a of 120 μmφ composed of a Cr layer and a Cu layer, 100 μmφ composed of a Ni layer and an Au layer
Forming an electrode portion having an electrode upper pattern 30b of
A circuit section 4X made of an l-Si-Cu layer was formed. In this way, by reducing the opening diameter of the electrode upper pattern 30b composed of the Ni layer and the Au layer in comparison with the opening diameter of the electrode pattern 30a, the end A of the electrode 4A composed of the Al—Si—Cu layer is reduced. Corrosion can be favorably prevented.

100 μmφ on electrode upper pattern 30 b
6: 4 solder balls were placed and melted to form bumps. When the solder shear strength of the bump was measured in the same manner as in Example 1, it was 130 g or more in all the electrode portions. In each of the electrode portions, the height of the bump was 39 to 42 μm.

[0149]

According to the present invention, it is possible to prevent the thickness of each Al electrode formed as an electrode for various uses in a semiconductor chip from being varied, and to further form an electrode portion in the case where bumps or the like are formed on these Al electrodes. Can also be prevented from varying in thickness. Therefore, it is possible to reliably and reliably join the substrate and each electrode portion of the semiconductor chip with uniform adhesion strength.

Further, according to the present invention, the desired thickness can be secured without excessively reducing the thickness of the metal serving as the base of the bump, so that the adhesion between the Al electrode and the bump metal is improved. be able to. Therefore, if necessary, height 5
It is also possible to form bumps of μm or more.

[Brief description of the drawings]

FIG. 1 is a process chart of a basic mode of a method for forming an electrode section according to the present invention.

FIG. 2 is a process chart of a basic mode of a method for forming an electrode portion according to the present invention.

FIG. 3 is a diagram illustrating a layer configuration of an electrode unit according to the present invention.

FIG. 4 is a layer configuration diagram of an electrode unit of the present invention.

FIG. 5 is a diagram illustrating a layer configuration of an electrode unit according to the present invention.

FIG. 6 is a process chart of forming an electrode portion of the embodiment.

FIG. 7 is an explanatory view of a conventional method for forming an Al electrode.

FIG. 8 is an explanatory view of a conventional bump forming method.

[Description of Signs] 1 semiconductor chip 2 semiconductor substrate 3 insulating layer 4 Al layer 4A Al electrode 4X circuit section 7 protective film (passivation film) 8 adhesion improving film 9 diffusion prevention film 10 resist 11 bump metal 19 Zn substitution film 20 from Al Noble metal layer 20A Metal electrode nobler than Al 21 First metal layer 22 Second metal layer 30, 30a Electrode pattern 30b Electrode upper pattern 40 Bump 41 First bump metal layer 42 Second bump metal layer 43 Third bump metal layer 100a, 100b, 100c, 100d Electrode section

 ──────────────────────────────────────────────────続 き Continued on the front page F term (reference) 4M104 AA01 BB02 DD22 DD34 DD52 DD53 DD79 EE06 EE15 EE17 EE18 FF06 FF13 HH08 4M105 AA05 AA13 AA16 FF05 FF06

Claims (15)

[Claims] 1. A method for forming an electrode portion comprising an Al layer and a metal layer which is more noble than Al laminated on the Al layer on a semiconductor substrate, comprising: forming an Al layer on the semiconductor substrate; Without preliminarily patterning the Al layer into an electrode pattern, a metal layer nobler than Al is laminated on at least a portion to be an electrode portion on the Al layer, and then patterned to form an Al layer and a metal layer nobler than Al. A method for forming an electrode portion of a semiconductor chip, comprising forming an electrode pattern having a laminated structure. 2. A metal layer which is nobler than Al, such as Si, Z
n, Ta, Sn, Pb, Ag, Au, Pt, As, B
i, Sb, Se, Cd, Cu, Ni, Cr, In, F
2. The method for forming an electrode portion of a semiconductor chip according to claim 1, wherein a single layer of a metal selected from e, Mo, W, Co, Rh, Ti and Pd, two or more stacked layers or alloy layers are formed. 3. A metal layer which is more noble than Al on the Al layer,
3. The method according to claim 2, wherein the electrode is formed by an electroplating method, an electroless plating method, a spraying method, or a vapor phase method. 4. An electrode pattern having a laminated structure of an Al layer and a metal layer noble than Al is formed by laminating a metal layer nobleer than Al on the entire surface of the Al layer and then patterning the layer. 2. The method for forming an electrode portion of a semiconductor chip according to claim 1. 5. A layered structure of an Al layer and a metal layer nobler than Al by selectively laminating a metal layer nobler than Al on a portion to be an electrode portion on the Al layer and then patterning the layer. 2. The method according to claim 1, wherein the electrode pattern is formed. 6. The method according to claim 1, wherein after forming the electrode pattern, a protective film is formed on the surface of the semiconductor chip so that the electrode pattern is opened. 7. The method for forming an electrode portion of a semiconductor chip according to claim 6, wherein the protective film is formed so that the opening area of the electrode pattern is reduced, and the electrode upper pattern is laminated on the opened electrode pattern. 8. A metal diffusion layer is formed between an Al layer and a metal layer which is nobler than Al by sintering after forming an electrode pattern or forming a protective film.
The method for forming an electrode portion of a semiconductor chip according to any one of the above. 9. The method for forming an electrode portion of a semiconductor chip according to claim 6, wherein after forming the protective film, a bump metal layer is further laminated on a metal layer nobler than Al. 10. A semiconductor chip having an electrode portion formed by the method according to claim 1. 11. A semiconductor chip which is heated and pressed by aligning an electrode portion of a semiconductor chip formed by the method according to claim 1 with an electrode pad of a substrate on which the semiconductor chip is to be mounted. How to implement. 12. A solder ball is placed on an electrode pattern of a semiconductor chip formed by the method according to claim 1 to form an electrode portion having a bump. A method of mounting a semiconductor chip which is heated and pressurized in alignment with an electrode portion of a substrate to be mounted. 13. An anisotropic conductive agent applied or coated on an electrode portion of a semiconductor chip formed by the method according to claim 1 or an electrode portion of a substrate on which the semiconductor chip is to be mounted. A method of mounting a semiconductor chip by printing or attaching an anisotropic conductive film, aligning both electrode portions, and heating and pressing. 14. A conductive paste is applied or printed on an electrode portion of a semiconductor chip formed by the method according to claim 1 or on an electrode portion of a substrate on which the semiconductor chip is to be mounted. Or a method of mounting a semiconductor chip in which a conductive film is attached or a resin bump is placed, and both electrode portions are positioned and heated and pressed. 15. A semiconductor chip mounting method for connecting an electrode portion of a semiconductor chip formed by the method according to claim 1 and an electrode portion of a substrate on which the semiconductor chip is to be mounted by a wire bonding method. Method.