JPH0587181B2 - - Google Patents

Info

Publication number
JPH0587181B2
JPH0587181B2 JP63230613A JP23061388A JPH0587181B2 JP H0587181 B2 JPH0587181 B2 JP H0587181B2 JP 63230613 A JP63230613 A JP 63230613A JP 23061388 A JP23061388 A JP 23061388A JP H0587181 B2 JPH0587181 B2 JP H0587181B2
Authority
JP
Japan
Prior art keywords
substrate
circuit
circuits
adhesive layer
gap
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Lifetime
Application number
JP63230613A
Other languages
English (en)
Japanese (ja)
Other versions
JPH0278253A (ja
Inventor
Takeshi Kano
Tooru Higuchi
Munetake Yamada
Kaoru Mukai
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Panasonic Electric Works Co Ltd
Original Assignee
Matsushita Electric Works Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Matsushita Electric Works Ltd filed Critical Matsushita Electric Works Ltd
Priority to JP63230613A priority Critical patent/JPH0278253A/ja
Publication of JPH0278253A publication Critical patent/JPH0278253A/ja
Publication of JPH0587181B2 publication Critical patent/JPH0587181B2/ja
Granted legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42—Wire connectors; Manufacturing methods related thereto
    • H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/4805—Shape
    • H01L2224/4809—Loop shape
    • H01L2224/48091—Arched
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42—Wire connectors; Manufacturing methods related thereto
    • H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/481—Disposition
    • H01L2224/48151—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/48221—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/48225—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
    • H01L2224/48227—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation connecting the wire to a bond pad of the item

Landscapes

  • Production Of Multi-Layered Print Wiring Board (AREA)
JP63230613A 1988-09-14 1988-09-14 多層プラスチックチップキャリア Granted JPH0278253A (ja)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP63230613A JPH0278253A (ja) 1988-09-14 1988-09-14 多層プラスチックチップキャリア

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP63230613A JPH0278253A (ja) 1988-09-14 1988-09-14 多層プラスチックチップキャリア

Publications (2)

Publication Number Publication Date
JPH0278253A JPH0278253A (ja) 1990-03-19
JPH0587181B2 true JPH0587181B2 (zh) 1993-12-15

Family

ID=16910508

Family Applications (1)

Application Number Title Priority Date Filing Date
JP63230613A Granted JPH0278253A (ja) 1988-09-14 1988-09-14 多層プラスチックチップキャリア

Country Status (1)

Country Link
JP (1) JPH0278253A (zh)

Families Citing this family (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH0734646B2 (ja) * 1989-07-15 1995-04-12 松下電工株式会社 リニアモータ
US5531637A (en) * 1993-05-14 1996-07-02 Kabushiki Kaisha Nagao Kogyo Automatic centrifugal fluidizing barrel processing apparatus
JP2526515B2 (ja) * 1993-11-26 1996-08-21 日本電気株式会社 半導体装置

Citations (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5228547A (en) * 1975-08-29 1977-03-03 Kazuo Hara Method for the coagulation of sodium alginate
JPS60107894A (ja) * 1983-11-17 1985-06-13 沖電気工業株式会社 多層印刷配線板の製造方法
JPS61258457A (ja) * 1985-05-13 1986-11-15 Nec Corp 樹脂封止型半導体装置
JPS6338878A (ja) * 1986-07-31 1988-02-19 株式会社　ウロコ製作所 乾燥装置

Family Cites Families (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH0451484Y2 (zh) * 1986-01-18 1992-12-03

Patent Citations (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5228547A (en) * 1975-08-29 1977-03-03 Kazuo Hara Method for the coagulation of sodium alginate
JPS60107894A (ja) * 1983-11-17 1985-06-13 沖電気工業株式会社 多層印刷配線板の製造方法
JPS61258457A (ja) * 1985-05-13 1986-11-15 Nec Corp 樹脂封止型半導体装置
JPS6338878A (ja) * 1986-07-31 1988-02-19 株式会社　ウロコ製作所 乾燥装置

Also Published As

Publication number Publication date
JPH0278253A (ja) 1990-03-19

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