JPH0580850B2 - - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION The present invention eliminates noise and corrects timing signal dropout in a timing signal extraction circuit of a receiver that extracts only the timing signal from an input timing signal that includes noise and is easily degraded. death,
The present invention relates to a portable television receiver equipped with a timing signal extraction circuit capable of generating an internal timing signal even when a timing signal is dropped.

An example of a timing signal extraction circuit that extracts only a timing signal from an input timing signal that includes noise and is susceptible to deterioration is a timing signal extraction circuit shown in FIG. 1 is a timing signal input terminal, 2 is a resistor, 3 is a capacitor, 4 is a comparator that inverts the output depending on whether the input signal is larger or smaller than a preset amplitude value, and 5 is the output signal of comparator 4. 6 is a noise removal circuit composed of a resistor 2, a capacitor 3, a comparator 4, and a waveform shaping circuit 5. 7 is a fixed circuit that oscillates at a frequency that is an integral multiple of the frequency of the timing signal. oscillator,
8 is a resettable frequency divider circuit which divides the output signal of the fixed oscillator 7 and outputs a signal having the same frequency as the timing signal; 9 is a signal output terminal of the frequency divider circuit 8; Further, FIG. 2 shows a waveform diagram of each part of the circuit shown in FIG. 1. Note that the comparator 5 is a differential amplifier,
Alternatively, any known circuit using a C-MO inverter threshold level or the like can be applied.

FIG. 2-A shows the timing signal input from the timing signal input terminal 1, 10 is the true timing signal, 11 is the mixed narrow time width noise,
12 represents mixed noise with a wide time width, and 13 represents a dropout of the timing signal. When this input timing signal is input to a low-pass filter composed of a resistor 2 and a capacitor 3, its amplitude is attenuated according to the time width of each input signal. true timing signal 1
Since the low-pass filter output of 0 exceeds the threshold level of the comparator 4, the waveform shaping circuit 5
appears in the output of By resetting the frequency divider circuit 8 with the output of the noise removal circuit 6 shown in FIG. 2-B, the period between the output signal of the frequency divider circuit 8 and the timing signal can be determined. Frequency divider circuit 8
The output signal of is shown in FIG. 2-C. On the other hand, noise 11
Since the amplitude of the signal is greatly attenuated by the low-pass filter and cannot exceed the threshold level of the comparator 4, it does not appear in the outputs of the comparator 4 and the waveform shaping circuit 5. Therefore, Figure 2-B
The frequency dividing circuit 8 has the output of the noise removal circuit b shown in FIG.
By resetting , it is possible to prevent the reset malfunction of the frequency divider circuit 8 due to the noise 11.
As shown in FIG. 2-C, no signal synchronized with the noise 11 appears in the output signal of the frequency dividing circuit 8. Furthermore, since the frequency dividing circuit 8 divides the output signal of the fixed oscillator 7 and outputs a signal with the same frequency as the timing signal, even if the timing signal is dropped,
It is possible to output the internal timing signal 14 that maintains the state before the timing signal was dropped.

However, in such a circuit, the noise 12 having a time width of a certain value or more has a small amplitude attenuation in the low-pass filter like the true timing signal 10, and exceeds the threshold level of the comparator 4, so that the noise 12 has a time width exceeding a certain value. As shown in FIG. 2-B, it is included in the output signal of the noise removal circuit b. Therefore, the frequency divider circuit 8 resets incorrectly due to the noise 12, and
As shown in FIG. 2-C, a signal synchronized with the noise 12 appears in the output signal of the frequency dividing circuit 8.

A specific example of the circuit shown in FIG. 1 is a horizontal synchronization circuit for a portable television receiver. Portable television receivers are often used in moving objects such as trains and cars rather than in a stationary state, and are less prone to sudden changes in electric field strength and radio noise than stationary television receivers. contamination occurs frequently. Therefore, the horizontal synchronizing signal input to the horizontal synchronizing circuit of a portable television receiver contains noise or is more frequently dropped than that of a stationary television receiver. FIG. 3 shows an example of a horizontal synchronization circuit designed to solve this problem and obtain a stable screen by applying the timing signal extraction circuit shown in FIG. 1.

25 is a composite video signal input terminal; 26 is a synchronization separation circuit that separates a composite synchronization signal from the composite video signal;
27 is a horizontal synchronization signal separation circuit that separates a horizontal synchronization signal from a composite synchronization signal, and 28 is a horizontal AFC (Auto
Frequency Control: automatic frequency control) circuit, 2
9 is the output terminal of the horizontal AFC circuit 28;
Reference numerals 7 and 8 are a noise removal circuit, a fixed oscillator, and a frequency dividing circuit that constitute the circuit shown in FIG. Here, the fixed oscillator 7 oscillates at a frequency that is an integral multiple of the frequency of the horizontal synchronizing signal, and the frequency divider circuit 8 divides the output signal of the fixed oscillator 7 and outputs a signal with the same frequency as the horizontal synchronizing signal. be. Also, A in the diagram of Fig. 3,
The signal lines B and C correspond to those shown in FIGS. 1 and 2, and the operation of the horizontal synchronization circuit shown in FIG. 3 will be explained below using FIG. 2. In addition, Fig. 2-A-1
0 represents a true horizontal synchronizing signal, 11 and 12 represent mixed noise, and 13 represents a dropout of the horizontal synchronizing signal.

First, the composite video signal input from the composite video signal input terminal 25 is input to the synchronization separation circuit 26, and a composite synchronization signal is extracted. Next, this composite synchronization signal is input to a horizontal synchronization signal separation circuit 27, and a horizontal synchronization signal is extracted. The horizontal synchronizing signal extracted by the horizontal synchronizing signal separation circuit 27 is contaminated with noise, or the horizontal synchronizing signal is dropped, as shown in FIG. 2-A. Of these, the true horizontal synchronizing signal 10 appears at the output of the noise removal circuit 6 and resets the frequency dividing circuit 8, as shown in FIG. 2-B.
Therefore, the output signal of the frequency dividing circuit 8 shown in FIG. 2C can be synchronized with the horizontal synchronizing signal. Further, since the noise 11 does not appear in the output of the noise removal circuit 6 as shown in FIG. 2-B, the frequency dividing circuit 8 is not reset by the noise 11. Therefore, as shown in FIG. 2-C, no signal synchronized with the noise 11 appears in the output signal of the frequency dividing circuit 8. By inputting the output signal of this frequency dividing circuit 8 to the horizontal AFC circuit 28, the horizontal AFC circuit 2
8 operates stably and can provide a stable screen. On the other hand, the frequency divider circuit 8 divides the output signal of the fixed oscillator 7 and outputs a signal with the same frequency as the horizontal synchronizing signal, so even if the horizontal synchronizing signal is dropped, the state before the horizontal synchronizing signal is maintained. did. An internal horizontal synchronization signal 14 shown in FIG. 2-C can be output. Therefore, even when the horizontal synchronization signal is dropped, the internal horizontal synchronization signal 14 is input to the horizontal AFC circuit 28, the horizontal AFC circuit 28 operates stably, and a stable screen can be obtained.

However, the noise 12 shown in FIG.
As shown in FIG. 2B, it appears at the output of the noise removal circuit 6, causing the frequency divider circuit 8 to reset and malfunction. Therefore, the output signal of the frequency dividing circuit 8 shown in FIG.
A signal synchronized with the noise 12 is generated, and the horizontal AFC circuit 28 is disturbed by this signal, causing the screen to become distorted.

The present invention eliminates such drawbacks, and its purpose is to accurately and reliably remove the noise mixed between the synchronization signals of a portable television receiver, and even if the synchronization signal is dropped, the synchronization signal may be dropped. To provide a portable television receiver that can obtain a stable screen by generating an internal synchronization signal that maintains the previous state.

The present invention will be described in detail below based on Examples.

FIG. 4 is a block diagram of a timing signal extraction circuit used in the portable television receiver of the present invention, in which 1 is a timing signal input terminal, 15 is a timing signal input terminal for controlling passage of a timing signal, and a first control terminal and a second
16 is a detection circuit that detects that the timing signal has passed through the gate circuit 15 and outputs a second control signal; 7 is a fixed circuit that oscillates at a frequency that is an integral multiple of the frequency of the timing signal; An oscillator; 8 is a frequency dividing circuit that divides the output signal of the fixed oscillator 7 and outputs a signal having the same frequency as the timing signal and a first control signal; 9 is a signal output terminal of the frequency dividing circuit 8; Further, FIG. 5 shows a waveform diagram of each part of the block diagram shown in FIG. 4.

The frequency dividing circuit 8 divides the output signal of the fixed oscillator 7 and outputs a first control signal shown in FIG. 5-D,
When the first control terminal of the gate circuit 15 receives this first control signal, the gate circuit 15 enters a state in which it allows passage of the timing signal. When the timing signal passes through the gate circuit 15, the detection circuit 16 detects the passage of the timing signal through the gate circuit 15 and outputs the second control signal shown in FIG. When the control terminal of gate circuit 2 inputs this second control signal, gate circuit 1
5 is a state in which passage of the timing signal is prohibited. In this way, among the timing signals shown in FIG. 5-A, the noises 11 and 12 mixed between the true timing signals 10 pass through the gate circuit 15 as shown in FIG. 5-B, regardless of their time width. The noise 11, In addition, even when the timing signal 13 is dropped, an internal timing signal 14 that maintains the state before the dropout can be generated as shown in FIG. 5-C.

Note that the output timings of the first control signal and the second control signal shown in FIG. The circuit of the present invention can be implemented even when outputting at various timings, such as when the timing signal is expected to rise, or when the timing signal is expected to have already been input. Even if output is performed at various timings, such as when the falling edge of the timing signal that has passed through the gate circuit 15 is detected, when the rising edge of the timing signal is detected, or when a certain period of time has elapsed since the rising edge of the timing signal, the main The circuit of the invention can be implemented.

Next, FIG. 6 shows a gate circuit 15 and a detection circuit 16.
An example is shown below. 1 is a timing signal input terminal,
7 is a fixed oscillator that oscillates at a frequency that is an integral multiple of the frequency of the timing signal; 8 is a frequency dividing circuit that divides the output signal of the fixed oscillator 7 and outputs a signal with the same frequency as the timing signal and a first control signal; 9 is a signal output terminal of frequency dividing circuit 8, 17 and 18 are AND gates, 19 and 20 are inverters, and 21 and 22 are
A NOR gate, 23 is a data input flip-flop (hereinafter referred to as D-F/F), and 24 is an arbitrary clock input terminal. 17, Inverter 2
0, D-F/F23, arbitrary clock input terminal 2
4 constitutes a detection circuit 16. In addition, each signal line A, B, C, D, and E in the diagram of FIG.
This corresponds to that of FIG.

When the NOR gate 21 of the gate circuit 15 inputs the first control signal from the frequency divider circuit 8, the output of the inverter 19 becomes "H", and the AND gate 17
is in a timing signal passage permission state. The timing signal is sent to the gate circuit 15, that is, the AND gate 17
, the timing signal is input to the detection circuit 16 at the same time as the frequency dividing circuit 8 is reset, and the detection circuit 16 inputs the timing signal to the inverter 2.
The AND gate 18 takes the AND of the signal inverted by 0 and the output Q delayed by the D-F/F 23, generates a signal at the falling edge of the timing signal, and uses this as the second control signal. Gate circuit 15
input to the NOR gate 22 of At this time, the output of the inverter 19 becomes "L", and from then on until the first control signal is input to the NOR gate 21, the AND
The gate 17 is in a state in which passage of the timing signal is prohibited. As shown in FIG. 6, the gate circuit 15 and the detection circuit 16 can be easily constructed.

In addition, the gate circuit 15 and the detection circuit 1 shown in FIG.
The configuration No. 6 shows one example thereof,
In FIG. 6, the gate circuit 15 is a circuit in which the first control signal has priority over the second control signal, but the circuit of the present invention can be implemented even if the circuit is configured to give priority to the first control signal over the second control signal. The detection circuit 16 is also configured to detect the fall of the timing signal, but the circuit of the present invention can be implemented even if the circuit is configured to detect at other timings.

Next, FIG. 7 shows an embodiment of a portable television receiver of the present invention using the above-mentioned timing signal extraction circuit. 25 is a composite video signal input terminal;
26 is a sync separation circuit that separates a composite sync signal from a composite video signal, 27 is a horizontal sync signal separation circuit that separates a horizontal sync signal from a composite sync signal, 28 is a horizontal AFC circuit, and 29 is an output terminal of the horizontal AFC circuit 28. 7, 8, 15, and 16 are a fixed oscillator, a frequency dividing circuit, a gate circuit, and a detection circuit, respectively, which constitute the timing signal extraction circuit of the present invention. Here,
The fixed oscillator 7 oscillates at a frequency that is an integral multiple of the frequency of the horizontal synchronizing signal, and the frequency dividing circuit 8 divides the output signal of the fixed oscillator 7 and outputs a signal having the same frequency as the frequency of the horizontal synchronizing signal. .

In the horizontal synchronization circuit shown in FIG. 7, when the horizontal synchronization signal is dropped, it is possible to generate an internal horizontal synchronization signal synchronized with the horizontal synchronization signal, similar to the horizontal synchronization circuit shown in FIG. 3. Therefore, horizontal
The AFC circuit 28 operates stably and the screen is stable. On the other hand, in the horizontal synchronization circuit shown in Fig. 3, the screen was disturbed by noise with a time width exceeding a certain value, whereas in the horizontal synchronization circuit shown in Fig. 7, the screen was disturbed by noise mixed between horizontal synchronization signals. cannot pass through the gate circuit 15 regardless of its time width, so reset malfunctions due to noise in the frequency divider circuit 8 can be prevented. Therefore, the horizontal AFC circuit 28 operates stably and the screen is stable. As described above, when the circuit of the present invention is implemented in the horizontal synchronization circuit of a portable television receiver, a more stable screen can be obtained than in the conventional portable television receiver.

In the portable television receiver described above, the detection circuit 16 detects that the horizontal synchronizing signal has passed through the gate circuit 15, and the gate circuit 15
It is prohibited to pass the signal. Therefore, when the synchronization state is lost, the gate circuit 15 is in an open state, allowing the horizontal synchronization signal input to the gate circuit 15 to pass therethrough, and quickly returning to the synchronization state. . Moreover, it becomes possible to close the gate circuit 15 immediately after the horizontal synchronization signal passes through the gate circuit 15, and noise adjacent to the synchronization signal can also be reliably removed.

In the circuit of the present invention, if the oscillation frequency of the fixed oscillator changes due to temperature drift, etc.
The frequency of the internal timing signal generated when the timing signal is dropped does not match the frequency of the timing signal. However, between the case where no internal timing signal is generated and the case where an internal timing signal is generated using a fixed oscillator and a frequency dividing circuit, the device operates more stably when an internal timing signal is generated. If we compare the horizontal synchronization circuit of a television receiver as an example, we can see that when the horizontal synchronization signal is dropped, generating an internal horizontal synchronization signal and inputting it to the horizontal AFC circuit is much more efficient than when the internal horizontal synchronization signal is not generated and nothing is input to the horizontal AFC circuit. Even if the frequency of the horizontal synchronization signal is slightly different from that of the horizontal synchronization signal,
When input to the AFC circuit, the drift of the internal oscillation frequency within the horizontal AFC circuit is smaller, and the response when the horizontal synchronization signal is input again after dropping out is also better. Therefore, even if the oscillation frequency of the fixed oscillator changes due to temperature drift or the like, it is effective to generate an internal timing signal, and the circuit of the present invention is of great significance.

As described above, according to the present invention, noise mixed between synchronization signals of a portable television receiver can be accurately and reliably removed, and even if the synchronization signal is dropped, the state before the synchronization signal is lost can be restored. By generating a maintained internal synchronization signal, a stable screen can be obtained.

Further, since the detection circuit controls prohibition of signal passage by the gate circuit, it is possible to quickly return to the synchronized state and also to reliably eliminate noise adjacent to the synchronizing signal.

[Brief explanation of the drawing]

Figure 1 is a conventional example of a timing signal extraction circuit, Figure 2 is a waveform diagram of the circuit in Figure 1, Figure 3 is a block diagram of a horizontal synchronization circuit using the timing signal extraction circuit in Figure 1, and Figure 4. is a block diagram of the timing signal extraction circuit of the first embodiment of the present invention, FIG. 5 is a waveform diagram of each part of FIG. 4, and FIG. 6 is a gate circuit and a detection circuit of the second embodiment of the present invention. FIG. 7 shows a third embodiment of a horizontal synchronization circuit using the timing signal extraction circuit of the present invention. 1...Timing signal input terminal, 2...Resistor,
3... Capacitor, 4... Comparator, 5...
Waveform shaping circuit, 6... Noise removal circuit, 7... Fixed oscillator, 8... Resettable frequency dividing circuit, 9...
Signal output terminal of frequency dividing circuit 8, 10...True timing signal, 11, 12...Noise, 13...Timing signal dropout, 14...Internal timing signal, 1
5... Gate circuit, 16... Detection circuit, 17,1
8...AND gate, 19,20...inverter,
21, 22...NOR gate, 23...Data input flip-flop, 24...Arbitrary clock input terminal, 25...Composite video signal input terminal, 26...
...Sync separation circuit, 27...Horizontal synchronization signal separation circuit, 28...Horizontal AFC circuit, 29...Horizontal AFC
Output terminal of circuit 28.

Claims (1)

[Scope of Claims] 1. A portable television receiver that displays a screen using a television synchronization signal, comprising: a synchronization separation circuit that extracts the television synchronization signal from a composite video signal; an oscillator adjusted to oscillate at a frequency that is an integral multiple of the frequency; a frequency dividing circuit that divides the output of the oscillator to output a signal having the same frequency as the television synchronization signal; and the television synchronization signal is inputted. has been
The television synchronization signal is passed and the frequency division circuit is reset in response to a first control signal that allows passage of a signal output from the frequency division circuit in synchronization with the frequency division output of the frequency division circuit. a gate circuit; and a detection circuit that, when detecting that the television synchronization signal has passed through the gate circuit, outputs a second control signal to the gate circuit that prohibits passage of the television synchronization signal, The frequency dividing circuit is reset by the television synchronizing signal that has passed through the gate circuit, and when the television synchronizing signal is dropped, the frequency dividing circuit divides the oscillation output of the oscillator, thereby resetting the frequency of the television. A portable television receiver characterized by generating a signal of the same frequency as a synchronization signal.